From 96df5a80b8adb651791b68133d1bcbe43e65b342 Mon Sep 17 00:00:00 2001 From: Aiken Harris Date: Mon, 30 Mar 2026 14:56:41 +0200 Subject: [PATCH] Set CR3 field in TSS to ensure correct page table context on task switches --- xtoskrnl/ar/i686/procsup.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xtoskrnl/ar/i686/procsup.cc b/xtoskrnl/ar/i686/procsup.cc index 7ff5e0a..1c12e99 100644 --- a/xtoskrnl/ar/i686/procsup.cc +++ b/xtoskrnl/ar/i686/procsup.cc @@ -472,7 +472,8 @@ AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock, ProcessorBlock->TssBase->Esp0 = (ULONG_PTR)KernelBootStack; ProcessorBlock->TssBase->Flags = 0; - /* Set LDT and SS */ + /* Set CR3, LDT and SS */ + ProcessorBlock->TssBase->CR3 = CpuFunc::ReadControlRegister(3); ProcessorBlock->TssBase->LDT = KGDT_R0_LDT; ProcessorBlock->TssBase->Ss0 = KGDT_R0_DATA;