Initial XTLDR APIC support, finds and maps base APIC address for kernel

2023-11-20 15:18:22 +01:00
parent 3d0a48df26
commit a3c28cee73
6 changed files with 74 additions and 0 deletions
--- a/sdk/xtdk/amd64/arfuncs.h
+++ b/sdk/xtdk/amd64/arfuncs.h
@@ -32,6 +32,10 @@ XTCDECL
 ULONG_PTR
 ArReadControlRegister(IN USHORT ControlRegister);

+XTCDECL
+ULONGLONG
+ArReadModelSpecificRegister(IN ULONG Register);
+
 XTCDECL
 VOID
 ArWriteControlRegister(IN USHORT ControlRegister,
--- a/sdk/xtdk/amd64/hltypes.h
+++ b/sdk/xtdk/amd64/hltypes.h
@@ -14,6 +14,9 @@
 #include <xttypes.h>


+/* APIC base address */
+#define APIC_BASE                                       0xFFFFFFFFFFFE0000ULL
+
 /* Serial port I/O addresses */
 #define COMPORT_ADDRESSES                               {0x000, 0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}

--- a/sdk/xtdk/i686/arfuncs.h
+++ b/sdk/xtdk/i686/arfuncs.h
@@ -32,6 +32,10 @@ XTCDECL
 ULONG_PTR
 ArReadControlRegister(IN USHORT ControlRegister);

+XTCDECL
+ULONGLONG
+ArReadModelSpecificRegister(IN ULONG Register);
+
 XTCDECL
 VOID
 ArWriteControlRegister(IN USHORT ControlRegister,
--- a/sdk/xtdk/i686/hltypes.h
+++ b/sdk/xtdk/i686/hltypes.h
@@ -14,6 +14,9 @@
 #include <xttypes.h>


+/* APIC base address */
+#define APIC_BASE                                       0xFFFE0000
+
 /* Serial port I/O addresses */
 #define COMPORT_ADDRESSES                               {0x000, 0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}