Allow to specify CPU number when initializing (A)PIC
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This commit is contained in:
Rafal Kupiec 2024-05-07 16:16:49 +02:00
parent 2c384d780f
commit ac0b8ab36a
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
7 changed files with 44 additions and 19 deletions

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@ -12,17 +12,19 @@
/**
* Initializes the processor.
*
* @param CpuNumber
* Supplies the number of the CPU, that is being initialized.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
HlInitializeProcessor(VOID)
HlInitializeProcessor(IN ULONG CpuNumber)
{
PKPROCESSOR_BLOCK ProcessorBlock;
KAFFINITY Affinity;
ULONG CpuNumber = 0;
/* Get current processor block */
ProcessorBlock = KeGetCurrentProcessorBlock();
@ -40,7 +42,7 @@ HlInitializeProcessor(VOID)
HlpActiveProcessors |= Affinity;
/* Initialize APIC for this processor */
HlpInitializeApic();
HlpInitializePic(CpuNumber);
/* Set the APIC running level */
HlSetRunLevel(KeGetCurrentProcessorBlock()->RunLevel);

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@ -178,20 +178,20 @@ HlpHandlePicSpuriousService(VOID)
/**
* Initializes the APIC interrupt controller.
*
* @param CpuNumber
* Supplies the number of the CPU, that is being initialized.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*
* @todo Register interrupt handlers for spurious vectors.
*/
XTAPI
VOID
HlpInitializeApic(VOID)
HlpInitializeApic(IN ULONG CpuNumber)
{
APIC_BASE_REGISTER BaseRegister;
APIC_LVT_REGISTER LvtRegister;
APIC_SPURIOUS_REGISTER SpuriousRegister;
ULONG CpuNumber = 0;
/* Check if this is an x2APIC compatible machine */
if(HlpCheckX2ApicSupport())
@ -209,7 +209,7 @@ HlpInitializeApic(VOID)
BaseRegister.LongLong = ArReadModelSpecificRegister(APIC_LAPIC_MSR_BASE);
BaseRegister.Enable = 1;
BaseRegister.ExtendedMode = (HlpApicMode == APIC_MODE_X2APIC);
BaseRegister.BootStrapProcessor = 1;
BaseRegister.BootStrapProcessor = (CpuNumber == 0) ? 1 : 0;
ArWriteModelSpecificRegister(APIC_LAPIC_MSR_BASE, BaseRegister.LongLong);
/* xAPIC compatibility mode specific initialization */
@ -266,3 +266,24 @@ HlpInitializeApic(VOID)
KeSetInterruptHandler(APIC_VECTOR_SPURIOUS, HlpHandleApicSpuriousService);
KeSetInterruptHandler(PIC1_VECTOR_SPURIOUS, HlpHandlePicSpuriousService);
}
/**
* Initializes the (A)PIC interrupt controller.
*
* @param CpuNumber
* Supplies the number of the CPU, that is being initialized.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*
* @todo Initialize APIC only when supported, otherwise fall back to legacy PIC.
*/
XTAPI
VOID
HlpInitializePic(IN ULONG CpuNumber)
{
/* Disable legacy PIC and initialize APIC */
HlDisableLegacyPic();
HlpInitializeApic(CpuNumber);
}

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@ -48,7 +48,11 @@ HlpHandlePicSpuriousService(VOID);
XTAPI
VOID
HlpInitializeApic(VOID);
HlpInitializeApic(IN ULONG CpuNumber);
XTAPI
VOID
HlpInitializePic(IN ULONG CpuNumber);
XTFASTCALL
KRUNLEVEL

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@ -68,6 +68,6 @@ HlSetRunLevel(IN KRUNLEVEL RunLevel);
XTAPI
VOID
HlInitializeProcessor(VOID);
HlInitializeProcessor(IN ULONG CpuNumber);
#endif /* __XTOSKRNL_HLI_H */

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@ -48,7 +48,11 @@ HlpHandlePicSpuriousService(VOID);
XTAPI
VOID
HlpInitializeApic(VOID);
HlpInitializeApic(IN ULONG CpuNumber);
XTAPI
VOID
HlpInitializePic(IN ULONG CpuNumber);
XTFASTCALL
KRUNLEVEL

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@ -73,14 +73,11 @@ KepInitializeMachine(VOID)
HlIoPortOutByte(0x376, 0);
HlIoPortOutByte(0x3F6, 0);
/* Disable the legacy PIC */
HlDisableLegacyPic();
/* Initialize frame buffer */
HlInitializeFrameBuffer();
/* Initialize processor */
HlInitializeProcessor();
HlInitializeProcessor(0);
}
/**

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@ -73,14 +73,11 @@ KepInitializeMachine(VOID)
HlIoPortOutByte(0x376, 0);
HlIoPortOutByte(0x3F6, 0);
/* Disable the legacy PIC */
HlDisableLegacyPic();
/* Initialize frame buffer */
HlInitializeFrameBuffer();
/* Initialize processor */
HlInitializeProcessor();
HlInitializeProcessor(0);
}
/**