From b89121fded21262e5bb5f8a59d6eeaaef7e7fb44 Mon Sep 17 00:00:00 2001 From: belliash Date: Fri, 2 Dec 2022 23:03:42 +0100 Subject: [PATCH] Implement routines for accessing and manipulating CPU control registers --- sdk/xtdk/amd64/hlfuncs.h | 70 ++++++++++++ sdk/xtdk/hlfuncs.h | 9 -- sdk/xtdk/i686/hlfuncs.h | 62 ++++++++++ sdk/xtdk/xtkmapi.h | 3 + xtoskrnl/hl/amd64/cpufunc.c | 220 ++++++++++++++++++++++++++++++++++++ xtoskrnl/hl/i686/cpufunc.c | 176 +++++++++++++++++++++++++++++ 6 files changed, 531 insertions(+), 9 deletions(-) create mode 100644 sdk/xtdk/amd64/hlfuncs.h create mode 100644 sdk/xtdk/i686/hlfuncs.h diff --git a/sdk/xtdk/amd64/hlfuncs.h b/sdk/xtdk/amd64/hlfuncs.h new file mode 100644 index 0000000..0662ed5 --- /dev/null +++ b/sdk/xtdk/amd64/hlfuncs.h @@ -0,0 +1,70 @@ +/** + * PROJECT: ExectOS + * COPYRIGHT: See COPYING.md in the top level directory + * FILE: sdk/xtdk/amd64/hlfuncs.h + * DESCRIPTION: XT hardware abstraction layer routines specific to AMD64 architecture + * DEVELOPERS: Rafal Kupiec + */ + +#ifndef __XTDK_AMD64_HLFUNCS_H +#define __XTDK_AMD64_HLFUNCS_H + +#include "xtdefs.h" +#include "xtstruct.h" +#include "xttypes.h" + + +/* I/O port addresses for COM ports */ +extern ULONG ComPortAddress[]; + +/* HAL library routines forward references */ +XTAPI +UCHAR +HlIoPortInByte(IN USHORT Port); + +XTAPI +VOID +HlIoPortOutByte(IN USHORT Port, + IN UCHAR Data); + +XTAPI +ULONG_PTR +HlReadCR0(); + +XTAPI +ULONG_PTR +HlReadCR2(); + +XTAPI +ULONG_PTR +HlReadCR3(); + +XTAPI +ULONG_PTR +HlReadCR4(); + +XTAPI +ULONG_PTR +HlReadCR8(); + +XTAPI +VOID +HlWriteCR0(UINT_PTR Data); + +XTAPI +VOID +HlWriteCR2(UINT_PTR Data); + +XTAPI +VOID +HlWriteCR3(UINT_PTR Data); + +XTAPI +VOID +HlWriteCR4(UINT_PTR Data); + +XTAPI +VOID +HlWriteCR8(UINT_PTR Data); + +#endif /* __XTDK_AMD64_HLFUNCS_H */ diff --git a/sdk/xtdk/hlfuncs.h b/sdk/xtdk/hlfuncs.h index 91ea3ee..de51e19 100644 --- a/sdk/xtdk/hlfuncs.h +++ b/sdk/xtdk/hlfuncs.h @@ -37,13 +37,4 @@ HlInitializeComPort(IN OUT PCPPORT Port, IN ULONG PortNumber, IN ULONG BaudRate); -XTAPI -UCHAR -HlIoPortInByte(IN USHORT Port); - -XTAPI -VOID -HlIoPortOutByte(IN USHORT Port, - IN UCHAR Data); - #endif /* __XTDK_HLFUNCS_H */ diff --git a/sdk/xtdk/i686/hlfuncs.h b/sdk/xtdk/i686/hlfuncs.h new file mode 100644 index 0000000..caf000e --- /dev/null +++ b/sdk/xtdk/i686/hlfuncs.h @@ -0,0 +1,62 @@ +/** + * PROJECT: ExectOS + * COPYRIGHT: See COPYING.md in the top level directory + * FILE: sdk/xtdk/i686/hlfuncs.h + * DESCRIPTION: XT hardware abstraction layer routines specific to i686 architecture + * DEVELOPERS: Rafal Kupiec + */ + +#ifndef __XTDK_I686_HLFUNCS_H +#define __XTDK_I686_HLFUNCS_H + +#include "xtdefs.h" +#include "xtstruct.h" +#include "xttypes.h" + + +/* I/O port addresses for COM ports */ +extern ULONG ComPortAddress[]; + +/* HAL library routines forward references */ +XTAPI +UCHAR +HlIoPortInByte(IN USHORT Port); + +XTAPI +VOID +HlIoPortOutByte(IN USHORT Port, + IN UCHAR Data); + +XTAPI +ULONG_PTR +HlReadCR0(); + +XTAPI +ULONG_PTR +HlReadCR2(); + +XTAPI +ULONG_PTR +HlReadCR3(); + +XTAPI +ULONG_PTR +HlReadCR4(); + +XTAPI +VOID +HlWriteCR0(UINT_PTR Data); + +XTAPI +VOID +HlWriteCR2(UINT_PTR Data); + +XTAPI +VOID +HlWriteCR3(UINT_PTR Data); + +XTAPI +VOID +HlWriteCR4(UINT_PTR Data); + +#endif /* __XTDK_I686_HLFUNCS_H */ diff --git a/sdk/xtdk/xtkmapi.h b/sdk/xtdk/xtkmapi.h index d9fc2b4..9778c48 100644 --- a/sdk/xtdk/xtkmapi.h +++ b/sdk/xtdk/xtkmapi.h @@ -32,3 +32,6 @@ /* XT routines */ #include "hlfuncs.h" #include "rtlfuncs.h" + +/* Architecture specific XT routines*/ +#include ARCH_HEADER(hlfuncs.h) diff --git a/xtoskrnl/hl/amd64/cpufunc.c b/xtoskrnl/hl/amd64/cpufunc.c index 3385dbb..608f005 100644 --- a/xtoskrnl/hl/amd64/cpufunc.c +++ b/xtoskrnl/hl/amd64/cpufunc.c @@ -54,3 +54,223 @@ HlIoPortOutByte(IN USHORT Port, "a"(Value), "Nd"(Port)); } + +/** + * Reads the CR0 register and returns its value. + * + * @return The value stored in the CR0 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR0() +{ + ULONG_PTR Value; + asm volatile("mov %%cr0, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Reads the CR2 register and returns its value. + * + * @return The value stored in the CR2 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR2() +{ + ULONG_PTR Value; + asm volatile("mov %%cr2, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Reads the CR3 register and returns its value. + * + * @return The value stored in the CR3 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR3() +{ + ULONG_PTR Value; + asm volatile("mov %%cr3, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Reads the CR4 register and returns its value. + * + * @return The value stored in the CR4 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR4() +{ + ULONG_PTR Value; + asm volatile("mov %%cr4, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Reads the CR8 register and returns its value. + * + * @return The value stored in the CR8 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR8() +{ + ULONG_PTR Value; + asm volatile("mov %%cr8, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Writes the value to the CR0 register. + * + * @param Data + * The value to write to the CR0 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR0(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr0" + : + : + "r"(Data) + : + "memory"); +} + +/** + * Writes the value to the CR2 register. + * + * @param Data + * The value to write to the CR2 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR2(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr2" + : + : + "r"(Data) + : + "memory"); +} + +/** + * Writes the value to the CR3 register. + * + * @param Data + * The value to write to the CR3 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR3(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr3" + : + : + "r"(Data) + : + "memory"); +} + +/** + * Writes the value to the CR4 register. + * + * @param Data + * The value to write to the CR4 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR4(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr4" + : + : + "r"(Data) + : + "memory"); +} + +/** + * Writes the value to the CR8 register. + * + * @param Data + * The value to write to the CR8 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR8(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr8" + : + : + "r"(Data) + : + "memory"); +} diff --git a/xtoskrnl/hl/i686/cpufunc.c b/xtoskrnl/hl/i686/cpufunc.c index 35794dd..7ffcb82 100644 --- a/xtoskrnl/hl/i686/cpufunc.c +++ b/xtoskrnl/hl/i686/cpufunc.c @@ -54,3 +54,179 @@ HlIoPortOutByte(IN USHORT Port, "a"(Value), "Nd"(Port)); } + +/** + * Reads the CR0 register and returns its value. + * + * @return The value stored in the CR0 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR0() +{ + ULONG_PTR Value; + asm volatile("mov %%cr0, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Reads the CR2 register and returns its value. + * + * @return The value stored in the CR2 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR2() +{ + ULONG_PTR Value; + asm volatile("mov %%cr2, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Reads the CR3 register and returns its value. + * + * @return The value stored in the CR3 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR3() +{ + ULONG_PTR Value; + asm volatile("mov %%cr3, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Reads the CR4 register and returns its value. + * + * @return The value stored in the CR4 register. + * + * @since XT 1.0 + */ +XTAPI +ULONG_PTR +HlReadCR4() +{ + ULONG_PTR Value; + asm volatile("mov %%cr4, %0" + : + "=r" + (Value) + : + : + "memory"); + return Value; +} + +/** + * Writes the value to the CR0 register. + * + * @param Data + * The value to write to the CR0 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR0(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr0" + : + : + "r"(Data) + : + "memory"); +} + +/** + * Writes the value to the CR2 register. + * + * @param Data + * The value to write to the CR2 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR2(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr2" + : + : + "r"(Data) + : + "memory"); +} + +/** + * Writes the value to the CR3 register. + * + * @param Data + * The value to write to the CR3 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR3(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr3" + : + : + "r"(Data) + : + "memory"); +} + +/** + * Writes the value to the CR4 register. + * + * @param Data + * The value to write to the CR4 register. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTAPI +VOID +HlWriteCR4(UINT_PTR Data) +{ + asm volatile("mov %0, %%cr4" + : + : + "r"(Data) + : + "memory"); +}