diff --git a/sdk/xtdk/amd64/arfuncs.h b/sdk/xtdk/amd64/arfuncs.h
index 4cbe691..4d34919 100644
--- a/sdk/xtdk/amd64/arfuncs.h
+++ b/sdk/xtdk/amd64/arfuncs.h
@@ -44,6 +44,10 @@ XTCDECL
 VOID
 ArLoadInterruptDescriptorTable(IN PVOID Source);
 
+XTCDECL
+VOID
+ArLoadLocalDescriptorTable(IN USHORT Source);
+
 XTCDECL
 VOID
 ArLoadMxcsrRegister(IN ULONG Source);
diff --git a/sdk/xtdk/i686/arfuncs.h b/sdk/xtdk/i686/arfuncs.h
index dbb2611..9215a29 100644
--- a/sdk/xtdk/i686/arfuncs.h
+++ b/sdk/xtdk/i686/arfuncs.h
@@ -44,6 +44,10 @@ XTCDECL
 VOID
 ArLoadInterruptDescriptorTable(IN PVOID Source);
 
+XTCDECL
+VOID
+ArLoadLocalDescriptorTable(IN USHORT Source);
+
 XTCDECL
 VOID
 ArLoadSegment(IN USHORT Segment,
diff --git a/xtoskrnl/ar/amd64/cpufunc.c b/xtoskrnl/ar/amd64/cpufunc.c
index 8698e13..aeefe01 100644
--- a/xtoskrnl/ar/amd64/cpufunc.c
+++ b/xtoskrnl/ar/amd64/cpufunc.c
@@ -102,7 +102,7 @@ ArInvalidateTlbEntry(IN PVOID Address)
 }
 
 /**
- * Loads the values in the source operand into the global descriptor table register (GDTR).
+ * Loads the value in the source operand into the global descriptor table register (GDTR).
  *
  * @param Source
  *        Specifies a memory location that contains the base address of GDT.
@@ -122,7 +122,7 @@ ArLoadGlobalDescriptorTable(IN PVOID Source)
 }
 
 /**
- * Loads the values in the source operand into the interrupt descriptor table register (IDTR).
+ * Loads the value in the source operand into the interrupt descriptor table register (IDTR).
  *
  * @param Source
  *        Specifies a memory location that contains the base address of IDT.
@@ -141,6 +141,25 @@ ArLoadInterruptDescriptorTable(IN PVOID Source)
                  : "memory");
 }
 
+/**
+ * Loads the value in the source operand into the local descriptor table register (LDTR).
+ *
+ * @param Source
+ *        Specifies a selector value.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+VOID
+ArLoadLocalDescriptorTable(IN USHORT Source)
+{
+    asm volatile("lldtw %0"
+                 :
+                 : "g" (Source));
+}
+
 /**
  * Loads the value in the source operand into the MXCSR register
  *
diff --git a/xtoskrnl/ar/i686/cpufunc.c b/xtoskrnl/ar/i686/cpufunc.c
index a3c82ee..7cdfc55 100644
--- a/xtoskrnl/ar/i686/cpufunc.c
+++ b/xtoskrnl/ar/i686/cpufunc.c
@@ -102,7 +102,7 @@ ArInvalidateTlbEntry(PVOID Address)
 }
 
 /**
- * Loads the values in the source operand into the global descriptor table register (GDTR).
+ * Loads the value in the source operand into the global descriptor table register (GDTR).
  *
  * @param Source
  *        Specifies a memory location that contains the base address of GDT.
@@ -122,7 +122,7 @@ ArLoadGlobalDescriptorTable(IN PVOID Source)
 }
 
 /**
- * Loads the values in the source operand into the interrupt descriptor table register (IDTR).
+ * Loads the value in the source operand into the interrupt descriptor table register (IDTR).
  *
  * @param Source
  *        Specifies a memory location that contains the base address of IDT.
@@ -141,6 +141,25 @@ ArLoadInterruptDescriptorTable(IN PVOID Source)
                  : "memory");
 }
 
+/**
+ * Loads the value in the source operand into the local descriptor table register (LDTR).
+ *
+ * @param Source
+ *        Specifies a selector value.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+VOID
+ArLoadLocalDescriptorTable(IN USHORT Source)
+{
+    asm volatile("lldtw %0"
+                 :
+                 : "g" (Source));
+}
+
 /**
  * Loads source data into specified segment.
  *