diff --git a/xtoskrnl/includes/mm/amd64/pagemap.hh b/xtoskrnl/includes/mm/amd64/pagemap.hh index 717f374..28f67c2 100644 --- a/xtoskrnl/includes/mm/amd64/pagemap.hh +++ b/xtoskrnl/includes/mm/amd64/pagemap.hh @@ -23,7 +23,7 @@ namespace MM public: XTAPI PMMPTE AdvancePte(IN PMMPTE Pte, IN ULONG Count); - XTAPI VOID ClearPte(IN PHARDWARE_PTE PtePointer); + XTAPI VOID ClearPte(IN PMMPTE PtePointer); XTAPI ULONGLONG GetEmptyPteList(VOID); XTAPI ULONG_PTR GetNextEntry(IN PMMPTE Pte); XTAPI PMMPTE GetNextPte(IN PMMPTE Pte); @@ -45,15 +45,15 @@ namespace MM XTAPI ULONG GetPxeIndex(IN PVOID Address); XTAPI PVOID GetPxeVirtualAddress(IN PMMPXE PxePointer); VIRTUAL XTAPI VOID InitializePageMapInfo(VOID) = 0; - XTAPI BOOLEAN PteValid(IN PHARDWARE_PTE PtePointer); + XTAPI BOOLEAN PteValid(IN PMMPTE PtePointer); XTAPI VOID SetNextEntry(IN PMMPTE Pte, IN ULONG_PTR Value); XTAPI VOID SetOneEntry(IN PMMPTE Pte, IN BOOLEAN Value); - XTAPI VOID SetPte(IN PHARDWARE_PTE PtePointer, + XTAPI VOID SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable); - XTAPI VOID SetPteCaching(IN PHARDWARE_PTE PtePointer, + XTAPI VOID SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough); } PAGEMAP, *PPAGEMAP; diff --git a/xtoskrnl/includes/mm/i686/pagemap.hh b/xtoskrnl/includes/mm/i686/pagemap.hh index 89df0cd..df5bb91 100644 --- a/xtoskrnl/includes/mm/i686/pagemap.hh +++ b/xtoskrnl/includes/mm/i686/pagemap.hh @@ -23,7 +23,7 @@ namespace MM public: VIRTUAL XTAPI PMMPTE AdvancePte(IN PMMPTE Pte, IN ULONG Count) = 0; - XTAPI VOID ClearPte(IN PHARDWARE_PTE PtePointer); + XTAPI VOID ClearPte(IN PMMPTE PtePointer); XTAPI ULONG GetEmptyPteList(VOID); VIRTUAL XTAPI ULONG_PTR GetNextEntry(IN PMMPTE Pte) = 0; VIRTUAL XTAPI PMMPTE GetNextPte(IN PMMPTE Pte) = 0; @@ -39,15 +39,15 @@ namespace MM VIRTUAL XTAPI ULONG GetPteSize(VOID) = 0; XTAPI PVOID GetPteVirtualAddress(IN PMMPTE PtePointer); VIRTUAL XTAPI VOID InitializePageMapInfo(VOID) = 0; - VIRTUAL XTAPI BOOLEAN PteValid(IN PHARDWARE_PTE PtePointer) = 0; + VIRTUAL XTAPI BOOLEAN PteValid(IN PMMPTE PtePointer) = 0; VIRTUAL XTAPI VOID SetNextEntry(IN PMMPTE Pte, IN ULONG_PTR Value) = 0; VIRTUAL XTAPI VOID SetOneEntry(IN PMMPTE Pte, IN BOOLEAN Value) = 0; - VIRTUAL XTAPI VOID SetPte(IN PHARDWARE_PTE PtePointer, + VIRTUAL XTAPI VOID SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable) = 0; - VIRTUAL XTAPI VOID SetPteCaching(IN PHARDWARE_PTE PtePointer, + VIRTUAL XTAPI VOID SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough) = 0; } PAGEMAP, *PPAGEMAP; @@ -62,15 +62,15 @@ namespace MM XTAPI BOOLEAN GetOneEntry(IN PMMPTE Pte); XTAPI ULONG GetPteSize(VOID); XTAPI VOID InitializePageMapInfo(VOID); - XTAPI BOOLEAN PteValid(IN PHARDWARE_PTE PtePointer); + XTAPI BOOLEAN PteValid(IN PMMPTE PtePointer); XTAPI VOID SetNextEntry(IN PMMPTE Pte, IN ULONG_PTR Value); XTAPI VOID SetOneEntry(IN PMMPTE Pte, IN BOOLEAN Value); - XTAPI VOID SetPte(IN PHARDWARE_PTE PtePointer, + XTAPI VOID SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable); - XTAPI VOID SetPteCaching(IN PHARDWARE_PTE PtePointer, + XTAPI VOID SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough); }; @@ -85,15 +85,15 @@ namespace MM XTAPI BOOLEAN GetOneEntry(IN PMMPTE Pte); XTAPI ULONG GetPteSize(VOID); XTAPI VOID InitializePageMapInfo(VOID); - XTAPI BOOLEAN PteValid(IN PHARDWARE_PTE PtePointer); + XTAPI BOOLEAN PteValid(IN PMMPTE PtePointer); XTAPI VOID SetNextEntry(IN PMMPTE Pte, IN ULONG_PTR Value); XTAPI VOID SetOneEntry(IN PMMPTE Pte, IN BOOLEAN Value); - XTAPI VOID SetPte(IN PHARDWARE_PTE PtePointer, + XTAPI VOID SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable); - XTAPI VOID SetPteCaching(IN PHARDWARE_PTE PtePointer, + XTAPI VOID SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough); }; diff --git a/xtoskrnl/includes/mm/paging.hh b/xtoskrnl/includes/mm/paging.hh index f7b7e53..76adf99 100644 --- a/xtoskrnl/includes/mm/paging.hh +++ b/xtoskrnl/includes/mm/paging.hh @@ -23,7 +23,7 @@ namespace MM public: STATIC XTAPI PMMPTE AdvancePte(IN PMMPTE Pte, IN ULONG Count); - STATIC XTAPI VOID ClearPte(IN PHARDWARE_PTE PtePointer); + STATIC XTAPI VOID ClearPte(IN PMMPTE PtePointer); STATIC XTAPI VOID FlushTlb(VOID); STATIC XTAPI ULONG_PTR GetEmptyPteList(VOID); STATIC XTAPI ULONG_PTR GetNextEntry(IN PMMPTE Pte); @@ -34,15 +34,15 @@ namespace MM STATIC XTAPI PMMPTE GetPteAddress(IN PVOID Address); STATIC XTAPI ULONG GetPteSize(VOID); STATIC XTAPI VOID InitializePageMapSupport(VOID); - STATIC XTAPI BOOLEAN PteValid(IN PHARDWARE_PTE PtePointer); + STATIC XTAPI BOOLEAN PteValid(IN PMMPTE PtePointer); STATIC XTAPI VOID SetNextEntry(IN PMMPTE Pte, IN ULONG_PTR Value); STATIC XTAPI VOID SetOneEntry(IN PMMPTE Pte, IN BOOLEAN Value); - STATIC XTAPI VOID SetPte(IN PHARDWARE_PTE PtePointer, + STATIC XTAPI VOID SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable); - STATIC XTAPI VOID SetPteCaching(IN PHARDWARE_PTE PtePointer, + STATIC XTAPI VOID SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough); STATIC XTFASTCALL VOID ZeroPages(IN PVOID Address, diff --git a/xtoskrnl/mm/amd64/pagemap.cc b/xtoskrnl/mm/amd64/pagemap.cc index 3f16933..be54c3f 100644 --- a/xtoskrnl/mm/amd64/pagemap.cc +++ b/xtoskrnl/mm/amd64/pagemap.cc @@ -43,14 +43,10 @@ MM::PageMap::AdvancePte(IN PMMPTE Pte, */ XTAPI VOID -MM::PageMap::ClearPte(IN PHARDWARE_PTE PtePointer) +MM::PageMap::ClearPte(IN PMMPTE PtePointer) { /* Clear PTE */ - PtePointer->CacheDisable = 0; - PtePointer->PageFrameNumber = 0; - PtePointer->Valid = 0; - PtePointer->Writable = 0; - PtePointer->WriteThrough = 0; + PtePointer->Long = 0; } /** @@ -432,10 +428,10 @@ MM::PageMap::GetPxeVirtualAddress(IN PMMPXE PxePointer) */ XTAPI BOOLEAN -MM::PageMap::PteValid(IN PHARDWARE_PTE PtePointer) +MM::PageMap::PteValid(IN PMMPTE PtePointer) { /* Check if PTE is valid */ - return (BOOLEAN)PtePointer->Valid; + return (BOOLEAN)PtePointer->Hardware.Valid; } /** @@ -500,14 +496,14 @@ MM::PageMap::SetOneEntry(IN PMMPTE Pte, */ XTAPI VOID -MM::PageMap::SetPte(IN PHARDWARE_PTE PtePointer, +MM::PageMap::SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable) { /* Set PTE */ - PtePointer->PageFrameNumber = PageFrameNumber; - PtePointer->Valid = 1; - PtePointer->Writable = Writable; + PtePointer->Hardware.PageFrameNumber = PageFrameNumber; + PtePointer->Hardware.Valid = 1; + PtePointer->Hardware.Writable = Writable; } /** @@ -528,13 +524,13 @@ MM::PageMap::SetPte(IN PHARDWARE_PTE PtePointer, */ XTAPI VOID -MM::PageMap::SetPteCaching(IN PHARDWARE_PTE PtePointer, +MM::PageMap::SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough) { /* Set caching attributes */ - PtePointer->CacheDisable = CacheDisable; - PtePointer->WriteThrough = WriteThrough; + PtePointer->Hardware.CacheDisable = CacheDisable; + PtePointer->Hardware.WriteThrough = WriteThrough; } /** diff --git a/xtoskrnl/mm/hlpool.cc b/xtoskrnl/mm/hlpool.cc index 8728b8f..9c1d612 100644 --- a/xtoskrnl/mm/hlpool.cc +++ b/xtoskrnl/mm/hlpool.cc @@ -170,7 +170,7 @@ MM::HardwarePool::MapHardwareMemory(IN PHYSICAL_ADDRESS PhysicalAddress, { PVOID BaseAddress, ReturnAddress; PFN_NUMBER MappedPages; - PHARDWARE_PTE PtePointer; + PMMPTE PtePointer; /* Initialize variables */ BaseAddress = HardwareHeapStart; @@ -189,7 +189,7 @@ MM::HardwarePool::MapHardwareMemory(IN PHYSICAL_ADDRESS PhysicalAddress, } /* Get PTE pointer and advance to next page */ - PtePointer = (PHARDWARE_PTE)MM::Paging::GetPteAddress(ReturnAddress); + PtePointer = MM::Paging::GetPteAddress(ReturnAddress); ReturnAddress = (PVOID)((ULONG_PTR)ReturnAddress + MM_PAGE_SIZE); /* Check if PTE is valid */ @@ -219,7 +219,7 @@ MM::HardwarePool::MapHardwareMemory(IN PHYSICAL_ADDRESS PhysicalAddress, while(MappedPages--) { /* Get PTE pointer */ - PtePointer = (PHARDWARE_PTE)MM::Paging::GetPteAddress(BaseAddress); + PtePointer = MM::Paging::GetPteAddress(BaseAddress); /* Fill the PTE */ MM::Paging::SetPte(PtePointer, (PFN_NUMBER)(PhysicalAddress.QuadPart >> MM_PAGE_SHIFT), TRUE); @@ -259,18 +259,18 @@ VOID MM::HardwarePool::MarkHardwareMemoryWriteThrough(IN PVOID VirtualAddress, IN PFN_NUMBER PageCount) { - PHARDWARE_PTE PtePointer; + PMMPTE PtePointer; PFN_NUMBER Page; /* Get PTE address from virtual address */ - PtePointer = (PHARDWARE_PTE)MM::Paging::GetPteAddress(VirtualAddress); + PtePointer = MM::Paging::GetPteAddress(VirtualAddress); /* Iterate through mapped pages */ for(Page = 0; Page < PageCount; Page++) { /* Mark pages as CD/WT */ MM::Paging::SetPteCaching(PtePointer, TRUE, TRUE); - PtePointer++; + MM::Paging::GetNextEntry(PtePointer); } } @@ -296,10 +296,10 @@ MM::HardwarePool::RemapHardwareMemory(IN PVOID VirtualAddress, IN PHYSICAL_ADDRESS PhysicalAddress, IN BOOLEAN FlushTlb) { - PHARDWARE_PTE PtePointer; + PMMPTE PtePointer; /* Get PTE address from virtual address */ - PtePointer = (PHARDWARE_PTE)MM::Paging::GetPteAddress(VirtualAddress); + PtePointer = MM::Paging::GetPteAddress(VirtualAddress); /* Remap the PTE */ MM::Paging::SetPte(PtePointer, (PFN_NUMBER)(PhysicalAddress.QuadPart >> MM_PAGE_SHIFT), TRUE); @@ -334,7 +334,7 @@ MM::HardwarePool::UnmapHardwareMemory(IN PVOID VirtualAddress, IN PFN_NUMBER PageCount, IN BOOLEAN FlushTlb) { - PHARDWARE_PTE PtePointer; + PMMPTE PtePointer; PFN_NUMBER Page; /* Check if address is valid hardware memory */ @@ -348,7 +348,7 @@ MM::HardwarePool::UnmapHardwareMemory(IN PVOID VirtualAddress, VirtualAddress = (PVOID)((ULONG_PTR)VirtualAddress & ~(MM_PAGE_SIZE - 1)); /* Get PTE address from virtual address */ - PtePointer = (PHARDWARE_PTE)MM::Paging::GetPteAddress(VirtualAddress); + PtePointer = MM::Paging::GetPteAddress(VirtualAddress); /* Iterate through mapped pages */ for(Page = 0; Page < PageCount; Page++) diff --git a/xtoskrnl/mm/i686/pagemap.cc b/xtoskrnl/mm/i686/pagemap.cc index 81d5f10..d30fa68 100644 --- a/xtoskrnl/mm/i686/pagemap.cc +++ b/xtoskrnl/mm/i686/pagemap.cc @@ -21,7 +21,7 @@ */ XTAPI VOID -MM::PageMap::ClearPte(IN PHARDWARE_PTE PtePointer) +MM::PageMap::ClearPte(IN PMMPTE PtePointer) { /* Clear PTE */ PtePointer->Long = 0; @@ -339,10 +339,10 @@ MM::PageMapBasic::InitializePageMapInfo(VOID) */ XTAPI BOOLEAN -MM::PageMapBasic::PteValid(IN PHARDWARE_PTE PtePointer) +MM::PageMapBasic::PteValid(IN PMMPTE PtePointer) { /* Check if PTE is valid */ - return (BOOLEAN)PtePointer->Pml2.Valid; + return (BOOLEAN)PtePointer->Pml2.Hardware.Valid; } /** @@ -407,14 +407,14 @@ MM::PageMapBasic::SetOneEntry(IN PMMPTE Pte, */ XTAPI VOID -MM::PageMapBasic::SetPte(IN PHARDWARE_PTE PtePointer, +MM::PageMapBasic::SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable) { /* Set PTE */ - PtePointer->Pml2.PageFrameNumber = PageFrameNumber; - PtePointer->Pml2.Valid = 1; - PtePointer->Pml2.Writable = Writable; + PtePointer->Pml2.Hardware.PageFrameNumber = PageFrameNumber; + PtePointer->Pml2.Hardware.Valid = 1; + PtePointer->Pml2.Hardware.Writable = Writable; } /** @@ -435,13 +435,13 @@ MM::PageMapBasic::SetPte(IN PHARDWARE_PTE PtePointer, */ XTAPI VOID -MM::PageMapBasic::SetPteCaching(IN PHARDWARE_PTE PtePointer, +MM::PageMapBasic::SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough) { /* Set caching attributes */ - PtePointer->Pml2.CacheDisable = CacheDisable; - PtePointer->Pml2.WriteThrough = WriteThrough; + PtePointer->Pml2.Hardware.CacheDisable = CacheDisable; + PtePointer->Pml2.Hardware.WriteThrough = WriteThrough; } /** @@ -573,9 +573,9 @@ MM::PageMapXpa::InitializePageMapInfo(VOID) */ XTAPI BOOLEAN -MM::PageMapXpa::PteValid(IN PHARDWARE_PTE PtePointer) +MM::PageMapXpa::PteValid(IN PMMPTE PtePointer) { - return (BOOLEAN)PtePointer->Pml3.Valid; + return (BOOLEAN)PtePointer->Pml3.Hardware.Valid; } /** @@ -640,14 +640,14 @@ MM::PageMapXpa::SetOneEntry(IN PMMPTE Pte, */ XTAPI VOID -MM::PageMapXpa::SetPte(IN PHARDWARE_PTE PtePointer, +MM::PageMapXpa::SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable) { /* Set PTE */ - PtePointer->Pml3.PageFrameNumber = PageFrameNumber; - PtePointer->Pml3.Valid = 1; - PtePointer->Pml3.Writable = Writable; + PtePointer->Pml3.Hardware.PageFrameNumber = PageFrameNumber; + PtePointer->Pml3.Hardware.Valid = 1; + PtePointer->Pml3.Hardware.Writable = Writable; } /** @@ -668,11 +668,11 @@ MM::PageMapXpa::SetPte(IN PHARDWARE_PTE PtePointer, */ XTAPI VOID -MM::PageMapXpa::SetPteCaching(IN PHARDWARE_PTE PtePointer, +MM::PageMapXpa::SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough) { /* Set caching attributes */ - PtePointer->Pml3.CacheDisable = CacheDisable; - PtePointer->Pml3.WriteThrough = WriteThrough; + PtePointer->Pml3.Hardware.CacheDisable = CacheDisable; + PtePointer->Pml3.Hardware.WriteThrough = WriteThrough; } diff --git a/xtoskrnl/mm/paging.cc b/xtoskrnl/mm/paging.cc index 9bd9a2d..41f060b 100644 --- a/xtoskrnl/mm/paging.cc +++ b/xtoskrnl/mm/paging.cc @@ -43,7 +43,7 @@ MM::Paging::AdvancePte(IN PMMPTE Pte, */ XTAPI VOID -MM::Paging::ClearPte(IN PHARDWARE_PTE PtePointer) +MM::Paging::ClearPte(IN PMMPTE PtePointer) { /* Clear PTE */ PmlRoutines->ClearPte(PtePointer); @@ -312,7 +312,7 @@ MM::Paging::InitializePageMapSupport(VOID) */ XTAPI BOOLEAN -MM::Paging::PteValid(IN PHARDWARE_PTE PtePointer) +MM::Paging::PteValid(IN PMMPTE PtePointer) { /* Check if PTE is valid */ return PmlRoutines->PteValid(PtePointer); @@ -380,7 +380,7 @@ MM::Paging::SetOneEntry(IN PMMPTE Pte, */ XTAPI VOID -MM::Paging::SetPte(IN PHARDWARE_PTE PtePointer, +MM::Paging::SetPte(IN PMMPTE PtePointer, IN PFN_NUMBER PageFrameNumber, IN BOOLEAN Writable) { @@ -406,7 +406,7 @@ MM::Paging::SetPte(IN PHARDWARE_PTE PtePointer, */ XTAPI VOID -MM::Paging::SetPteCaching(IN PHARDWARE_PTE PtePointer, +MM::Paging::SetPteCaching(IN PMMPTE PtePointer, IN BOOLEAN CacheDisable, IN BOOLEAN WriteThrough) {