From d602038858ccda0c8751d683695f4061688da7a0 Mon Sep 17 00:00:00 2001 From: Aiken Harris Date: Mon, 18 Aug 2025 00:10:32 +0200 Subject: [PATCH] Temporarily disable LA57 paging --- xtldr/modules/xtos_o/amd64/memory.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/xtldr/modules/xtos_o/amd64/memory.c b/xtldr/modules/xtos_o/amd64/memory.c index 91349c8..705ea16 100644 --- a/xtldr/modules/xtos_o/amd64/memory.c +++ b/xtldr/modules/xtos_o/amd64/memory.c @@ -43,13 +43,14 @@ XtpDeterminePagingLevel(IN CONST PWCHAR Parameters) /* Query CPUID */ ArCpuId(&CpuRegisters); - /* Check if eXtended Physical Addressing (XPA) is enabled and if LA57 is supported by the CPU */ - if((CpuRegisters.Ecx & CPUID_FEATURES_ECX_LA57) && - !(XtLdrProtocol->BootUtil.GetBooleanParameter(Parameters, L"NOXPA"))) - { - /* Enable LA57 (PML5) */ - return 5; - } + // TODO: Uncomment the following code when LA57 support is implemented in the bootloader + // /* Check if eXtended Physical Addressing (XPA) is enabled and if LA57 is supported by the CPU */ + // if((CpuRegisters.Ecx & CPUID_FEATURES_ECX_LA57) && + // !(XtLdrProtocol->BootUtil.GetBooleanParameter(Parameters, L"NOXPA"))) + // { + // /* Enable LA57 (PML5) */ + // return 4; + // } } /* Disable LA57 and use PML4 by default */