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This is 'Processor Block'
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This commit is contained in:
Rafal Kupiec 2023-02-01 22:02:07 +01:00
parent 3522539d4b
commit dc1a94b982
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
2 changed files with 6 additions and 6 deletions
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2
sdk/xtdk/i686/ketypes.h
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@ -26,7 +26,7 @@
#define KGDT_R3_CODE 0x0018
#define KGDT_R3_DATA 0x0020
#define KGDT_SYS_TSS 0x0028
#define KGDT_R0_PCR 0x0030
#define KGDT_R0_PRCB 0x0030
#define KGDT_R3_TEB 0x0038
#define KGDT_VDM_TILE 0x0040
#define KGDT_R0_LDT 0x0048

10
xtoskrnl/ar/i686/procsup.c
View File

@ -54,7 +54,7 @@ ArInitializeProcessor(VOID)
ArLoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Load FS segment */
ArLoadSegment(SEGMENT_FS, KGDT_R0_PCR);
ArLoadSegment(SEGMENT_FS, KGDT_R0_PRCB);
/* Enter passive IRQ level */
ProcessorBlock->Irql = PASSIVE_LEVEL;
@ -83,7 +83,7 @@ ArpInitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_TEB, 0x0, 0xFFF, KGDT_TYPE_DATA | KGDT_DESCRIPTOR_ACCESSED, KGDT_DPL_USER, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_LDT, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDM_TILE, 0x0400, 0xFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_PCR, (ULONG_PTR)ProcessorBlock, sizeof(KPROCESSOR_BLOCK), KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_PRCB, (ULONG_PTR)ProcessorBlock, sizeof(KPROCESSOR_BLOCK), KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_SYS_TSS, (ULONG_PTR)ProcessorBlock->TssBase, sizeof(KTSS) - 1, I686_TSS, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_DF_TSS, 0x20000, 0xFFFF, I686_TSS, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_NMI_TSS, 0x20000, 0xFFFF, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 0);
@ -147,7 +147,7 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKTSS Tss,
IN PVOID DpcStack)
{
/* Fill PCR with zeroes */
/* Fill processor block with zeroes */
RtlZeroMemory(ProcessorBlock, sizeof(KPROCESSOR_BLOCK));
/* Set processor block and processor control block */
@ -266,7 +266,7 @@ ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock)
Tss->Cs = KGDT_R0_CODE;
Tss->Ds = KGDT_R3_DATA | RPL_MASK;
Tss->Es = KGDT_R3_DATA | RPL_MASK;
Tss->Fs = KGDT_R0_PCR;
Tss->Fs = KGDT_R0_PRCB;
Tss->Ss0 = KGDT_R0_DATA;
ArStoreSegment(SEGMENT_SS, (PVOID)&Tss->Ss);
@ -435,7 +435,7 @@ ArpSetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock)
Tss->Cs = KGDT_R0_CODE;
Tss->Ds = KGDT_R3_DATA | RPL_MASK;
Tss->Es = KGDT_R3_DATA | RPL_MASK;
Tss->Fs = KGDT_R0_PCR;
Tss->Fs = KGDT_R0_PRCB;
ArStoreSegment(SEGMENT_SS, (PVOID)&Tss->Ss);
/* Setup NMI TSS entry in Global Descriptor Table */