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Split PTE implementation per architecture
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This commit is contained in:
Aiken Harris
2025-12-16 14:08:32 +01:00
parent 7f0ca6a948
commit dc23f91110
8 changed files with 165 additions and 104 deletions
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1
xtoskrnl/CMakeLists.txt
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@@ -53,6 +53,7 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ke/timer.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pagemap.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/paging.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pte.cc
${XTOSKRNL_SOURCE_DIR}/mm/data.cc
${XTOSKRNL_SOURCE_DIR}/mm/hlpool.cc
${XTOSKRNL_SOURCE_DIR}/mm/kpool.cc

2
xtoskrnl/includes/mm.hh
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@@ -13,11 +13,11 @@
#include XTOS_ARCH_HEADER(mm, pagemap.hh)
#include XTOS_ARCH_HEADER(mm, paging.hh)
#include XTOS_ARCH_HEADER(mm, pte.hh)
#include <mm/hlpool.hh>
#include <mm/kpool.hh>
#include <mm/mmgr.hh>
#include <mm/pfn.hh>
#include <mm/pte.hh>
#endif /* __XTOSKRNL_MM_HH */

40
xtoskrnl/includes/mm/amd64/pte.hh Normal file
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@@ -0,0 +1,40 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/mm/amd64/pte.hh
* DESCRIPTION: Page table entry (PTE) for AMD64 support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_MM_AMD64_PTE_HH
#define __XTOSKRNL_MM_AMD64_PTE_HH
#include <xtos.hh>
/* Memory Manager */
namespace MM
{
class Pte
{
public:
STATIC XTAPI ULONG GetPtesPerPage(VOID);
STATIC XTAPI VOID MapP5E(PVOID StartAddress,
PVOID EndAddress,
PMMP5E TemplateP5e);
STATIC XTAPI VOID MapPDE(PVOID StartAddress,
PVOID EndAddress,
PMMPDE TemplatePde);
STATIC XTAPI VOID MapPPE(PVOID StartAddress,
PVOID EndAddress,
PMMPPE TemplatePpe);
STATIC XTAPI VOID MapPTE(PVOID StartAddress,
PVOID EndAddress,
PMMPTE TemplatePte);
STATIC XTAPI VOID MapPXE(PVOID StartAddress,
PVOID EndAddress,
PMMPXE TemplatePxe);
};
}
#endif /* __XTOSKRNL_MM_AMD64_PTE_HH */

8
xtoskrnl/includes/mm/i686/pagemap.hh
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@@ -1,13 +1,13 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/mm/pagemap.hh
* FILE: xtoskrnl/includes/mm/i686/pagemap.hh
* DESCRIPTION: Low-level support for page map manipulation
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_MM_PAGEMAP_HH
#define __XTOSKRNL_MM_PAGEMAP_HH
#ifndef __XTOSKRNL_MM_I686_PAGEMAP_HH
#define __XTOSKRNL_MM_I686_PAGEMAP_HH
#include <xtos.hh>
@@ -109,4 +109,4 @@ namespace MM
};
}
#endif /* __XTOSKRNL_MM_PAGEMAP_HH */
#endif /* __XTOSKRNL_MM_I686_PAGEMAP_HH */

10
xtoskrnl/includes/mm/pte.hh → xtoskrnl/includes/mm/i686/pte.hh
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@@ -1,13 +1,13 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/mm/pte.hh
* DESCRIPTION: Page table entry (PTE) support
* FILE: xtoskrnl/includes/mm/i686/pte.hh
* DESCRIPTION: Page table entry (PTE) for i686 support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_MM_PTE_HH
#define __XTOSKRNL_MM_PTE_HH
#ifndef __XTOSKRNL_MM_I686_PTE_HH
#define __XTOSKRNL_MM_I686_PTE_HH
#include <xtos.hh>
@@ -37,4 +37,4 @@ namespace MM
};
}
#endif /* __XTOSKRNL_MM_PTE_HH */
#endif /* __XTOSKRNL_MM_I686_PTE_HH */

104
xtoskrnl/mm/amd64/pte.cc Normal file
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@@ -0,0 +1,104 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/mm/amd64/pte.cc
* DESCRIPTION: Page Table Entry (PTE) for AMD64 support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.hh>
/**
* Maps a range of virtual addresses at the P5E (PML5) level.
*
* @param StartAddress
* The beginning of the virtual address range to map.
*
* @param EndAddress
* The end of the virtual address range to map.
*
* @param TemplateP5e
* A template P5E to use for creating new entries.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::Pte::MapP5E(PVOID StartAddress,
PVOID EndAddress,
PMMP5E TemplateP5e)
{
PMMP5E EndSpace, PointerP5e;
/* Get P5E addresses */
PointerP5e = MM::Paging::GetP5eAddress(StartAddress);
EndSpace = MM::Paging::GetP5eAddress(EndAddress);
/* Iterate over all P5Es */
while(PointerP5e <= EndSpace)
{
/* Check if P5E is already mapped */
if(!MM::Paging::PteValid(PointerP5e))
{
/* Map P5E */
MM::Paging::SetPte(TemplateP5e, MM::Pfn::AllocateBootstrapPages(1), 0);
*PointerP5e = *TemplateP5e;
/* Clear the page table */
RtlZeroMemory(MM::Paging::GetPteVirtualAddress(PointerP5e), MM_PAGE_SIZE);
}
/* Get next table entry */
PointerP5e = MM::Paging::GetNextPte(PointerP5e);
}
}
/**
* Maps a range of virtual addresses at the PXE (PML4) level.
*
* @param StartAddress
* The beginning of the virtual address range to map.
*
* @param EndAddress
* The end of the virtual address range to map.
*
* @param TemplatePxe
* A template PXE to use for creating new entries.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::Pte::MapPXE(PVOID StartAddress,
PVOID EndAddress,
PMMPXE TemplatePxe)
{
PMMPXE EndSpace, PointerPxe;
/* Get PXE addresses */
PointerPxe = MM::Paging::GetPxeAddress(StartAddress);
EndSpace = MM::Paging::GetPxeAddress(EndAddress);
/* Iterate over all PTEs */
while(PointerPxe <= EndSpace)
{
/* Check if PTE is already mapped */
if(!MM::Paging::PteValid(PointerPxe))
{
/* Map PTE */
MM::Paging::SetPte(TemplatePxe, MM::Pfn::AllocateBootstrapPages(1), 0);
*PointerPxe = *TemplatePxe;
/* Clear the page table */
RtlZeroMemory(MM::Paging::GetPteVirtualAddress(PointerPxe), MM_PAGE_SIZE);
}
/* Get next table entry */
PointerPxe = MM::Paging::GetNextPte(PointerPxe);
}
}

10
xtoskrnl/mm/i686/pte.cc Normal file
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@@ -0,0 +1,10 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/mm/i686/pte.cc
* DESCRIPTION: Page Table Entry (PTE) for i686 support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.hh>

94
xtoskrnl/mm/pte.cc
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@@ -24,53 +24,6 @@ MM::Pte::GetPtesPerPage(VOID)
return MM_PAGE_SIZE / MM::Paging::GetPteSize();
}
/**
* Maps a range of virtual addresses at the P5E (PML5) level.
*
* @param StartAddress
* The beginning of the virtual address range to map.
*
* @param EndAddress
* The end of the virtual address range to map.
*
* @param TemplateP5e
* A template P5E to use for creating new entries.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::Pte::MapP5E(PVOID StartAddress,
PVOID EndAddress,
PMMP5E TemplateP5e)
{
PMMP5E EndSpace, PointerP5e;
/* Get P5E addresses */
PointerP5e = MM::Paging::GetP5eAddress(StartAddress);
EndSpace = MM::Paging::GetP5eAddress(EndAddress);
/* Iterate over all P5Es */
while(PointerP5e <= EndSpace)
{
/* Check if P5E is already mapped */
if(!MM::Paging::PteValid(PointerP5e))
{
/* Map P5E */
MM::Paging::SetPte(TemplateP5e, MM::Pfn::AllocateBootstrapPages(1), 0);
*PointerP5e = *TemplateP5e;
/* Clear the page table */
RtlZeroMemory(MM::Paging::GetPteVirtualAddress(PointerP5e), MM_PAGE_SIZE);
}
/* Get next table entry */
PointerP5e = MM::Paging::GetNextPte(PointerP5e);
}
}
/**
* Maps a range of virtual addresses at the PDE (Page Directory Entry) level.
*
@@ -211,50 +164,3 @@ MM::Pte::MapPTE(PVOID StartAddress,
PointerPte = MM::Paging::GetNextPte(PointerPte);
}
}
/**
* Maps a range of virtual addresses at the PXE (PML4) level.
*
* @param StartAddress
* The beginning of the virtual address range to map.
*
* @param EndAddress
* The end of the virtual address range to map.
*
* @param TemplatePxe
* A template PXE to use for creating new entries.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MM::Pte::MapPXE(PVOID StartAddress,
PVOID EndAddress,
PMMPXE TemplatePxe)
{
PMMPXE EndSpace, PointerPxe;
/* Get PXE addresses */
PointerPxe = MM::Paging::GetPxeAddress(StartAddress);
EndSpace = MM::Paging::GetPxeAddress(EndAddress);
/* Iterate over all PTEs */
while(PointerPxe <= EndSpace)
{
/* Check if PTE is already mapped */
if(!MM::Paging::PteValid(PointerPxe))
{
/* Map PTE */
MM::Paging::SetPte(TemplatePxe, MM::Pfn::AllocateBootstrapPages(1), 0);
*PointerPxe = *TemplatePxe;
/* Clear the page table */
RtlZeroMemory(MM::Paging::GetPteVirtualAddress(PointerPxe), MM_PAGE_SIZE);
}
/* Get next table entry */
PointerPxe = MM::Paging::GetNextPte(PointerPxe);
}
}