From e94e50b5d9eee72c3a4aede810809d75c23b9b7a Mon Sep 17 00:00:00 2001 From: belliash Date: Thu, 26 Jan 2023 20:08:57 +0100 Subject: [PATCH] Implement HlLoadInterruptDescriptorTable() intrinsics for loading IDT --- sdk/xtdk/amd64/hlfuncs.h | 4 ++++ sdk/xtdk/i686/hlfuncs.h | 4 ++++ xtoskrnl/hl/amd64/cpufunc.c | 20 ++++++++++++++++++++ xtoskrnl/hl/i686/cpufunc.c | 20 ++++++++++++++++++++ 4 files changed, 48 insertions(+) diff --git a/sdk/xtdk/amd64/hlfuncs.h b/sdk/xtdk/amd64/hlfuncs.h index ccdcc6d..6c453e6 100644 --- a/sdk/xtdk/amd64/hlfuncs.h +++ b/sdk/xtdk/amd64/hlfuncs.h @@ -63,6 +63,10 @@ XTCDECL VOID HlLoadGlobalDescriptorTable(IN PVOID Source); +XTCDECL +VOID +HlLoadInterruptDescriptorTable(IN PVOID Source); + XTCDECL VOID HlLoadSegment(IN USHORT Segment, diff --git a/sdk/xtdk/i686/hlfuncs.h b/sdk/xtdk/i686/hlfuncs.h index c7d0877..a77ce77 100644 --- a/sdk/xtdk/i686/hlfuncs.h +++ b/sdk/xtdk/i686/hlfuncs.h @@ -63,6 +63,10 @@ XTCDECL VOID HlLoadGlobalDescriptorTable(IN PVOID Source); +XTCDECL +VOID +HlLoadInterruptDescriptorTable(IN PVOID Source); + XTCDECL VOID HlLoadSegment(IN USHORT Segment, diff --git a/xtoskrnl/hl/amd64/cpufunc.c b/xtoskrnl/hl/amd64/cpufunc.c index 562b0d6..f2c18a5 100644 --- a/xtoskrnl/hl/amd64/cpufunc.c +++ b/xtoskrnl/hl/amd64/cpufunc.c @@ -256,6 +256,26 @@ HlLoadGlobalDescriptorTable(IN PVOID Source) : "memory"); } +/** + * Loads the values in the source operand into the interrupt descriptor table register (IDTR). + * + * @param Source + * Specifies a memory location that contains the base address of IDT. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTCDECL +VOID +HlLoadInterruptDescriptorTable(IN PVOID Source) +{ + asm volatile("lidt %0" + : + : "m" (*(PSHORT)Source) + : "memory"); +} + /** * Loads source data into specified segment. * diff --git a/xtoskrnl/hl/i686/cpufunc.c b/xtoskrnl/hl/i686/cpufunc.c index 6b86b00..286af7c 100644 --- a/xtoskrnl/hl/i686/cpufunc.c +++ b/xtoskrnl/hl/i686/cpufunc.c @@ -256,6 +256,26 @@ HlLoadGlobalDescriptorTable(IN PVOID Source) : "memory"); } +/** + * Loads the values in the source operand into the interrupt descriptor table register (IDTR). + * + * @param Source + * Specifies a memory location that contains the base address of IDT. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTCDECL +VOID +HlLoadInterruptDescriptorTable(IN PVOID Source) +{ + asm volatile("lidt %0" + : + : "m" (*(PSHORT)Source) + : "memory"); +} + /** * Loads source data into specified segment. *