Expand CR4, MSR, and EFER register definitions
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@@ -53,6 +53,8 @@
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#define CR4_CET 0x00800000
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#define CR4_PKS 0x01000000
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#define CR4_UINTR 0x02000000
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#define CR4_LASS 0x08000000
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#define CR4_LAM_SUP 0x10000000
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/* Descriptors size */
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#define GDT_ENTRIES 128
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@@ -91,6 +93,7 @@
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#define X86_MSR_FSBASE 0xC0000100
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#define X86_MSR_GSBASE 0xC0000101
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#define X86_MSR_KERNEL_GSBASE 0xC0000102
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#define X86_MSR_TSC_AUX 0xC0000103
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/* Processor features in the EFER MSR */
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#define X86_MSR_EFER_SCE (1 << 0)
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@@ -98,6 +101,10 @@
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#define X86_MSR_EFER_LMA (1 << 10)
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#define X86_MSR_EFER_NXE (1 << 11)
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#define X86_MSR_EFER_SVME (1 << 12)
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#define X86_EFER_LMSLE (1 << 13)
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#define X86_EFER_FFXSR (1 << 14)
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#define X86_EFER_TCE (1 << 15)
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#define X86_EFER_AUTOIBRS (1 << 21)
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/* X86 EFLAG bit masks definitions */
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#define X86_EFLAGS_NF_MASK 0x00000000 /* None */
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