From f20ab3e52ed6c4f4d010e0ac3653522759b0659f Mon Sep 17 00:00:00 2001
From: belliash <belliash@codingworkshop.eu.org>
Date: Fri, 20 Jan 2023 20:24:05 +0100
Subject: [PATCH] Implement HlLoadTaskRegister() for loading TSS segment
 selector into task register

---
 sdk/xtdk/amd64/hlfuncs.h    |  4 ++++
 sdk/xtdk/i686/hlfuncs.h     |  4 ++++
 xtoskrnl/hl/amd64/cpufunc.c | 19 +++++++++++++++++++
 xtoskrnl/hl/i686/cpufunc.c  | 19 +++++++++++++++++++
 4 files changed, 46 insertions(+)

diff --git a/sdk/xtdk/amd64/hlfuncs.h b/sdk/xtdk/amd64/hlfuncs.h
index a38443e..c980ee2 100644
--- a/sdk/xtdk/amd64/hlfuncs.h
+++ b/sdk/xtdk/amd64/hlfuncs.h
@@ -59,6 +59,10 @@ VOID
 HlIoPortOutLong(IN USHORT Port,
                 IN ULONG Value);
 
+XTCDECL
+VOID
+HlLoadTaskRegister(USHORT Source);
+
 XTCDECL
 ULONG_PTR
 HlReadControlRegister(IN USHORT ControlRegister);
diff --git a/sdk/xtdk/i686/hlfuncs.h b/sdk/xtdk/i686/hlfuncs.h
index a66357e..e031f66 100644
--- a/sdk/xtdk/i686/hlfuncs.h
+++ b/sdk/xtdk/i686/hlfuncs.h
@@ -59,6 +59,10 @@ VOID
 HlIoPortOutLong(IN USHORT Port,
                 IN ULONG Value);
 
+XTCDECL
+VOID
+HlLoadTaskRegister(USHORT Source);
+
 XTCDECL
 ULONG_PTR
 HlReadControlRegister(IN USHORT ControlRegister);
diff --git a/xtoskrnl/hl/amd64/cpufunc.c b/xtoskrnl/hl/amd64/cpufunc.c
index 9578cbe..8c4cf78 100644
--- a/xtoskrnl/hl/amd64/cpufunc.c
+++ b/xtoskrnl/hl/amd64/cpufunc.c
@@ -236,6 +236,25 @@ HlIoPortOutLong(IN USHORT Port,
                    "Nd" (Port));
 }
 
+/**
+ * Loads Task Register (TR) with a segment selector that points to TSS.
+ *
+ * @param Source
+ *        Supplies the segment selector in the GDT describing the TSS.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+VOID
+HlLoadTaskRegister(USHORT Source)
+{
+    asm volatile("ltr %0"
+                 :
+                 : "rm" (Source));
+}
+
 /**
  * Reads the specified CPU control register and returns its value.
  *
diff --git a/xtoskrnl/hl/i686/cpufunc.c b/xtoskrnl/hl/i686/cpufunc.c
index 1f6c0f9..a7703a7 100644
--- a/xtoskrnl/hl/i686/cpufunc.c
+++ b/xtoskrnl/hl/i686/cpufunc.c
@@ -236,6 +236,25 @@ HlIoPortOutLong(IN USHORT Port,
                    "Nd" (Port));
 }
 
+/**
+ * Loads Task Register (TR) with a segment selector that points to TSS.
+ *
+ * @param Source
+ *        Supplies the segment selector in the GDT describing the TSS.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+VOID
+HlLoadTaskRegister(USHORT Source)
+{
+    asm volatile("ltr %0"
+                 :
+                 : "rm" (Source));
+}
+
 /**
  * Reads the specified CPU control register and returns its value.
  *