Implement PTE manipulation functions for AMD64 architecture
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@@ -22,6 +22,10 @@ VOID
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MmZeroPages(IN PVOID Address,
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IN ULONG Size);
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XTAPI
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VOID
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MmpClearPte(PHARDWARE_PTE PtePointer);
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XTAPI
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BOOLEAN
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MmpGetExtendedPhysicalAddressingStatus(VOID);
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@@ -50,4 +54,20 @@ XTAPI
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VOID
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MmpInitializeArchitecture(VOID);
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XTAPI
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BOOLEAN
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MmpPteValid(PHARDWARE_PTE PtePointer);
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XTAPI
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VOID
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MmpSetPte(PHARDWARE_PTE PtePointer,
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PFN_NUMBER PageFrameNumber,
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BOOLEAN Writable);
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XTAPI
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VOID
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MmpSetPteCaching(PHARDWARE_PTE PtePointer,
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BOOLEAN CacheDisable,
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BOOLEAN WriteThrough);
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#endif /* __XTOSKRNL_AMD64_MMI_H */
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