Implement PTE manipulation functions for AMD64 architecture

2025-08-17 21:48:28 +02:00
parent c3ece4f317
commit f30d3df5b3
3 changed files with 93 additions and 8 deletions
--- a/xtoskrnl/mm/amd64/globals.c
+++ b/xtoskrnl/mm/amd64/globals.c
@@ -11,16 +11,16 @@

 /* Page mapping routines for systems using 4-level paging (PML4) */
 CMMPAGEMAP_ROUTINES MmpPml4Routines = {
-    // .ClearPte = MmpClearPte,
-    // .PteValid = MmpPml2PteValid,
-    // .SetPteCaching = MmpSetPml2PteCaching,
-    // .SetPte = MmpSetPml2Pte,
+    .ClearPte = MmpClearPte,
+    .PteValid = MmpPteValid,
+    .SetPteCaching = MmpSetPteCaching,
+    .SetPte = MmpSetPte,
 };

 /* Page mapping routines for systems using 5-level paging (PML5) */
 CMMPAGEMAP_ROUTINES MmpPml5Routines = {
-    // .ClearPte = MmpClearPte,
-    // .PteValid = MmpPml3PteValid,
-    // .SetPteCaching = MmpSetPml3PteCaching,
-    // .SetPte = MmpSetPml3Pte,
+    .ClearPte = MmpClearPte,
+    .PteValid = MmpPteValid,
+    .SetPteCaching = MmpSetPteCaching,
+    .SetPte = MmpSetPte,
 };