91 Commits

Author	SHA1	Message	Date
PerikiyoXD	363e100493	Saving processor features in the processor control block ... Fixed correct AMD Family 25 model detection Fixed procedure for saving processor vendor name (previously corrupted) Added a debugging print of the processor identification	2024-05-06 17:55:37 +02:00
Rafal Kupiec	22693a48d3	Rework trap handling assembly code	2024-04-23 15:07:08 +02:00
Rafal Kupiec	a36c02fde8	Use common name for EFLAGS and RFLAGS, regardless the CPU architecture	2024-04-21 22:35:06 +02:00
Rafal Kupiec	92ee74b494	Rework trap handling to access registers	2024-04-19 16:52:37 +02:00
Rafal Kupiec	befa211aa7	Add PFN related structures and definitions	2024-04-08 19:03:58 +02:00
Rafal Kupiec	04e22c127e	Initial memory manager initialization code	2024-04-07 10:26:12 +02:00
Rafal Kupiec	d7b103f85d	Add forward references for PTE related structures	2024-04-03 16:03:17 +02:00
Rafal Kupiec	c6f3422c49	Update PTE related structures	2024-04-03 16:00:26 +02:00
Rafal Kupiec	4b2d8ded72	No parameters are expected, explicitly	2024-02-20 16:55:12 +01:00
Rafal Kupiec	badb16e37d	Add lock queue to processor control block	2024-02-05 19:21:19 +01:00
Rafal Kupiec	af687603d0	Add kernel stack guard pages definition	2024-02-04 19:21:42 +01:00
Rafal Kupiec	5acf8b4abd	Add page size enumeration list	2024-01-18 14:22:51 +01:00
Rafal Kupiec	e64cf4d0aa	Add CR4_LA57 definition	2024-01-14 21:06:02 +01:00
Rafal Kupiec	0d1fcde3a5	Add missing StallScaleFactor to KPROCESSOR_BLOCK	2023-11-28 23:08:35 +01:00
Rafal Kupiec	f6c621c2a6	Basic processor initialization code	2023-11-28 22:31:39 +01:00
Rafal Kupiec	e5adc31af7	Implement basic APIC support, including X2APIC	2023-11-27 22:38:15 +01:00
Rafal Kupiec	4ca4e298f0	Add more PIC/APIC related definitions	2023-11-26 23:35:14 +01:00
Rafal Kupiec	4701351bd7	Add missing SYNC_LEVEL definition	2023-11-25 22:14:45 +01:00
Rafal Kupiec	14a966043e	Add missing Interrupt request level definitions	2023-11-25 18:50:59 +01:00
Rafal Kupiec	0e6bf984a5	Add APIC vector definitions	2023-11-25 18:33:01 +01:00
Rafal Kupiec	55cc62f5a0	Rename KIRQL to KRUNLEVEL type	2023-11-25 00:32:55 +01:00
belliash	a3c28cee73	Initial XTLDR APIC support, finds and maps base APIC address for kernel	2023-11-20 15:18:22 +01:00
belliash	83c0accc5f	Update EFLAGS masks	2023-11-09 16:12:24 +01:00
belliash	362eefc2b3	Fixes in AMD64 version of KepInitializeThreadContext() to get rid of PageFault exception	2023-11-07 15:34:49 +01:00
belliash	91ce0f9947	Compensate missing return address, which is a 4-byte on i686 and an 8-byte on amd64	2023-11-05 20:07:13 +01:00
belliash	f05a262da2	Cleanup XTDK and XTOSKRNL headers	2023-10-29 09:58:47 +01:00
belliash	798e4c1d22	Cleanup MM subsystem headers	2023-10-29 00:52:05 +02:00
belliash	600c86949b	Cleanup RTL subsystem headers	2023-10-29 00:14:01 +02:00
belliash	d920cae481	Fix build by defining more routines used by XTLDR	2023-10-28 23:41:52 +02:00
belliash	ad15c55a39	Cleanup AR subsystem headers	2023-10-28 23:35:34 +02:00
belliash	358b20f1a1	Reorder routines	2023-04-04 22:35:06 +02:00
belliash	10ccf67e8e	Add missing forward declarations	2023-03-14 22:50:32 +01:00
belliash	5677719038	Initialize thread context for AMD64	2023-03-14 17:37:20 +01:00
belliash	fd8eec1d86	Add EFLAGS and THREAD_ENVIRONMENT_BLOCK for amd64	2023-03-05 19:03:34 +01:00
belliash	c5a9253ea8	Implement ArLoadLocalDescriptorTable() routine	2023-03-02 23:04:36 +01:00
belliash	870a6680b0	Add thread information block	2023-03-01 00:14:06 +01:00
belliash	ef23acc3bc	Add Deferred Procedure Call (DPC) and processor power state related structures	2023-02-27 19:58:47 +01:00
belliash	e41de62dab	Implement ArYieldProcessor() routine	2023-02-27 17:28:20 +01:00
belliash	c8428241dd	Add missing headers containing forward references of MM routines	2023-02-20 22:22:32 +01:00
belliash	b1c2b209e3	Implement RtlGetStackLimits() routine	2023-02-15 20:12:58 +01:00
belliash	2e790bd9b2	Add pages related macros and definitions	2023-02-13 23:01:20 +01:00
belliash	e94cb2d3a7	Processor identification structures	2023-02-10 17:14:12 +01:00
belliash	e645cf664c	Set process and thread information in processor control block	2023-02-09 17:30:24 +01:00
belliash	9132c47cd9	Initial process and thread related structures	2023-02-08 23:40:58 +01:00
belliash	c6cadbd655	Initialize MXCSR register	2023-02-05 00:30:12 +01:00
belliash	5eaf7d63a3	Initialize Page Attribute Table	2023-02-05 00:14:34 +01:00
belliash	55cdae7c83	Initialize AMD64 processor registers	2023-02-04 23:40:03 +01:00
belliash	269214ed34	Another improvements to GDT	2023-02-03 18:00:37 +01:00
belliash	19f34d4b17	Cleanup the code	2023-02-02 19:42:57 +01:00
belliash	715f875c4f	Set alignment and packing properly	2023-02-02 17:01:18 +01:00