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26 Commits

Author SHA1 Message Date
a2fe39defd Refine formatting
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2025-09-13 00:12:57 +02:00
7cdfa8f79d Refactor KE subsystem
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2025-09-12 13:11:15 +02:00
0647b853a6 Migrate PO subsystem to C++
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2025-09-11 22:52:40 +02:00
3a11d536d5 Refactor AR subsystem
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2025-09-11 20:23:51 +02:00
96043f3d70 Build SDK
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2025-09-11 20:09:21 +02:00
5f44458e64 Fix calling conventions
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2025-09-11 19:44:00 +02:00
cc632c5ef9 Update kernel exports
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2025-09-11 19:35:38 +02:00
631c260280 Update SpinLock and DPC to use C++ helpers
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2025-09-11 19:23:19 +02:00
1357e92627 Update EX subsystem to use C++ RTL api
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2025-09-11 19:15:52 +02:00
3395934330 Match renamed I/O register helpers
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2025-09-11 19:08:20 +02:00
744fffdd8a Clean up atomic routine declarations
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2025-09-11 19:05:12 +02:00
0a3450f649 Add missing header files
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2025-09-11 18:58:43 +02:00
7d5eab1a8e Remove redundant source list and reuse XTOSKRNL_SOURCE for libxtos
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2025-09-11 18:55:31 +02:00
7674196cc1 Unify sdk library output path
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2025-09-11 18:53:58 +02:00
c160e5ddf2 Improve CMake SDK output handling and linker configuration
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2025-09-11 18:48:22 +02:00
9518e7da8e Migrate RTL subsystem to C++
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2025-09-11 18:28:24 +02:00
e507dd0390 Clean up cmake output directory configuration
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2025-09-11 14:07:20 +02:00
510dccc5dc Add missing forward reference to KeGetInitializationBlock
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2025-09-10 15:38:30 +02:00
17712883c5 Include new KE headers
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2025-09-09 23:24:43 +02:00
5cb6474ade Sync CMakeLists with source tree
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2025-09-09 23:22:37 +02:00
4947f788d5 Migrate KE subsystem to C++
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2025-09-09 23:20:50 +02:00
465a23633e Sync CMakeLists with current source tree
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2025-09-08 22:39:07 +02:00
7c5d6326f8 Migrate EX subsystem to C++
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2025-09-08 22:35:59 +02:00
3f5f57ef12 Remove leftover test code
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2025-09-08 15:44:12 +02:00
4e24b239a4 Fix cmake source path
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2025-09-08 15:40:26 +02:00
c8dc2a1407 Migrate AR subsystem to C++
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2025-09-08 15:29:13 +02:00
136 changed files with 7518 additions and 2576 deletions

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@@ -28,7 +28,7 @@ jobs:
OSCW_ARTIFACTS_USERKEY: ${{ secrets.OSCW_ARTIFACTS_USERKEY }}
run: |
tar -I 'gzip' -cpf ExectOS-$(date +'%Y%m%d')-${GITHUB_SHA:0:10}-${{ matrix.arch }}-${{ matrix.build }}-bin.tar.gz -C build-${{ matrix.arch }}-${{ matrix.build }}/output/binaries .
tar -I 'gzip' -cpf ExectOS-$(date +'%Y%m%d')-${GITHUB_SHA:0:10}-${{ matrix.arch }}-${{ matrix.build }}-lib.tar.gz -C build-${{ matrix.arch }}-${{ matrix.build }}/output/library .
tar -I 'gzip' -cpf ExectOS-$(date +'%Y%m%d')-${GITHUB_SHA:0:10}-${{ matrix.arch }}-${{ matrix.build }}-sdk.tar.gz -C build-${{ matrix.arch }}-${{ matrix.build }}/output/sdk .
tar -I 'gzip' -cpf ExectOS-$(date +'%Y%m%d')-${GITHUB_SHA:0:10}-${{ matrix.arch }}-${{ matrix.build }}-sym.tar.gz -C build-${{ matrix.arch }}-${{ matrix.build }}/output/symbols .
gzip -c build-${{ matrix.arch }}-${{ matrix.build }}/output/disk.img > ExectOS-$(date +'%Y%m%d')-${GITHUB_SHA:0:10}-${{ matrix.arch }}-${{ matrix.build }}.img.gz
artifact_publish "ExectOS-$(date +'%Y%m%d')-${GITHUB_SHA:0:10}-${{ matrix.arch }}-${{ matrix.build }}*.gz" ExectOS

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@@ -55,9 +55,6 @@ add_definitions(-D__XTOS__)
add_definitions(-DXTOS_SOURCE_DIR="${EXECTOS_SOURCE_DIR}")
add_definitions(-DXTOS_BINARY_DIR="${EXECTOS_BINARY_DIR}")
# Set libraries target directory
set(LIBRARY_OUTPUT_PATH ${EXECTOS_BINARY_DIR}/output/library CACHE PATH "Build directory" FORCE)
# Compute __FILE__ definition
file(RELATIVE_PATH _PATH_PREFIX ${EXECTOS_BINARY_DIR} ${EXECTOS_SOURCE_DIR})
add_compiler_flags(-D__RELFILE__="&__FILE__[__FILE__[0] == '.' ? sizeof \\\"${_PATH_PREFIX}\\\" - 1 : sizeof XTOS_SOURCE_DIR]")
@@ -68,5 +65,6 @@ set_disk_image_size(32)
# Build all subprojects
add_subdirectory(bootdata)
add_subdirectory(drivers)
add_subdirectory(sdk)
add_subdirectory(xtldr)
add_subdirectory(xtoskrnl)

1
sdk/CMakeLists.txt Normal file
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@@ -0,0 +1 @@
set_sdk_target("xtdk/" "include")

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@@ -85,9 +85,14 @@ endfunction()
# This function installs specified target results under destination directory
function(set_install_target TARGET DESTINATION)
set_target_properties(${TARGET} PROPERTIES ARCHIVE_OUTPUT_DIRECTORY "${EXECTOS_BINARY_DIR}/output/sdk/lib")
install(TARGETS ${TARGET} DESTINATION ${EXECTOS_BINARY_DIR}/output/binaries/${DESTINATION})
endfunction()
function(set_sdk_target FILENAME DESTINATION)
install(DIRECTORY ${FILENAME} DESTINATION ${EXECTOS_BINARY_DIR}/output/sdk/${DESTINATION})
endfunction()
# This function is responsible for compiling module SPEC file
function(set_specfile SPECFILE EXPORTNAME)
if(NOT ${ARGC} EQUAL 2)

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@@ -20,8 +20,9 @@ set(CMAKE_CXX_EXTENSIONS OFF)
set(CMAKE_C_STANDARD 23)
set(CMAKE_CXX_STANDARD 23)
# Disable standard C libraries
# Disable standard C and C++ libraries
set(CMAKE_C_STANDARD_LIBRARIES "" CACHE INTERNAL "")
set(CMAKE_CXX_STANDARD_LIBRARIES "" CACHE INTERNAL "")
# Clean linker flags
set(CMAKE_STATIC_LINKER_FLAGS "")

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@@ -12,7 +12,7 @@ endif()
# Set build optimisation
if(BUILD_TYPE STREQUAL "DEBUG")
add_compiler_ccxxflags("/GS- /Zi /Ob0 /Od")
add_linker_flags("/DEBUG /INCREMENTAL /OPT:NOREF /OPT:NOICF /PDBSOURCEPATH:build")
add_linker_flags("/DEBUG /INCREMENTAL:NO /OPT:REF /OPT:NOICF /PDBSOURCEPATH:build")
else()
add_compiler_ccxxflags("/GS- /Ob2 /Ot /Ox /Oy")
add_linker_flags("/INCREMENTAL:NO /OPT:REF /OPT:ICF")
@@ -50,8 +50,9 @@ add_compiler_ccxxflags("-Wno-gnu-folding-constant")
# Disable compiler builtins
add_compiler_ccxxflags("-fno-builtin")
# Set debugging symbols output directory
# Set symbols and libraries output directory
set(CMAKE_PDB_OUTPUT_DIRECTORY "${EXECTOS_BINARY_DIR}/output/symbols")
set(LIBRARY_OUTPUT_PATH "${EXECTOS_BINARY_DIR}/output/sdk/lib")
# Set linker flags
add_linker_flags("${HOTPATCH_LINKER_FLAG} /LARGEADDRESSAWARE /IGNORE:4039 /IGNORE:4104 /MANIFEST:NO /NODEFAULTLIB /SAFESEH:NO")

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@@ -1,13 +0,0 @@
## XT Building Kit (XTBK)
The XTBK, or XT Building Kit is a kind of SDK (Software Development Kit) utilized internally by XTOS, the XT Operating
System. It is designed to provide a collection of public functions that are available within the operating system but
not necessarily exposed or accessible to software and driver developers.
Unlike XTDK, which focuses on providing headers for external developers to create kernel mode drivers and user mode
applications, XTBK serves as an extension to XTDK and aids in the code-sharing process between different XTOS
components. This enables the reuse of code across various components of the operating system, resulting in a more
efficient and streamlined development process.
By incorporating XTBK, XTOS can optimize code reuse, particularly in low-level kernel code that can be shared with other
components like the boot loader. This approach helps in reducing code duplication and improving overall code
maintainability. Additionally, it allows for consistent implementation of functionality across different parts of the OS.

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@@ -16,30 +16,37 @@
/* Routines used by XTLDR */
XTCLINK
XTCDECL
VOID
ArClearInterruptFlag(VOID);
XTCLINK
XTCDECL
BOOLEAN
ArCpuId(IN OUT PCPUID_REGISTERS Registers);
XTCLINK
XTCDECL
VOID
ArEnableExtendedPhysicalAddressing(IN ULONG_PTR PageMap);
XTCLINK
XTCDECL
VOID
ArHalt(VOID);
XTCLINK
XTCDECL
ULONG_PTR
ArReadControlRegister(IN USHORT ControlRegister);
XTCLINK
XTCDECL
ULONGLONG
ArReadModelSpecificRegister(IN ULONG Register);
XTCLINK
XTCDECL
VOID
ArWriteControlRegister(IN USHORT ControlRegister,

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@@ -16,28 +16,34 @@
/* HAL library routines forward references */
XTCLINK
XTCDECL
UCHAR
HlIoPortInByte(IN USHORT Port);
XTCLINK
XTCDECL
ULONG
HlIoPortInLong(IN USHORT Port);
XTCLINK
XTCDECL
USHORT
HlIoPortInShort(IN USHORT Port);
XTCLINK
XTCDECL
VOID
HlIoPortOutByte(IN USHORT Port,
IN UCHAR Data);
XTCLINK
XTCDECL
VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value);
XTCLINK
XTCDECL
VOID
HlIoPortOutShort(IN USHORT Port,

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@@ -14,6 +14,7 @@
/* XT BootLoader routines forward references */
XTCLINK
XTCDECL
EFI_STATUS
BlGetXtLdrProtocol(IN PEFI_SYSTEM_TABLE SystemTable,

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@@ -14,26 +14,32 @@
/* Kernel Executive routines forward references */
XTCLINK
XTFASTCALL
BOOLEAN
ExAcquireRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
XTCLINK
XTFASTCALL
VOID
ExCompleteRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
XTCLINK
XTFASTCALL
VOID
ExInitializeRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
XTCLINK
XTFASTCALL
VOID
ExReInitializeRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
XTCLINK
XTFASTCALL
VOID
ExReleaseRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
XTCLINK
XTFASTCALL
VOID
ExWaitForRundownProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor);

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@@ -15,15 +15,50 @@
/* Routines used by XTLDR */
XTCLINK
XTCDECL
XTSTATUS
HlComPortPutByte(IN PCPPORT Port,
IN UCHAR Byte);
XTCLINK
XTCDECL
XTSTATUS
HlInitializeComPort(IN OUT PCPPORT Port,
IN PUCHAR PortAddress,
IN ULONG BaudRate);
XTCLINK
XTAPI
UCHAR
HlReadRegister8(IN PVOID Register);
XTCLINK
XTAPI
USHORT
HlReadRegister16(IN PVOID Register);
XTCLINK
XTAPI
ULONG
HlReadRegister32(IN PVOID Register);
XTCLINK
XTAPI
VOID
HlWriteRegister8(IN PVOID Register,
IN UCHAR Value);
XTCLINK
XTAPI
VOID
HlWriteRegister16(IN PVOID Register,
IN USHORT Value);
XTCLINK
XTAPI
VOID
HlWriteRegister32(IN PVOID Register,
IN ULONG Value);
#endif /* __XTDK_HLFUNCS_H */

View File

@@ -16,26 +16,32 @@
/* Routines used by XTLDR */
XTCLINK
XTCDECL
VOID
ArClearInterruptFlag(VOID);
XTCLINK
XTCDECL
BOOLEAN
ArCpuId(IN OUT PCPUID_REGISTERS Registers);
XTCLINK
XTCDECL
VOID
ArHalt(VOID);
XTCLINK
XTCDECL
ULONG_PTR
ArReadControlRegister(IN USHORT ControlRegister);
XTCLINK
XTCDECL
ULONGLONG
ArReadModelSpecificRegister(IN ULONG Register);
XTCLINK
XTCDECL
VOID
ArWriteControlRegister(IN USHORT ControlRegister,

View File

@@ -16,28 +16,34 @@
/* HAL library routines forward references */
XTCLINK
XTCDECL
UCHAR
HlIoPortInByte(IN USHORT Port);
XTCLINK
XTCDECL
ULONG
HlIoPortInLong(IN USHORT Port);
XTCLINK
XTCDECL
USHORT
HlIoPortInShort(IN USHORT Port);
XTCLINK
XTCDECL
VOID
HlIoPortOutByte(IN USHORT Port,
IN UCHAR Data);
XTCLINK
XTCDECL
VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value);
XTCLINK
XTCDECL
VOID
HlIoPortOutShort(IN USHORT Port,

View File

@@ -16,36 +16,44 @@
/* Kernel services routines forward references */
XTCLINK
XTFASTCALL
VOID
KeAcquireQueuedSpinLock(IN KSPIN_LOCK_QUEUE_LEVEL LockLevel);
XTCLINK
XTFASTCALL
VOID
KeAcquireSpinLock(IN OUT PKSPIN_LOCK SpinLock);
XTCLINK
XTAPI
XTSTATUS
KeAcquireSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader);
XTCLINK
XTAPI
BOOLEAN
KeCancelTimer(IN PKTIMER Timer);
XTCLINK
XTFASTCALL
KRUNLEVEL
KeGetCurrentRunLevel(VOID);
XTCLINK
XTAPI
XTSTATUS
KeGetSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader);
XTCLINK
XTAPI
BOOLEAN
KeGetTimerState(IN PKTIMER Timer);
XTCLINK
XTAPI
VOID
KeInitializeApc(IN PKAPC Apc,
@@ -57,45 +65,54 @@ KeInitializeApc(IN PKAPC Apc,
IN KPROCESSOR_MODE ApcMode,
IN PVOID Context);
XTCLINK
XTAPI
VOID
KeInitializeDpc(IN PKDPC Dpc,
IN PKDEFERRED_ROUTINE DpcRoutine,
IN PVOID DpcContext);
XTCLINK
XTAPI
VOID
KeInitializeSemaphore(IN PKSEMAPHORE Semaphore,
IN LONG Count,
IN LONG Limit);
XTCLINK
XTAPI
VOID
KeInitializeSpinLock(IN PKSPIN_LOCK SpinLock);
XTCLINK
XTAPI
VOID
KeInitializeThreadedDpc(IN PKDPC Dpc,
IN PKDEFERRED_ROUTINE DpcRoutine,
IN PVOID DpcContext);
XTCLINK
XTAPI
VOID
KeInitializeTimer(OUT PKTIMER Timer,
IN KTIMER_TYPE Type);
XTCLINK
XTFASTCALL
VOID
KeLowerRunLevel(IN KRUNLEVEL RunLevel);
XTCLINK
XTFASTCALL
KRUNLEVEL
KeRaiseRunLevel(IN KRUNLEVEL RunLevel);
XTCLINK
XTAPI
LONG
KeReadSemaphoreState(IN PKSEMAPHORE Semaphore);
XTCLINK
XTAPI
LONG
KeReleaseSemaphore(IN PKSEMAPHORE Semaphore,
@@ -103,23 +120,28 @@ KeReleaseSemaphore(IN PKSEMAPHORE Semaphore,
IN LONG Adjustment,
IN BOOLEAN Wait);
XTCLINK
XTFASTCALL
VOID
KeReleaseQueuedSpinLock(IN KSPIN_LOCK_QUEUE_LEVEL LockLevel);
XTCLINK
XTFASTCALL
VOID
KeReleaseSpinLock(IN OUT PKSPIN_LOCK SpinLock);
XTCLINK
XTAPI
VOID
KeReleaseSystemResource(IN PSYSTEM_RESOURCE_HEADER ResourceHeader);
XTCLINK
XTAPI
VOID
KeSetTargetProcessorDpc(IN PKDPC Dpc,
IN CCHAR Number);
XTCLINK
XTAPI
VOID
KeSetTimer(IN PKTIMER Timer,
@@ -127,10 +149,12 @@ KeSetTimer(IN PKTIMER Timer,
IN LONG Period,
IN PKDPC Dpc);
XTCLINK
XTAPI
VOID
KeSignalCallDpcDone(IN PVOID SystemArgument);
XTCLINK
XTAPI
BOOLEAN
KeSignalCallDpcSynchronize(IN PVOID SystemArgument);

View File

@@ -15,326 +15,363 @@
#include <rtltypes.h>
/* Routines used by XTLDR */
XTCDECL
VOID
RtlInitializeListHead(IN PLIST_ENTRY ListHead);
XTCDECL
VOID
RtlInsertHeadList(IN OUT PLIST_ENTRY ListHead,
IN PLIST_ENTRY Entry);
XTCDECL
VOID
RtlInsertTailList(IN OUT PLIST_ENTRY ListHead,
IN PLIST_ENTRY Entry);
XTAPI
UCHAR
RtlReadRegisterByte(IN VOLATILE PVOID Register);
XTAPI
ULONG
RtlReadRegisterLong(IN VOLATILE PVOID Register);
XTAPI
USHORT
RtlReadRegisterShort(IN VOLATILE PVOID Register);
XTCDECL
VOID
RtlRemoveEntryList(IN PLIST_ENTRY Entry);
/* Runtime Library routines forward references */
XTCLINK
XTAPI
VOID
RtlClearAllBits(IN PRTL_BITMAP BitMap);
XTCLINK
XTAPI
VOID
RtlClearBit(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Bit);
XTCLINK
XTAPI
VOID
RtlClearBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR StartingIndex,
IN ULONG_PTR Length);
XTCLINK
XTAPI
ULONG
RtlClearSetBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR Index);
XTCLINK
XTAPI
BOOLEAN
RtlCompareGuids(IN PGUID Guid1,
IN PGUID Guid2);
XTCLINK
XTAPI
SIZE_T
RtlCompareMemory(IN PCVOID LeftBuffer,
IN PCVOID RightBuffer,
IN SIZE_T Length);
XTCLINK
XTAPI
SIZE_T
RtlCompareString(IN PCSTR String1,
IN PCSTR String2,
IN SIZE_T Length);
XTCLINK
XTAPI
SIZE_T
RtlCompareStringInsensitive(IN PCSTR String1,
IN PCSTR String2,
IN SIZE_T Length);
XTCLINK
XTAPI
SIZE_T
RtlCompareWideString(IN PCWSTR String1,
IN PCWSTR String2,
IN SIZE_T Length);
XTCLINK
XTAPI
SIZE_T
RtlCompareWideStringInsensitive(IN PCWSTR String1,
IN PCWSTR String2,
IN SIZE_T Length);
XTCLINK
XTAPI
PCHAR
RtlConcatenateString(OUT PCHAR Destination,
IN PCHAR Source,
IN SIZE_T Count);
XTCLINK
XTAPI
PWCHAR
RtlConcatenateWideString(OUT PWCHAR Destination,
IN PWCHAR Source,
IN SIZE_T Count);
XTCLINK
XTAPI
LARGE_INTEGER
RtlConvertToLargeInteger32(IN LONG Value);
XTCLINK
XTAPI
LARGE_INTEGER
RtlConvertToLargeIntegerUnsigned32(IN ULONG Value);
XTCLINK
XTAPI
VOID
RtlCopyMemory(OUT PVOID Destination,
IN PCVOID Source,
IN SIZE_T Length);
XTCLINK
XTAPI
VOID
RtlCopyString(IN PCHAR Destination,
IN PCSTR Source,
IN ULONG Length);
XTCLINK
XTAPI
VOID
RtlCopyWideString(IN PWCHAR Destination,
IN PCWSTR Source,
IN ULONG Length);
XTCLINK
XTAPI
LARGE_INTEGER
RtlDivideLargeInteger(IN LARGE_INTEGER Dividend,
IN ULONG Divisor,
OUT PULONG Remainder);
XTCLINK
XTAPI
ULONG_PTR
RtlFindClearBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR Index);
XTCLINK
XTAPI
ULONG_PTR
RtlFindSetBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR Index);
XTCLINK
XTAPI
PCSTR
RtlFindString(IN PCSTR Source,
IN PCSTR Search);
XTCLINK
XTAPI
PCSTR
RtlFindStringInsensitive(IN PCSTR Source,
IN PCSTR Search);
XTCLINK
XTAPI
PCWSTR
RtlFindWideString(IN PCWSTR Source,
IN PCWSTR Search);
XTCLINK
XTAPI
PCWSTR
RtlFindWideStringInsensitive(IN PCWSTR Source,
IN PCWSTR Search);
XTCLINK
XTAPI
XTSTATUS
RtlFormatWideString(IN PRTL_PRINT_CONTEXT Context,
IN PCWSTR Format,
IN VA_LIST ArgumentList);
XTCLINK
XTAPI
VOID
RtlInitializeBitMap(IN PRTL_BITMAP BitMap,
IN PULONG_PTR Buffer,
IN ULONG Size);
XTCLINK
XTCDECL
VOID
RtlInitializeListHead(IN PLIST_ENTRY ListHead);
XTCLINK
XTCDECL
VOID
RtlInsertHeadList(IN OUT PLIST_ENTRY ListHead,
IN PLIST_ENTRY Entry);
XTCLINK
XTCDECL
VOID
RtlInsertTailList(IN OUT PLIST_ENTRY ListHead,
IN PLIST_ENTRY Entry);
XTCLINK
XTCDECL
BOOLEAN
RtlListEmpty(IN PLIST_ENTRY ListHead);
XTCLINK
XTCDECL
BOOLEAN
RtlListLoop(IN PLIST_ENTRY ListHead);
XTCLINK
XTAPI
VOID
RtlMoveMemory(OUT PVOID Destination,
IN PCVOID Source,
IN SIZE_T Length);
XTCLINK
XTAPI
LARGE_INTEGER
RtlMultiplyLargeInteger(IN LARGE_INTEGER Multiplicand,
IN LONG Multiplier);
XTCLINK
XTCDECL
VOID
RtlRemoveEntryList(IN PLIST_ENTRY Entry);
XTCLINK
XTAPI
VOID
RtlReverseString(IN OUT PCHAR String,
IN ULONG Length);
XTCLINK
XTAPI
VOID
RtlReverseWideString(IN OUT PWCHAR String,
IN ULONG Length);
XTCLINK
XTAPI
BOOLEAN
RtlSameMemory(IN PCVOID LeftBuffer,
IN PCVOID RightBuffer,
IN SIZE_T Length);
XTCLINK
XTAPI
VOID
RtlSetAllBits(IN PRTL_BITMAP BitMap);
XTCLINK
XTAPI
VOID
RtlSetBit(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Bit);
XTCLINK
XTAPI
VOID
RtlSetBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR StartingIndex,
IN ULONG_PTR Length);
XTCLINK
XTAPI
ULONG
RtlSetClearBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR Index);
XTCLINK
XTAPI
VOID
RtlSetMemory(OUT PVOID Destination,
IN UCHAR Byte,
IN SIZE_T Length);
XTCLINK
XTAPI
SIZE_T
RtlStringLength(IN PCSTR String,
IN SIZE_T MaxLength);
XTCLINK
XTAPI
SIZE_T
RtlStringToWideString(OUT PWCHAR Destination,
IN PCSTR *Source,
IN SIZE_T Length);
XTCLINK
XTAPI
BOOLEAN
RtlTestBit(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Bit);
XTCLINK
XTAPI
PCHAR
RtlTokenizeString(IN PCHAR String,
IN PCSTR Delimiter,
IN OUT PCHAR *SavePtr);
XTCLINK
XTAPI
PWCHAR
RtlTokenizeWideString(IN PWCHAR String,
IN PCWSTR Delimiter,
IN OUT PWCHAR *SavePtr);
XTCLINK
XTAPI
CHAR
RtlToLowerCharacter(IN CHAR Character);
XTCLINK
XTAPI
WCHAR
RtlToLowerWideCharacter(IN WCHAR Character);
XTCLINK
XTAPI
CHAR
RtlToUpperCharacter(IN CHAR Character);
XTCLINK
XTAPI
WCHAR
RtlToUpperWideCharacter(IN WCHAR Character);
XTCLINK
XTAPI
PCHAR
RtlTrimLeftString(IN PCHAR String);
XTCLINK
XTAPI
PWCHAR
RtlTrimLeftWideString(IN PWCHAR String);
XTCLINK
XTAPI
PCHAR
RtlTrimRightString(IN PCHAR String);
XTCLINK
XTAPI
PWCHAR
RtlTrimRightWideString(IN PWCHAR String);
XTCLINK
XTAPI
PCHAR
RtlTrimString(IN PCHAR String);
XTCLINK
XTAPI
PWCHAR
RtlTrimWideString(IN PWCHAR String);
XTCLINK
XTAPI
SIZE_T
RtlWideStringLength(IN PCWSTR String,
IN SIZE_T MaxLength);
XTAPI
VOID
RtlWriteRegisterByte(IN VOLATILE PVOID Register,
IN UCHAR Value);
XTAPI
VOID
RtlWriteRegisterLong(IN VOLATILE PVOID Register,
IN ULONG Value);
XTAPI
VOID
RtlWriteRegisterShort(IN VOLATILE PVOID Register,
IN USHORT Value);
XTCLINK
XTAPI
VOID
RtlZeroMemory(OUT PVOID Destination,

View File

@@ -56,17 +56,17 @@ typedef XTSTATUS (*PWRITE_WIDE_CHARACTER)(IN WCHAR Character);
/* Variable types enumeration list */
typedef enum _RTL_VARIABLE_TYPE
{
Unknown,
AnsiString,
Boolean,
Char,
Float,
Guid,
Integer,
String,
UnicodeString,
WideChar,
WideString
TypeUnknown,
TypeAnsiString,
TypeBoolean,
TypeChar,
TypeFloat,
TypeGuid,
TypeInteger,
TypeString,
TypeUnicodeString,
TypeWideChar,
TypeWideString
} RTL_VARIABLE_TYPE, *PRTL_VARIABLE_TYPE;
/* Bit Map structure definition */

View File

@@ -7,6 +7,7 @@
*/
/* Base XT headers */
#include <xtcompat.h>
#include <xtdefs.h>
#include <xtstatus.h>
#include <xttarget.h>

21
sdk/xtdk/xtcompat.h Normal file
View File

@@ -0,0 +1,21 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/xtcompat.h
* DESCRIPTION: C/C++ compatibility macros
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_XTCOMPAT_H
#define __XTDK_XTCOMPAT_H
#ifdef __cplusplus
#define XTCLINK extern "C"
typedef wchar_t wchar;
#else
#define XTCLINK
typedef unsigned short wchar;
#endif
#endif /* __XTDK_XTCOMPAT_H */

View File

@@ -13,9 +13,9 @@
/* Debugging macros */
#define CHECKPOINT DebugPrint(L"Checkpoint reached at %s:%d\n", __RELFILE__, __LINE__);
#define DEPRECATED DebugPrint(L"Called deprecated routine '%s()' at %s:%d\n", \
__FUNCTION__, __RELFILE__, __LINE__);
__FUNCTION__, __RELFILE__, __LINE__);
#define UNIMPLEMENTED DebugPrint(L"Called unimplemented routine '%s()' at %s:%d\n", \
__FUNCTION__, __RELFILE__, __LINE__);
__FUNCTION__, __RELFILE__, __LINE__);
/* XTOS platform debugging macros */
#ifdef DBG

View File

@@ -7,6 +7,7 @@
*/
/* Base XT headers */
#include <xtcompat.h>
#include <xtdefs.h>
#include <xtstatus.h>
#include <xttarget.h>

View File

@@ -52,6 +52,7 @@ typedef enum _LOADER_MEMORY_TYPE LOADER_MEMORY_TYPE, *PLOADER_MEMORY_TYPE;
typedef enum _MODE MODE, *PMODE;
typedef enum _RTL_VARIABLE_TYPE RTL_VARIABLE_TYPE, *PRTL_VARIABLE_TYPE;
typedef enum _SYSTEM_FIRMWARE_TYPE SYSTEM_FIRMWARE_TYPE, *PSYSTEM_FIRMWARE_TYPE;
typedef enum _SYSTEM_RESOURCE_TYPE SYSTEM_RESOURCE_TYPE, *PSYSTEM_RESOURCE_TYPE;
typedef enum _WAIT_TYPE WAIT_TYPE, *PWAIT_TYPE;
/* Structures forward references */

View File

@@ -10,6 +10,7 @@
#define __XTDK_XTTYPES_H
#include <xttarget.h>
#include <xtcompat.h>
/* Standard C types */
@@ -128,7 +129,7 @@ typedef CHAR SZ, *PSZ;
typedef const CHAR CSZ, *PCSZ;
/* UNICODE character types */
typedef USHORT WCHAR, *PWCHAR;
typedef wchar WCHAR, *PWCHAR;
typedef WCHAR *PWCH, *LPWCH;
typedef const WCHAR *PCWCH, *LPCWCH;
typedef WCHAR *PWSTR, *LPWSTR, *NWPSTR;

View File

@@ -7,34 +7,23 @@ include_directories(
${EXECTOS_SOURCE_DIR}/sdk/xtdk
${XTOSKRNL_SOURCE_DIR}/includes)
# Specify list of library source code files
list(APPEND LIBXTOS_SOURCE
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/boot.S
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.c
${XTOSKRNL_SOURCE_DIR}/hl/cport.c
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.c
${XTOSKRNL_SOURCE_DIR}/rtl/globals.c
${XTOSKRNL_SOURCE_DIR}/rtl/guid.c
${XTOSKRNL_SOURCE_DIR}/rtl/math.c
${XTOSKRNL_SOURCE_DIR}/rtl/memory.c
${XTOSKRNL_SOURCE_DIR}/rtl/plist.c
${XTOSKRNL_SOURCE_DIR}/rtl/string.c
${XTOSKRNL_SOURCE_DIR}/rtl/widestr.c)
# Specify list of kernel source code files
list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/archsup.S
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/boot.S
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.c
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/globals.c
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/procsup.c
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/traps.c
${XTOSKRNL_SOURCE_DIR}/ex/rundown.c
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.cc
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/data.cc
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/procsup.cc
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/traps.cc
${XTOSKRNL_SOURCE_DIR}/ex/exports.cc
${XTOSKRNL_SOURCE_DIR}/ex/rundown.cc
${XTOSKRNL_SOURCE_DIR}/hl/acpi.c
${XTOSKRNL_SOURCE_DIR}/hl/cport.c
${XTOSKRNL_SOURCE_DIR}/hl/exports.cc
${XTOSKRNL_SOURCE_DIR}/hl/fbdev.c
${XTOSKRNL_SOURCE_DIR}/hl/globals.c
${XTOSKRNL_SOURCE_DIR}/hl/init.c
${XTOSKRNL_SOURCE_DIR}/hl/ioreg.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/cpu.c
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/pic.c
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.c
@@ -42,25 +31,26 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/kd/dbginit.c
${XTOSKRNL_SOURCE_DIR}/kd/dbgio.c
${XTOSKRNL_SOURCE_DIR}/kd/globals.c
${XTOSKRNL_SOURCE_DIR}/ke/apc.c
${XTOSKRNL_SOURCE_DIR}/ke/dpc.c
${XTOSKRNL_SOURCE_DIR}/ke/event.c
${XTOSKRNL_SOURCE_DIR}/ke/globals.c
${XTOSKRNL_SOURCE_DIR}/ke/info.c
${XTOSKRNL_SOURCE_DIR}/ke/kprocess.c
${XTOSKRNL_SOURCE_DIR}/ke/krnlinit.c
${XTOSKRNL_SOURCE_DIR}/ke/kthread.c
${XTOSKRNL_SOURCE_DIR}/ke/kubsan.c
${XTOSKRNL_SOURCE_DIR}/ke/panic.c
${XTOSKRNL_SOURCE_DIR}/ke/runlevel.c
${XTOSKRNL_SOURCE_DIR}/ke/semphore.c
${XTOSKRNL_SOURCE_DIR}/ke/spinlock.c
${XTOSKRNL_SOURCE_DIR}/ke/sysres.c
${XTOSKRNL_SOURCE_DIR}/ke/timer.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/irqs.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/irq.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.cc
${XTOSKRNL_SOURCE_DIR}/ke/apc.cc
${XTOSKRNL_SOURCE_DIR}/ke/bootinfo.cc
${XTOSKRNL_SOURCE_DIR}/ke/crash.cc
${XTOSKRNL_SOURCE_DIR}/ke/data.cc
${XTOSKRNL_SOURCE_DIR}/ke/dpc.cc
${XTOSKRNL_SOURCE_DIR}/ke/event.cc
${XTOSKRNL_SOURCE_DIR}/ke/exports.cc
${XTOSKRNL_SOURCE_DIR}/ke/kprocess.cc
${XTOSKRNL_SOURCE_DIR}/ke/krnlinit.cc
${XTOSKRNL_SOURCE_DIR}/ke/kthread.cc
${XTOSKRNL_SOURCE_DIR}/ke/kubsan.cc
${XTOSKRNL_SOURCE_DIR}/ke/runlevel.cc
${XTOSKRNL_SOURCE_DIR}/ke/semphore.cc
${XTOSKRNL_SOURCE_DIR}/ke/spinlock.cc
${XTOSKRNL_SOURCE_DIR}/ke/sysres.cc
${XTOSKRNL_SOURCE_DIR}/ke/timer.cc
${XTOSKRNL_SOURCE_DIR}/mm/globals.c
${XTOSKRNL_SOURCE_DIR}/mm/hlpool.c
${XTOSKRNL_SOURCE_DIR}/mm/init.c
@@ -70,26 +60,26 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/init.c
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pages.c
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pmap.c
${XTOSKRNL_SOURCE_DIR}/po/idle.c
${XTOSKRNL_SOURCE_DIR}/rtl/atomic.c
${XTOSKRNL_SOURCE_DIR}/rtl/bitmap.c
${XTOSKRNL_SOURCE_DIR}/rtl/byteswap.c
${XTOSKRNL_SOURCE_DIR}/rtl/globals.c
${XTOSKRNL_SOURCE_DIR}/rtl/guid.c
${XTOSKRNL_SOURCE_DIR}/rtl/ioreg.c
${XTOSKRNL_SOURCE_DIR}/rtl/math.c
${XTOSKRNL_SOURCE_DIR}/rtl/memory.c
${XTOSKRNL_SOURCE_DIR}/rtl/plist.c
${XTOSKRNL_SOURCE_DIR}/rtl/string.c
${XTOSKRNL_SOURCE_DIR}/rtl/widestr.c
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/dispatch.c
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/exsup.c)
${XTOSKRNL_SOURCE_DIR}/po/idle.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/dispatch.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/exsup.cc
${XTOSKRNL_SOURCE_DIR}/rtl/atomic.cc
${XTOSKRNL_SOURCE_DIR}/rtl/bitmap.cc
${XTOSKRNL_SOURCE_DIR}/rtl/data.cc
${XTOSKRNL_SOURCE_DIR}/rtl/endian.cc
${XTOSKRNL_SOURCE_DIR}/rtl/exports.cc
${XTOSKRNL_SOURCE_DIR}/rtl/guid.cc
${XTOSKRNL_SOURCE_DIR}/rtl/llist.cc
${XTOSKRNL_SOURCE_DIR}/rtl/math.cc
${XTOSKRNL_SOURCE_DIR}/rtl/memory.cc
${XTOSKRNL_SOURCE_DIR}/rtl/string.cc
${XTOSKRNL_SOURCE_DIR}/rtl/widestr.cc)
# Set module definition SPEC file
set_specfile(xtoskrnl.spec xtoskrnl.exe)
# Link static XTOS library
add_library(libxtos ${LIBXTOS_SOURCE})
add_library(libxtos ${XTOSKRNL_SOURCE})
# Link kernel executable
add_executable(xtoskrnl

View File

@@ -22,9 +22,9 @@
*
* @since XT 1.0
*/
.macro ArpCreateTrapHandler Vector
.global ArpTrap\Vector
ArpTrap\Vector:
.macro ArCreateTrapHandler Vector
.global ArTrap\Vector
ArTrap\Vector:
/* Push fake error code for non-error vectors */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
push $0
@@ -113,7 +113,7 @@ KernelMode$\Vector:
/* Push Frame Pointer, clear direction flag and pass to trap dispatcher */
mov %rsp, %rcx
cld
call ArpDispatchTrap
call ArDispatchTrap
/* Test previous mode and swapgs if needed */
testb $1, TrapPreviousMode(%rbp)
@@ -176,6 +176,6 @@ KernelModeReturn$\Vector:
/* Populate common trap handlers */
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
ArpCreateTrapHandler 0x\i\j
ArCreateTrapHandler 0x\i\j
.endr
.endr

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/amd64/cpufunc.c
* FILE: xtoskrnl/ar/amd64/cpufunc.cc
* DESCRIPTION: Routines to provide access to special AMD64 CPU instructions
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -18,7 +18,7 @@
*/
XTCDECL
VOID
ArClearInterruptFlag(VOID)
AR::CpuFunc::ClearInterruptFlag(VOID)
{
__asm__ volatile("cli");
}
@@ -35,7 +35,7 @@ ArClearInterruptFlag(VOID)
*/
XTCDECL
BOOLEAN
ArCpuId(IN OUT PCPUID_REGISTERS Registers)
AR::CpuFunc::CpuId(IN OUT PCPUID_REGISTERS Registers)
{
UINT32 MaxLeaf;
@@ -76,10 +76,10 @@ ArCpuId(IN OUT PCPUID_REGISTERS Registers)
*/
XTCDECL
VOID
ArFlushTlb(VOID)
AR::CpuFunc::FlushTlb(VOID)
{
/* Flush the TLB by resetting the CR3 */
ArWriteControlRegister(3, ArReadControlRegister(3));
WriteControlRegister(3, ReadControlRegister(3));
}
/**
@@ -91,7 +91,7 @@ ArFlushTlb(VOID)
*/
XTCDECL
ULONG
ArGetCpuFlags(VOID)
AR::CpuFunc::GetCpuFlags(VOID)
{
ULONG_PTR Flags;
@@ -116,7 +116,7 @@ ArGetCpuFlags(VOID)
XTASSEMBLY
XTCDECL
ULONG_PTR
ArGetStackPointer(VOID)
AR::CpuFunc::GetStackPointer(VOID)
{
/* Get current stack pointer */
__asm__ volatile("movq %%rsp, %%rax\n"
@@ -135,7 +135,7 @@ ArGetStackPointer(VOID)
*/
XTCDECL
VOID
ArHalt(VOID)
AR::CpuFunc::Halt(VOID)
{
__asm__ volatile("hlt");
}
@@ -149,12 +149,12 @@ ArHalt(VOID)
*/
XTCDECL
BOOLEAN
ArInterruptsEnabled(VOID)
AR::CpuFunc::InterruptsEnabled(VOID)
{
ULONG_PTR Flags;
/* Get RFLAGS register */
Flags = ArGetCpuFlags();
Flags = GetCpuFlags();
/* Check if interrupts are enabled and return result */
return (Flags & X86_EFLAGS_IF_MASK) ? TRUE : FALSE;
@@ -172,7 +172,7 @@ ArInterruptsEnabled(VOID)
*/
XTCDECL
VOID
ArInvalidateTlbEntry(IN PVOID Address)
AR::CpuFunc::InvalidateTlbEntry(IN PVOID Address)
{
__asm__ volatile("invlpg (%0)"
:
@@ -192,7 +192,7 @@ ArInvalidateTlbEntry(IN PVOID Address)
*/
XTCDECL
VOID
ArLoadGlobalDescriptorTable(IN PVOID Source)
AR::CpuFunc::LoadGlobalDescriptorTable(IN PVOID Source)
{
__asm__ volatile("lgdt %0"
:
@@ -212,7 +212,7 @@ ArLoadGlobalDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
ArLoadInterruptDescriptorTable(IN PVOID Source)
AR::CpuFunc::LoadInterruptDescriptorTable(IN PVOID Source)
{
__asm__ volatile("lidt %0"
:
@@ -232,7 +232,7 @@ ArLoadInterruptDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
ArLoadLocalDescriptorTable(IN USHORT Source)
AR::CpuFunc::LoadLocalDescriptorTable(IN USHORT Source)
{
__asm__ volatile("lldtw %0"
:
@@ -251,7 +251,7 @@ ArLoadLocalDescriptorTable(IN USHORT Source)
*/
XTCDECL
VOID
ArLoadMxcsrRegister(IN ULONG Source)
AR::CpuFunc::LoadMxcsrRegister(IN ULONG Source)
{
__asm__ volatile("ldmxcsr %0"
:
@@ -273,8 +273,8 @@ ArLoadMxcsrRegister(IN ULONG Source)
*/
XTCDECL
VOID
ArLoadSegment(IN USHORT Segment,
IN ULONG Source)
AR::CpuFunc::LoadSegment(IN USHORT Segment,
IN ULONG Source)
{
switch(Segment)
{
@@ -335,7 +335,7 @@ ArLoadSegment(IN USHORT Segment,
*/
XTCDECL
VOID
ArLoadTaskRegister(USHORT Source)
AR::CpuFunc::LoadTaskRegister(USHORT Source)
{
__asm__ volatile("ltr %0"
:
@@ -351,7 +351,7 @@ ArLoadTaskRegister(USHORT Source)
*/
XTCDECL
VOID
ArMemoryBarrier(VOID)
AR::CpuFunc::MemoryBarrier(VOID)
{
LONG Barrier;
__asm__ volatile("lock; orl $0, %0;"
@@ -371,7 +371,7 @@ ArMemoryBarrier(VOID)
*/
XTCDECL
ULONG_PTR
ArReadControlRegister(IN USHORT ControlRegister)
AR::CpuFunc::ReadControlRegister(IN USHORT ControlRegister)
{
ULONG_PTR Value;
@@ -435,7 +435,7 @@ ArReadControlRegister(IN USHORT ControlRegister)
*/
XTCDECL
ULONG_PTR
ArReadDebugRegister(IN USHORT DebugRegister)
AR::CpuFunc::ReadDebugRegister(IN USHORT DebugRegister)
{
ULONG_PTR Value;
@@ -504,7 +504,7 @@ ArReadDebugRegister(IN USHORT DebugRegister)
*/
XTCDECL
ULONGLONG
ArReadGSQuadWord(ULONG Offset)
AR::CpuFunc::ReadGSQuadWord(ULONG Offset)
{
ULONGLONG Value;
@@ -527,7 +527,7 @@ ArReadGSQuadWord(ULONG Offset)
*/
XTCDECL
ULONGLONG
ArReadModelSpecificRegister(IN ULONG Register)
AR::CpuFunc::ReadModelSpecificRegister(IN ULONG Register)
{
ULONG Low, High;
@@ -548,7 +548,7 @@ ArReadModelSpecificRegister(IN ULONG Register)
*/
XTCDECL
UINT
ArReadMxCsrRegister(VOID)
AR::CpuFunc::ReadMxCsrRegister(VOID)
{
return __builtin_ia32_stmxcsr();
}
@@ -562,7 +562,7 @@ ArReadMxCsrRegister(VOID)
*/
XTCDECL
ULONGLONG
ArReadTimeStampCounter(VOID)
AR::CpuFunc::ReadTimeStampCounter(VOID)
{
ULONGLONG Low, High;
@@ -582,7 +582,7 @@ ArReadTimeStampCounter(VOID)
*/
XTCDECL
VOID
ArReadWriteBarrier(VOID)
AR::CpuFunc::ReadWriteBarrier(VOID)
{
__asm__ volatile(""
:
@@ -599,7 +599,7 @@ ArReadWriteBarrier(VOID)
*/
XTCDECL
VOID
ArSetInterruptFlag(VOID)
AR::CpuFunc::SetInterruptFlag(VOID)
{
__asm__ volatile("sti");
}
@@ -616,7 +616,7 @@ ArSetInterruptFlag(VOID)
*/
XTCDECL
VOID
ArStoreGlobalDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreGlobalDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sgdt %0"
: "=m" (*(PSHORT)Destination)
@@ -636,7 +636,7 @@ ArStoreGlobalDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
ArStoreInterruptDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreInterruptDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sidt %0"
: "=m" (*(PSHORT)Destination)
@@ -656,7 +656,7 @@ ArStoreInterruptDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
ArStoreLocalDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreLocalDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sldt %0"
: "=m" (*(PSHORT)Destination)
@@ -679,8 +679,8 @@ ArStoreLocalDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
ArStoreSegment(IN USHORT Segment,
OUT PVOID Destination)
AR::CpuFunc::StoreSegment(IN USHORT Segment,
OUT PVOID Destination)
{
switch(Segment)
{
@@ -726,7 +726,7 @@ ArStoreSegment(IN USHORT Segment,
*/
XTCDECL
VOID
ArStoreTaskRegister(OUT PVOID Destination)
AR::CpuFunc::StoreTaskRegister(OUT PVOID Destination)
{
__asm__ volatile("str %0"
: "=m" (*(PULONG)Destination)
@@ -749,8 +749,8 @@ ArStoreTaskRegister(OUT PVOID Destination)
*/
XTCDECL
VOID
ArWriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
AR::CpuFunc::WriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
{
/* Write a value into specified control register */
switch(ControlRegister)
@@ -808,8 +808,8 @@ ArWriteControlRegister(IN USHORT ControlRegister,
*/
XTCDECL
VOID
ArWriteDebugRegister(IN USHORT DebugRegister,
IN UINT_PTR Value)
AR::CpuFunc::WriteDebugRegister(IN USHORT DebugRegister,
IN UINT_PTR Value)
{
/* Write a value into specified debug register */
switch(DebugRegister)
@@ -820,48 +820,56 @@ ArWriteDebugRegister(IN USHORT DebugRegister,
:
: "r" (Value)
: "memory");
break;
case 1:
/* Write value to DR1 */
__asm__ volatile("mov %0, %%dr1"
:
: "r" (Value)
: "memory");
break;
case 2:
/* Write value to DR2 */
__asm__ volatile("mov %0, %%dr2"
:
: "r" (Value)
: "memory");
break;
case 3:
/* Write value to DR3 */
__asm__ volatile("mov %0, %%dr3"
:
: "r" (Value)
: "memory");
break;
case 4:
/* Write value to DR4 */
__asm__ volatile("mov %0, %%dr4"
:
: "r" (Value)
: "memory");
break;
case 5:
/* Write value to DR5 */
__asm__ volatile("mov %0, %%dr5"
:
: "r" (Value)
: "memory");
break;
case 6:
/* Write value to DR6 */
__asm__ volatile("mov %0, %%dr6"
:
: "r" (Value)
: "memory");
break;
case 7:
/* Write value to DR7 */
__asm__ volatile("mov %0, %%dr7"
:
: "r" (Value)
: "memory");
break;
}
}
@@ -877,7 +885,7 @@ ArWriteDebugRegister(IN USHORT DebugRegister,
*/
XTCDECL
VOID
ArWriteEflagsRegister(IN UINT_PTR Value)
AR::CpuFunc::WriteEflagsRegister(IN UINT_PTR Value)
{
__asm__ volatile("push %0\n"
"popf"
@@ -900,8 +908,8 @@ ArWriteEflagsRegister(IN UINT_PTR Value)
*/
XTCDECL
VOID
ArWriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
AR::CpuFunc::WriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
{
ULONG Low = Value & 0xFFFFFFFF;
ULONG High = Value >> 32;
@@ -922,10 +930,187 @@ ArWriteModelSpecificRegister(IN ULONG Register,
*/
XTCDECL
VOID
ArYieldProcessor(VOID)
AR::CpuFunc::YieldProcessor(VOID)
{
__asm__ volatile("pause"
:
:
: "memory");
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
VOID
ArClearInterruptFlag(VOID)
{
AR::CpuFunc::ClearInterruptFlag();
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
BOOLEAN
ArCpuId(IN OUT PCPUID_REGISTERS Registers)
{
return AR::CpuFunc::CpuId(Registers);
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
VOID
ArHalt(VOID)
{
AR::CpuFunc::Halt();
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
ULONG_PTR
ArReadControlRegister(IN USHORT ControlRegister)
{
return AR::CpuFunc::ReadControlRegister(ControlRegister);
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
ULONGLONG
ArReadModelSpecificRegister(IN ULONG Register)
{
return AR::CpuFunc::ReadModelSpecificRegister(Register);
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
VOID
ArWriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
{
AR::CpuFunc::WriteControlRegister(ControlRegister, Value);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArYieldProcessor(VOID)
{
AR::CpuFunc::YieldProcessor();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArReadWriteBarrier(VOID)
{
AR::CpuFunc::ReadWriteBarrier();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
BOOLEAN
ArInterruptsEnabled(VOID)
{
return AR::CpuFunc::InterruptsEnabled();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArSetInterruptFlag(VOID)
{
AR::CpuFunc::SetInterruptFlag();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
ULONGLONG
ArReadGSQuadWord(ULONG Offset)
{
return AR::CpuFunc::ReadGSQuadWord(Offset);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
ULONG_PTR
ArReadDebugRegister(IN USHORT DebugRegister)
{
return AR::CpuFunc::ReadDebugRegister(DebugRegister);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
UINT
ArReadMxCsrRegister(VOID)
{
return AR::CpuFunc::ReadMxCsrRegister();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArStoreGlobalDescriptorTable(IN PVOID Source)
{
AR::CpuFunc::StoreGlobalDescriptorTable(Source);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArStoreInterruptDescriptorTable(IN PVOID Source)
{
AR::CpuFunc::StoreInterruptDescriptorTable(Source);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArStoreLocalDescriptorTable(IN PVOID Source)
{
AR::CpuFunc::StoreLocalDescriptorTable(Source);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArStoreTaskRegister(OUT PVOID Destination)
{
AR::CpuFunc::StoreTaskRegister(Destination);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArFlushTlb(VOID)
{
AR::CpuFunc::FlushTlb();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArWriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
{
AR::CpuFunc::WriteModelSpecificRegister(Register, Value);
}

28
xtoskrnl/ar/amd64/data.cc Normal file
View File

@@ -0,0 +1,28 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/amd64/data.cc
* DESCRIPTION: AMD64 architecture-specific global and static data
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.hh>
/* Initial kernel boot stack */
UCHAR AR::ProcSup::BootStack[KERNEL_STACK_SIZE] = {};
/* Initial kernel fault stack */
UCHAR AR::ProcSup::FaultStack[KERNEL_STACK_SIZE] = {};
/* Initial GDT */
KGDTENTRY AR::ProcSup::InitialGdt[GDT_ENTRIES] = {};
/* Initial IDT */
KIDTENTRY AR::ProcSup::InitialIdt[IDT_ENTRIES] = {};
/* Initial Processor Block */
KPROCESSOR_BLOCK AR::ProcSup::InitialProcessorBlock;
/* Initial TSS */
KTSS AR::ProcSup::InitialTss;

View File

@@ -1,28 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/amd64/globals.c
* DESCRIPTION: XT architecture library global variables
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
/* Initial GDT */
KGDTENTRY ArInitialGdt[GDT_ENTRIES] = {0};
/* Initial IDT */
KIDTENTRY ArInitialIdt[IDT_ENTRIES] = {0};
/* Initial Processor Block */
KPROCESSOR_BLOCK ArInitialProcessorBlock;
/* Initial TSS */
KTSS ArInitialTss;
/* Initial kernel boot stack */
UCHAR ArKernelBootStack[KERNEL_STACK_SIZE] = {0};
/* Initial kernel fault stack */
UCHAR ArKernelFaultStack[KERNEL_STACK_SIZE] = {0};

View File

@@ -1,121 +1,26 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/amd64/procsup.c
* FILE: xtoskrnl/ar/amd64/procsup.cc
* DESCRIPTION: AMD64 processor functionality support
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
* Initializes AMD64 processor specific structures.
* Gets the base address of the kernel boot stack.
*
* @return This routine does not return any value.
* @return This routine returns a pointer to the kernel boot stack.
*
* @since XT 1.0
*/
XTAPI
VOID
ArInitializeProcessor(IN PVOID ProcessorStructures)
PVOID
AR::ProcSup::GetBootStack(VOID)
{
KDESCRIPTOR GdtDescriptor, IdtDescriptor;
PVOID KernelBootStack, KernelFaultStack;
PKPROCESSOR_BLOCK ProcessorBlock;
PKGDTENTRY Gdt;
PKIDTENTRY Idt;
PKTSS Tss;
/* Check if processor structures buffer provided */
if(ProcessorStructures)
{
/* Assign CPU structures from provided buffer */
ArpInitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
&KernelBootStack, &KernelFaultStack);
/* Use global IDT */
Idt = ArInitialIdt;
}
else
{
/* Use initial structures */
Gdt = ArInitialGdt;
Idt = ArInitialIdt;
Tss = &ArInitialTss;
KernelBootStack = &ArKernelBootStack;
KernelFaultStack = &ArKernelFaultStack;
ProcessorBlock = &ArInitialProcessorBlock;
}
/* Initialize processor block */
ArpInitializeProcessorBlock(ProcessorBlock, Gdt, Idt, Tss, KernelFaultStack);
/* Initialize GDT, IDT and TSS */
ArpInitializeGdt(ProcessorBlock);
ArpInitializeIdt(ProcessorBlock);
ArpInitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
/* Set GDT and IDT descriptors */
GdtDescriptor.Base = Gdt;
GdtDescriptor.Limit = (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1;
IdtDescriptor.Base = Idt;
IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1;
/* Load GDT, IDT and TSS */
ArLoadGlobalDescriptorTable(&GdtDescriptor.Limit);
ArLoadInterruptDescriptorTable(&IdtDescriptor.Limit);
ArLoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Enter passive IRQ level */
HlSetRunLevel(PASSIVE_LEVEL);
/* Initialize segment registers */
ArpInitializeSegments();
/* Set GS base */
ArWriteModelSpecificRegister(X86_MSR_GSBASE, (ULONGLONG)ProcessorBlock);
ArWriteModelSpecificRegister(X86_MSR_KERNEL_GSBASE, (ULONGLONG)ProcessorBlock);
/* Initialize processor registers */
ArpInitializeProcessorRegisters();
/* Identify processor */
ArpIdentifyProcessor();
}
/**
* Updates an existing AMD64 GDT entry with new base address.
*
* @param Gdt
* Supplies a pointer to the GDT.
*
* @param Selector
* Specifies a segment selector of the GDT entry.
*
* @param Base
* Specifies a base address value of the descriptor.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
ArSetGdtEntryBase(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base)
{
PKGDTENTRY GdtEntry;
/* Get GDT entry */
GdtEntry = (PKGDTENTRY)((ULONG_PTR)Gdt + (Selector & ~RPL_MASK));
/* Set new GDT descriptor base */
GdtEntry->BaseLow = (Base & 0xFFFF);
GdtEntry->Bytes.BaseMiddle = ((Base >> 16) & 0xFF);
GdtEntry->Bytes.BaseHigh = ((Base >> 24) & 0xFF);
GdtEntry->BaseUpper = (Base >> 32);
return (PVOID)BootStack;
}
/**
@@ -128,7 +33,7 @@ ArSetGdtEntryBase(IN PKGDTENTRY Gdt,
*/
XTAPI
VOID
ArpIdentifyProcessor(VOID)
AR::ProcSup::IdentifyProcessor(VOID)
{
PKPROCESSOR_CONTROL_BLOCK Prcb;
CPUID_REGISTERS CpuRegisters;
@@ -143,10 +48,10 @@ ArpIdentifyProcessor(VOID)
/* Get CPU vendor by issueing CPUID instruction */
RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_VENDOR_STRING;
ArCpuId(&CpuRegisters);
CpuFunc::CpuId(&CpuRegisters);
/* Store CPU vendor in processor control block */
Prcb->CpuId.Vendor = CpuRegisters.Ebx;
Prcb->CpuId.Vendor = (CPU_VENDOR)CpuRegisters.Ebx;
*(PULONG)&Prcb->CpuId.VendorName[0] = CpuRegisters.Ebx;
*(PULONG)&Prcb->CpuId.VendorName[4] = CpuRegisters.Edx;
*(PULONG)&Prcb->CpuId.VendorName[8] = CpuRegisters.Ecx;
@@ -155,7 +60,7 @@ ArpIdentifyProcessor(VOID)
/* Get CPU standard features */
RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES;
ArCpuId(&CpuRegisters);
CpuFunc::CpuId(&CpuRegisters);
/* Store CPU signature in processor control block */
CpuSignature = *(PCPUID_SIGNATURE)&CpuRegisters.Eax;
@@ -195,6 +100,81 @@ ArpIdentifyProcessor(VOID)
/* TODO: Store a list of CPU features in processor control block */
}
/**
* Initializes AMD64 processor specific structures.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
{
KDESCRIPTOR GdtDescriptor, IdtDescriptor;
PVOID KernelBootStack, KernelFaultStack;
PKPROCESSOR_BLOCK ProcessorBlock;
PKGDTENTRY Gdt;
PKIDTENTRY Idt;
PKTSS Tss;
/* Check if processor structures buffer provided */
if(ProcessorStructures)
{
/* Assign CPU structures from provided buffer */
InitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
&KernelBootStack, &KernelFaultStack);
/* Use global IDT */
Idt = InitialIdt;
}
else
{
/* Use initial structures */
Gdt = InitialGdt;
Idt = InitialIdt;
Tss = &InitialTss;
KernelBootStack = &BootStack;
KernelFaultStack = &FaultStack;
ProcessorBlock = &InitialProcessorBlock;
}
/* Initialize processor block */
InitializeProcessorBlock(ProcessorBlock, Gdt, Idt, Tss, KernelFaultStack);
/* Initialize GDT, IDT and TSS */
InitializeGdt(ProcessorBlock);
InitializeIdt(ProcessorBlock);
InitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
/* Set GDT and IDT descriptors */
GdtDescriptor.Base = Gdt;
GdtDescriptor.Limit = (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1;
IdtDescriptor.Base = Idt;
IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1;
/* Load GDT, IDT and TSS */
CpuFunc::LoadGlobalDescriptorTable(&GdtDescriptor.Limit);
CpuFunc::LoadInterruptDescriptorTable(&IdtDescriptor.Limit);
CpuFunc::LoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Enter passive IRQ level */
HlSetRunLevel(PASSIVE_LEVEL);
/* Initialize segment registers */
InitializeSegments();
/* Set GS base */
CpuFunc::WriteModelSpecificRegister(X86_MSR_GSBASE, (ULONGLONG)ProcessorBlock);
CpuFunc::WriteModelSpecificRegister(X86_MSR_KERNEL_GSBASE, (ULONGLONG)ProcessorBlock);
/* Initialize processor registers */
InitializeProcessorRegisters();
/* Identify processor */
IdentifyProcessor();
}
/**
* Initializes the kernel's Global Descriptor Table (GDT).
*
@@ -207,19 +187,21 @@ ArpIdentifyProcessor(VOID)
*/
XTAPI
VOID
ArpInitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
AR::ProcSup::InitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
{
/* Initialize GDT entries */
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_NULL, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 1);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_CODE, 0x0, 0x0, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 1);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_DATA, 0x0, 0x0, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 1);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_CMCODE, 0x0, 0xFFFFFFFF, KGDT_TYPE_CODE, KGDT_DPL_USER, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_DATA, 0x0, 0xFFFFFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_CODE, 0x0, 0x0, KGDT_TYPE_CODE, KGDT_DPL_USER, 1);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_SYS_TSS, (ULONG_PTR)ProcessorBlock->TssBase, sizeof(KTSS) - 1, AMD64_TSS, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_CMTEB, 0x0, 0x0FFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_LDT, 0x0, 0xFFFFFFFF, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_ALIAS, (ULONG_PTR)ProcessorBlock->GdtBase, (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_NULL, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 1);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_CODE, 0x0, 0x0, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 1);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_DATA, 0x0, 0x0, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 1);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_CMCODE, 0x0, 0xFFFFFFFF, KGDT_TYPE_CODE, KGDT_DPL_USER, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_DATA, 0x0, 0xFFFFFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_CODE, 0x0, 0x0, KGDT_TYPE_CODE, KGDT_DPL_USER, 1);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_SYS_TSS, (ULONG_PTR)ProcessorBlock->TssBase,
sizeof(KTSS) - 1, AMD64_TSS, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_CMTEB, 0x0, 0x0FFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_LDT, 0x0, 0xFFFFFFFF, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_ALIAS, (ULONG_PTR)ProcessorBlock->GdtBase,
(GDT_ENTRIES * sizeof(KGDTENTRY)) - 1, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0);
}
/**
@@ -234,7 +216,7 @@ ArpInitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
*/
XTAPI
VOID
ArpInitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
AR::ProcSup::InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
{
UINT Vector;
@@ -242,34 +224,34 @@ ArpInitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
for(Vector = 0; Vector < IDT_ENTRIES; Vector++)
{
/* Set the IDT to handle unexpected interrupts */
ArpSetIdtGate(ProcessorBlock->IdtBase, Vector, ArpHandleTrapFF, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, Vector, (PVOID)ArTrap0xFF, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
}
/* Setup IDT handlers for known interrupts and traps */
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x00, ArpTrap0x00, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x01, ArpTrap0x01, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x02, ArpTrap0x02, KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x03, ArpTrap0x03, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x04, ArpTrap0x04, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x05, ArpTrap0x05, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x06, ArpTrap0x06, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x07, ArpTrap0x07, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x08, ArpTrap0x08, KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x09, ArpTrap0x09, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0A, ArpTrap0x0A, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0B, ArpTrap0x0B, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0C, ArpTrap0x0C, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0D, ArpTrap0x0D, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0E, ArpTrap0x0E, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x10, ArpTrap0x10, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x11, ArpTrap0x11, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x12, ArpTrap0x12, KGDT_R0_CODE, KIDT_IST_MCA, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x13, ArpTrap0x13, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x1F, ArpTrap0x1F, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x2C, ArpTrap0x2C, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x2D, ArpTrap0x2D, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x2F, ArpTrap0x2F, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0xE1, ArpTrap0xE1, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x00, (PVOID)ArTrap0x00, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x01, (PVOID)ArTrap0x01, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x02, (PVOID)ArTrap0x02, KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x03, (PVOID)ArTrap0x03, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x04, (PVOID)ArTrap0x04, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x05, (PVOID)ArTrap0x05, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x06, (PVOID)ArTrap0x06, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x07, (PVOID)ArTrap0x07, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x08, (PVOID)ArTrap0x08, KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x09, (PVOID)ArTrap0x09, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0A, (PVOID)ArTrap0x0A, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0B, (PVOID)ArTrap0x0B, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0C, (PVOID)ArTrap0x0C, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0D, (PVOID)ArTrap0x0D, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0E, (PVOID)ArTrap0x0E, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x10, (PVOID)ArTrap0x10, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x11, (PVOID)ArTrap0x11, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x12, (PVOID)ArTrap0x12, KGDT_R0_CODE, KIDT_IST_MCA, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x13, (PVOID)ArTrap0x13, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x1F, (PVOID)ArTrap0x1F, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x2C, (PVOID)ArTrap0x2C, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2D, (PVOID)ArTrap0x2D, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2F, (PVOID)ArTrap0x2F, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0xE1, (PVOID)ArTrap0xE1, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
}
/**
@@ -293,18 +275,18 @@ ArpInitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
*/
XTAPI
VOID
ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKGDTENTRY Gdt,
IN PKIDTENTRY Idt,
IN PKTSS Tss,
IN PVOID DpcStack)
AR::ProcSup::InitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKGDTENTRY Gdt,
IN PKIDTENTRY Idt,
IN PKTSS Tss,
IN PVOID DpcStack)
{
/* Set processor block and processor control block */
ProcessorBlock->Self = ProcessorBlock;
ProcessorBlock->CurrentPrcb = &ProcessorBlock->Prcb;
/* Set GDT, IDT and TSS descriptors */
ProcessorBlock->GdtBase = (PVOID)Gdt;
ProcessorBlock->GdtBase = (PKGDTENTRY)(PVOID)Gdt;
ProcessorBlock->IdtBase = Idt;
ProcessorBlock->TssBase = Tss;
ProcessorBlock->Prcb.RspBase = Tss->Rsp0;
@@ -322,10 +304,10 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
ProcessorBlock->Prcb.ProcessorState.SpecialRegisters.KernelDr7 = 0;
/* Set process and thread information */
ProcessorBlock->Prcb.CurrentThread = &KeInitialThread.ThreadControlBlock;
ProcessorBlock->Prcb.CurrentThread->ApcState.Process = &KeInitialProcess.ProcessControlBlock;
ProcessorBlock->Prcb.IdleThread = &KeInitialThread.ThreadControlBlock;
ProcessorBlock->Prcb.NextThread = NULL;
ProcessorBlock->Prcb.CurrentThread = &(KE::KThread::GetInitialThread())->ThreadControlBlock;
ProcessorBlock->Prcb.CurrentThread->ApcState.Process = &(KE::KProcess::GetInitialProcess())->ProcessControlBlock;
ProcessorBlock->Prcb.IdleThread = &(KE::KThread::GetInitialThread())->ThreadControlBlock;
ProcessorBlock->Prcb.NextThread = nullptr;
/* Set initial MXCSR register value */
ProcessorBlock->Prcb.MxCsr = INITIAL_MXCSR;
@@ -343,56 +325,50 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
*/
XTAPI
VOID
ArpInitializeProcessorRegisters(VOID)
AR::ProcSup::InitializeProcessorRegisters(VOID)
{
ULONGLONG PatAttributes;
/* Enable FXSAVE restore */
ArWriteControlRegister(4, ArReadControlRegister(4) | CR4_FXSR);
CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_FXSR);
/* Enable XMMI exceptions */
ArWriteControlRegister(4, ArReadControlRegister(4) | CR4_XMMEXCPT);
CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_XMMEXCPT);
/* Set debugger extension */
ArWriteControlRegister(4, ArReadControlRegister(4) | CR4_DE);
CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_DE);
/* Enable large pages */
ArWriteControlRegister(4, ArReadControlRegister(4) | CR4_PSE);
CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_PSE);
/* Enable write-protection */
ArWriteControlRegister(0, ArReadControlRegister(0) | CR0_WP);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) | CR0_WP);
/* Set alignment mask */
ArWriteControlRegister(0, ArReadControlRegister(0) | CR0_AM);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) | CR0_AM);
/* Disable FPU monitoring */
ArWriteControlRegister(0, ArReadControlRegister(0) & ~CR0_MP);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) & ~CR0_MP);
/* Disable x87 FPU exceptions */
ArWriteControlRegister(0, ArReadControlRegister(0) & ~CR0_NE);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) & ~CR0_NE);
/* Flush the TLB */
ArFlushTlb();
/* Initialize system calls MSR */
ArWriteModelSpecificRegister(X86_MSR_STAR, (((ULONG64)KGDT_R3_CMCODE | RPL_MASK) << 48) | ((ULONG64)KGDT_R0_CODE << 32));
ArWriteModelSpecificRegister(X86_MSR_CSTAR, (ULONG64)&ArpHandleSystemCall32);
ArWriteModelSpecificRegister(X86_MSR_LSTAR, (ULONG64)&ArpHandleSystemCall64);
ArWriteModelSpecificRegister(X86_MSR_FMASK, X86_EFLAGS_IF_MASK | X86_EFLAGS_TF_MASK);
/* Enable system call extensions (SCE) in EFER MSR */
ArWriteModelSpecificRegister(X86_MSR_EFER, ArReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_SCE);
CpuFunc::FlushTlb();
/* Initialize system call MSRs */
Traps::InitializeSystemCallMsrs();
/* Enable No-Execute (NXE) in EFER MSR */
ArWriteModelSpecificRegister(X86_MSR_EFER, ArReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_NXE);
CpuFunc::WriteModelSpecificRegister(X86_MSR_EFER, CpuFunc::ReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_NXE);
/* Initialize Page Attribute Table */
PatAttributes = (PAT_TYPE_WB << 0) | (PAT_TYPE_USWC << 8) | (PAT_TYPE_WEAK_UC << 16) | (PAT_TYPE_STRONG_UC << 24) |
(PAT_TYPE_WB << 32) | (PAT_TYPE_USWC << 40) | (PAT_TYPE_WEAK_UC << 48) | (PAT_TYPE_STRONG_UC << 56);
ArWriteModelSpecificRegister(X86_MSR_PAT, PatAttributes);
CpuFunc::WriteModelSpecificRegister(X86_MSR_PAT, PatAttributes);
/* Initialize MXCSR register */
ArLoadMxcsrRegister(INITIAL_MXCSR);
CpuFunc::LoadMxcsrRegister(INITIAL_MXCSR);
}
/**
@@ -422,12 +398,12 @@ ArpInitializeProcessorRegisters(VOID)
*/
XTAPI
VOID
ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKGDTENTRY *Gdt,
OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack)
AR::ProcSup::InitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKGDTENTRY *Gdt,
OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack)
{
UINT_PTR Address;
@@ -442,15 +418,15 @@ ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
*KernelFaultStack = (PVOID)Address;
/* Assign a space for GDT and advance */
*Gdt = (PVOID)Address;
Address += sizeof(ArInitialGdt);
*Gdt = (PKGDTENTRY)(PVOID)Address;
Address += sizeof(InitialGdt);
/* Assign a space for Processor Block and advance */
*ProcessorBlock = (PVOID)Address;
Address += sizeof(ArInitialProcessorBlock);
*ProcessorBlock = (PKPROCESSOR_BLOCK)(PVOID)Address;
Address += sizeof(InitialProcessorBlock);
/* Assign a space for TSS */
*Tss = (PVOID)Address;
*Tss = (PKTSS)(PVOID)Address;
}
/**
@@ -462,15 +438,15 @@ ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
*/
XTAPI
VOID
ArpInitializeSegments(VOID)
AR::ProcSup::InitializeSegments(VOID)
{
/* Initialize segments */
ArLoadSegment(SEGMENT_CS, KGDT_R0_CODE);
ArLoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
ArLoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
ArLoadSegment(SEGMENT_FS, KGDT_R3_CMTEB | RPL_MASK);
ArLoadSegment(SEGMENT_GS, KGDT_R3_DATA | RPL_MASK);
ArLoadSegment(SEGMENT_SS, KGDT_R0_DATA);
CpuFunc::LoadSegment(SEGMENT_CS, KGDT_R0_CODE);
CpuFunc::LoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_FS, KGDT_R3_CMTEB | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_GS, KGDT_R3_DATA | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_SS, KGDT_R0_DATA);
}
/**
@@ -488,9 +464,9 @@ ArpInitializeSegments(VOID)
*/
XTAPI
VOID
ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack,
IN PVOID KernelFaultStack)
AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack,
IN PVOID KernelFaultStack)
{
/* Fill TSS with zeroes */
RtlZeroMemory(ProcessorBlock->TssBase, sizeof(KTSS));
@@ -532,13 +508,13 @@ ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
*/
XTAPI
VOID
ArpSetGdtEntry(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base,
IN ULONG Limit,
IN UCHAR Type,
IN UCHAR Dpl,
IN UCHAR SegmentMode)
AR::ProcSup::SetGdtEntry(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base,
IN ULONG Limit,
IN UCHAR Type,
IN UCHAR Dpl,
IN UCHAR SegmentMode)
{
PKGDTENTRY GdtEntry;
UCHAR Granularity;
@@ -580,6 +556,40 @@ ArpSetGdtEntry(IN PKGDTENTRY Gdt,
GdtEntry->MustBeZero = 0;
}
/**
* Updates an existing AMD64 GDT entry with new base address.
*
* @param Gdt
* Supplies a pointer to the GDT.
*
* @param Selector
* Specifies a segment selector of the GDT entry.
*
* @param Base
* Specifies a base address value of the descriptor.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
AR::ProcSup::SetGdtEntryBase(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base)
{
PKGDTENTRY GdtEntry;
/* Get GDT entry */
GdtEntry = (PKGDTENTRY)((ULONG_PTR)Gdt + (Selector & ~RPL_MASK));
/* Set new GDT descriptor base */
GdtEntry->BaseLow = (Base & 0xFFFF);
GdtEntry->Bytes.BaseMiddle = ((Base >> 16) & 0xFF);
GdtEntry->Bytes.BaseHigh = ((Base >> 24) & 0xFF);
GdtEntry->BaseUpper = (Base >> 32);
}
/**
* Fills in a call, interrupt, task or trap gate entry.
*
@@ -607,12 +617,12 @@ ArpSetGdtEntry(IN PKGDTENTRY Gdt,
*/
XTAPI
VOID
ArpSetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Vector,
IN PVOID Handler,
IN USHORT Selector,
IN USHORT Ist,
IN USHORT Access)
AR::ProcSup::SetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Vector,
IN PVOID Handler,
IN USHORT Selector,
IN USHORT Ist,
IN USHORT Access)
{
/* Setup the gate */
Idt[Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF);

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/amd64/traps.c
* FILE: xtoskrnl/ar/amd64/traps.cc
* DESCRIPTION: AMD64 system traps
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -21,124 +21,138 @@
*/
XTCDECL
VOID
ArpDispatchTrap(IN PKTRAP_FRAME TrapFrame)
AR::Traps::DispatchTrap(IN PKTRAP_FRAME TrapFrame)
{
/* Check vector and call appropriate handler */
switch(TrapFrame->Vector)
{
case 0x00:
/* Divide By Zero exception */
ArpHandleTrap00(TrapFrame);
HandleTrap00(TrapFrame);
break;
case 0x01:
/* Debug exception */
ArpHandleTrap01(TrapFrame);
HandleTrap01(TrapFrame);
break;
case 0x02:
/* Non-Maskable Interrupt (NMI) */
ArpHandleTrap02(TrapFrame);
HandleTrap02(TrapFrame);
break;
case 0x03:
/* INT3 instruction executed */
ArpHandleTrap03(TrapFrame);
HandleTrap03(TrapFrame);
break;
case 0x04:
/* Overflow exception */
ArpHandleTrap04(TrapFrame);
HandleTrap04(TrapFrame);
break;
case 0x05:
/* Bound Range Exceeded exception */
ArpHandleTrap05(TrapFrame);
HandleTrap05(TrapFrame);
break;
case 0x06:
/* Invalid Opcode exception */
ArpHandleTrap06(TrapFrame);
HandleTrap06(TrapFrame);
break;
case 0x07:
/* Device Not Available exception */
ArpHandleTrap07(TrapFrame);
HandleTrap07(TrapFrame);
break;
case 0x08:
/* Double Fault exception */
ArpHandleTrap08(TrapFrame);
HandleTrap08(TrapFrame);
break;
case 0x09:
/* Segment Overrun exception */
ArpHandleTrap09(TrapFrame);
HandleTrap09(TrapFrame);
break;
case 0x0A:
/* Invalid TSS exception */
ArpHandleTrap0A(TrapFrame);
HandleTrap0A(TrapFrame);
break;
case 0x0B:
/* Segment Not Present exception */
ArpHandleTrap0B(TrapFrame);
HandleTrap0B(TrapFrame);
break;
case 0x0C:
/* Stack Segment Fault exception */
ArpHandleTrap0C(TrapFrame);
HandleTrap0C(TrapFrame);
break;
case 0x0D:
/* General Protection Fault (GPF) exception*/
ArpHandleTrap0D(TrapFrame);
HandleTrap0D(TrapFrame);
break;
case 0x0E:
/* Page Fault exception */
ArpHandleTrap0E(TrapFrame);
HandleTrap0E(TrapFrame);
break;
case 0x10:
/* X87 Floating-Point exception */
ArpHandleTrap10(TrapFrame);
HandleTrap10(TrapFrame);
break;
case 0x11:
/* Alignment Check exception */
ArpHandleTrap11(TrapFrame);
HandleTrap11(TrapFrame);
break;
case 0x12:
/* Machine Check exception */
ArpHandleTrap12(TrapFrame);
HandleTrap12(TrapFrame);
break;
case 0x13:
/* SIMD Floating-Point exception */
ArpHandleTrap13(TrapFrame);
HandleTrap13(TrapFrame);
break;
case 0x1F:
/* Software Interrupt at APC level */
ArpHandleTrap1F(TrapFrame);
HandleTrap1F(TrapFrame);
break;
case 0x2C:
/* Assertion raised */
ArpHandleTrap2C(TrapFrame);
HandleTrap2C(TrapFrame);
break;
case 0x2D:
/* Debug-Service-Request raised */
ArpHandleTrap2D(TrapFrame);
HandleTrap2D(TrapFrame);
break;
case 0x2F:
/* Software Interrupt at DISPATCH level */
ArpHandleTrap2F(TrapFrame);
HandleTrap2F(TrapFrame);
break;
case 0xE1:
/* InterProcessor Interrupt (IPI) */
ArpHandleTrapE1(TrapFrame);
HandleTrapE1(TrapFrame);
break;
default:
/* Unknown/Unexpected trap */
ArpHandleTrapFF(TrapFrame);
HandleTrapFF(TrapFrame);
break;
}
}
/**
* Handles a 32-bit system call.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
ArpHandleSystemCall32(VOID)
AR::Traps::HandleSystemCall32(VOID)
{
DebugPrint(L"Handled 32-bit system call!\n");
}
/**
* Handles a 64-bit system call.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
ArpHandleSystemCall64(VOID)
AR::Traps::HandleSystemCall64(VOID)
{
DebugPrint(L"Handled 64-bit system call!\n");
}
@@ -155,7 +169,7 @@ ArpHandleSystemCall64(VOID)
*/
XTCDECL
VOID
ArpHandleTrap00(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap00(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Division-By-Zero Error (0x00)!\n");
for(;;);
@@ -173,7 +187,7 @@ ArpHandleTrap00(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap01(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap01(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Debug exception (0x01)!\n");
for(;;);
@@ -191,7 +205,7 @@ ArpHandleTrap01(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap02(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n");
for(;;);
@@ -209,7 +223,7 @@ ArpHandleTrap02(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap03(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap03(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled INT3 (0x03)!\n");
for(;;);
@@ -227,7 +241,7 @@ ArpHandleTrap03(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap04(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap04(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Overflow exception (0x04)!\n");
for(;;);
@@ -245,7 +259,7 @@ ArpHandleTrap04(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap05(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap05(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Bound-Range-Exceeded exception (0x05)!\n");
for(;;);
@@ -263,7 +277,7 @@ ArpHandleTrap05(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap06(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap06(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Invalid Opcode exception (0x06)!\n");
for(;;);
@@ -281,7 +295,7 @@ ArpHandleTrap06(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap07(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap07(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Device Not Available exception (0x07)!\n");
for(;;);
@@ -299,7 +313,7 @@ ArpHandleTrap07(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap08(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap08(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Double-Fault exception (0x08)!\n");
for(;;);
@@ -317,7 +331,7 @@ ArpHandleTrap08(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap09(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap09(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Segment-Overrun exception (0x09)!\n");
for(;;);
@@ -335,7 +349,7 @@ ArpHandleTrap09(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0A(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0A(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Invalid-TSS exception (0x0A)!\n");
for(;;);
@@ -353,7 +367,7 @@ ArpHandleTrap0A(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0B(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0B(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Segment-Not-Present exception (0x0B)!\n");
for(;;);
@@ -371,7 +385,7 @@ ArpHandleTrap0B(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0C(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0C(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Stack-Segment-Fault exception (0x0C)!\n");
for(;;);
@@ -389,7 +403,7 @@ ArpHandleTrap0C(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0D(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0D(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled General-Protection-Fault (0x0D)!\n");
for(;;);
@@ -407,7 +421,7 @@ ArpHandleTrap0D(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0E(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0E(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Page-Fault exception (0x0E)!\n");
for(;;);
@@ -425,7 +439,7 @@ ArpHandleTrap0E(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap10(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap10(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled x87 Floating-Point exception (0x10)!\n");
for(;;);
@@ -443,7 +457,7 @@ ArpHandleTrap10(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap11(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap11(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Alignment-Check exception (0x11)!\n");
for(;;);
@@ -461,7 +475,7 @@ ArpHandleTrap11(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap12(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap12(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Machine-Check exception (0x12)!\n");
for(;;);
@@ -479,7 +493,7 @@ ArpHandleTrap12(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap13(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap13(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled SIMD Floating-Point exception (0x13)!\n");
for(;;);
@@ -497,7 +511,7 @@ ArpHandleTrap13(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap1F(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap1F(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Unhandled software interrupt at APC level (0x1F)!\n");
}
@@ -514,7 +528,7 @@ ArpHandleTrap1F(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap2C(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap2C(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Assertion (0x2C)!\n");
for(;;);
@@ -532,7 +546,7 @@ ArpHandleTrap2C(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap2D(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap2D(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Debug-Service-Request (0x2D)!\n");
for(;;);
@@ -550,7 +564,7 @@ ArpHandleTrap2D(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap2F(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap2F(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Unhandled software interrupt at DISPATCH level (0x2F)!\n");
}
@@ -567,7 +581,7 @@ ArpHandleTrap2F(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrapE1(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrapE1(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Unhandled IPI interrupt (0xE1)!\n");
}
@@ -584,8 +598,47 @@ ArpHandleTrapE1(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrapFF(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrapFF(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Unexpected-Interrupt (0xFF)!\n");
for(;;);
}
/**
* Initializes system call MSRs.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
AR::Traps::InitializeSystemCallMsrs(VOID)
{
/* Initialize system calls MSR */
CpuFunc::WriteModelSpecificRegister(X86_MSR_STAR, (((ULONG64)KGDT_R3_CMCODE | RPL_MASK) << 48) | ((ULONG64)KGDT_R0_CODE << 32));
CpuFunc::WriteModelSpecificRegister(X86_MSR_CSTAR, (ULONG64)&HandleSystemCall32);
CpuFunc::WriteModelSpecificRegister(X86_MSR_LSTAR, (ULONG64)&HandleSystemCall64);
CpuFunc::WriteModelSpecificRegister(X86_MSR_FMASK, X86_EFLAGS_IF_MASK | X86_EFLAGS_TF_MASK);
/* Enable system call extensions (SCE) in EFER MSR */
CpuFunc::WriteModelSpecificRegister(X86_MSR_EFER, CpuFunc::ReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_SCE);
}
/**
* C-linkage wrapper for dispatching the trap provided by common trap handler.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common trap handler on the stack.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTCDECL
VOID
ArDispatchTrap(IN PKTRAP_FRAME TrapFrame)
{
AR::Traps::DispatchTrap(TrapFrame);
}

View File

@@ -22,9 +22,9 @@
*
* @since XT 1.0
*/
.macro ArpCreateTrapHandler Vector
.global _ArpTrap\Vector
_ArpTrap\Vector:
.macro ArCreateTrapHandler Vector
.global _ArTrap\Vector
_ArTrap\Vector:
/* Push fake error code for non-error vectors */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
push $0
@@ -84,7 +84,7 @@ KernelMode$\Vector:
/* Push Frame Pointer, clear direction flag and pass to trap dispatcher */
push %esp
cld
call _ArpDispatchTrap
call _ArDispatchTrap
/* Clean up the stack */
add $4, %esp
@@ -121,6 +121,6 @@ KernelModeReturn$\Vector:
/* Populate common trap handlers */
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
ArpCreateTrapHandler 0x\i\j
ArCreateTrapHandler 0x\i\j
.endr
.endr

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/i686/cpufunc.c
* FILE: xtoskrnl/ar/i686/cpufunc.cc
* DESCRIPTION: Routines to provide access to special i686 CPU instructions
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -18,7 +18,7 @@
*/
XTCDECL
VOID
ArClearInterruptFlag(VOID)
AR::CpuFunc::ClearInterruptFlag(VOID)
{
__asm__ volatile("cli");
}
@@ -35,7 +35,7 @@ ArClearInterruptFlag(VOID)
*/
XTCDECL
BOOLEAN
ArCpuId(IN OUT PCPUID_REGISTERS Registers)
AR::CpuFunc::CpuId(IN OUT PCPUID_REGISTERS Registers)
{
UINT32 MaxLeaf;
@@ -76,7 +76,7 @@ ArCpuId(IN OUT PCPUID_REGISTERS Registers)
*/
XTCDECL
VOID
ArFlushTlb(VOID)
AR::CpuFunc::FlushTlb(VOID)
{
/* Flush the TLB by resetting the CR3 */
ArWriteControlRegister(3, ArReadControlRegister(3));
@@ -91,7 +91,7 @@ ArFlushTlb(VOID)
*/
XTCDECL
ULONG
ArGetCpuFlags(VOID)
AR::CpuFunc::GetCpuFlags(VOID)
{
ULONG_PTR Flags;
@@ -116,7 +116,7 @@ ArGetCpuFlags(VOID)
XTASSEMBLY
XTCDECL
ULONG_PTR
ArGetStackPointer(VOID)
AR::CpuFunc::GetStackPointer(VOID)
{
/* Get current stack pointer */
__asm__ volatile("mov %%esp, %%eax\n"
@@ -135,7 +135,7 @@ ArGetStackPointer(VOID)
*/
XTCDECL
VOID
ArHalt(VOID)
AR::CpuFunc::Halt(VOID)
{
__asm__ volatile("hlt");
}
@@ -149,12 +149,12 @@ ArHalt(VOID)
*/
XTCDECL
BOOLEAN
ArInterruptsEnabled(VOID)
AR::CpuFunc::InterruptsEnabled(VOID)
{
ULONG_PTR Flags;
/* Get RFLAGS register */
Flags = ArGetCpuFlags();
Flags = GetCpuFlags();
/* Check if interrupts are enabled and return result */
return (Flags & X86_EFLAGS_IF_MASK) ? TRUE : FALSE;
@@ -172,7 +172,7 @@ ArInterruptsEnabled(VOID)
*/
XTCDECL
VOID
ArInvalidateTlbEntry(PVOID Address)
AR::CpuFunc::InvalidateTlbEntry(PVOID Address)
{
__asm__ volatile("invlpg (%0)"
:
@@ -192,7 +192,7 @@ ArInvalidateTlbEntry(PVOID Address)
*/
XTCDECL
VOID
ArLoadGlobalDescriptorTable(IN PVOID Source)
AR::CpuFunc::LoadGlobalDescriptorTable(IN PVOID Source)
{
__asm__ volatile("lgdt %0"
:
@@ -212,7 +212,7 @@ ArLoadGlobalDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
ArLoadInterruptDescriptorTable(IN PVOID Source)
AR::CpuFunc::LoadInterruptDescriptorTable(IN PVOID Source)
{
__asm__ volatile("lidt %0"
:
@@ -232,7 +232,7 @@ ArLoadInterruptDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
ArLoadLocalDescriptorTable(IN USHORT Source)
AR::CpuFunc::LoadLocalDescriptorTable(IN USHORT Source)
{
__asm__ volatile("lldtw %0"
:
@@ -254,8 +254,8 @@ ArLoadLocalDescriptorTable(IN USHORT Source)
*/
XTCDECL
VOID
ArLoadSegment(IN USHORT Segment,
IN ULONG Source)
AR::CpuFunc::LoadSegment(IN USHORT Segment,
IN ULONG Source)
{
switch(Segment)
{
@@ -316,7 +316,7 @@ ArLoadSegment(IN USHORT Segment,
*/
XTCDECL
VOID
ArLoadTaskRegister(USHORT Source)
AR::CpuFunc::LoadTaskRegister(USHORT Source)
{
__asm__ volatile("ltr %0"
:
@@ -332,7 +332,7 @@ ArLoadTaskRegister(USHORT Source)
*/
XTCDECL
VOID
ArMemoryBarrier(VOID)
AR::CpuFunc::MemoryBarrier(VOID)
{
LONG Barrier;
__asm__ volatile("xchg %%eax, %0"
@@ -353,7 +353,7 @@ ArMemoryBarrier(VOID)
*/
XTCDECL
ULONG_PTR
ArReadControlRegister(IN USHORT ControlRegister)
AR::CpuFunc::ReadControlRegister(IN USHORT ControlRegister)
{
ULONG_PTR Value;
@@ -410,7 +410,7 @@ ArReadControlRegister(IN USHORT ControlRegister)
*/
XTCDECL
ULONG_PTR
ArReadDebugRegister(IN USHORT DebugRegister)
AR::CpuFunc::ReadDebugRegister(IN USHORT DebugRegister)
{
ULONG_PTR Value;
@@ -479,7 +479,7 @@ ArReadDebugRegister(IN USHORT DebugRegister)
*/
XTCDECL
ULONG
ArReadFSDualWord(ULONG Offset)
AR::CpuFunc::ReadFSDualWord(ULONG Offset)
{
ULONG Value;
__asm__ volatile("movl %%fs:%a[Offset], %k[Value]"
@@ -500,7 +500,7 @@ ArReadFSDualWord(ULONG Offset)
*/
XTCDECL
ULONGLONG
ArReadModelSpecificRegister(IN ULONG Register)
AR::CpuFunc::ReadModelSpecificRegister(IN ULONG Register)
{
ULONGLONG Value;
@@ -519,7 +519,7 @@ ArReadModelSpecificRegister(IN ULONG Register)
*/
XTCDECL
UINT
ArReadMxCsrRegister(VOID)
AR::CpuFunc::ReadMxCsrRegister(VOID)
{
return __builtin_ia32_stmxcsr();
}
@@ -533,7 +533,7 @@ ArReadMxCsrRegister(VOID)
*/
XTCDECL
ULONGLONG
ArReadTimeStampCounter(VOID)
AR::CpuFunc::ReadTimeStampCounter(VOID)
{
ULONGLONG Value;
@@ -552,7 +552,7 @@ ArReadTimeStampCounter(VOID)
*/
XTCDECL
VOID
ArReadWriteBarrier(VOID)
AR::CpuFunc::ReadWriteBarrier(VOID)
{
__asm__ volatile(""
:
@@ -569,7 +569,7 @@ ArReadWriteBarrier(VOID)
*/
XTCDECL
VOID
ArSetInterruptFlag(VOID)
AR::CpuFunc::SetInterruptFlag(VOID)
{
__asm__ volatile("sti");
}
@@ -586,7 +586,7 @@ ArSetInterruptFlag(VOID)
*/
XTCDECL
VOID
ArStoreGlobalDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreGlobalDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sgdt %0"
: "=m" (*(PSHORT)Destination)
@@ -606,7 +606,7 @@ ArStoreGlobalDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
ArStoreInterruptDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreInterruptDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sidt %0"
: "=m" (*(PSHORT)Destination)
@@ -626,7 +626,7 @@ ArStoreInterruptDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
ArStoreLocalDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreLocalDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sldt %0"
: "=m" (*(PSHORT)Destination)
@@ -649,8 +649,8 @@ ArStoreLocalDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
ArStoreSegment(IN USHORT Segment,
OUT PVOID Destination)
AR::CpuFunc::StoreSegment(IN USHORT Segment,
OUT PVOID Destination)
{
switch(Segment)
{
@@ -696,7 +696,7 @@ ArStoreSegment(IN USHORT Segment,
*/
XTCDECL
VOID
ArStoreTaskRegister(OUT PVOID Destination)
AR::CpuFunc::StoreTaskRegister(OUT PVOID Destination)
{
__asm__ volatile("str %0"
: "=m" (*(PULONG)Destination)
@@ -719,8 +719,8 @@ ArStoreTaskRegister(OUT PVOID Destination)
*/
XTCDECL
VOID
ArWriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
AR::CpuFunc::WriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
{
/* Write a value into specified control register */
switch(ControlRegister)
@@ -771,8 +771,8 @@ ArWriteControlRegister(IN USHORT ControlRegister,
*/
XTCDECL
VOID
ArWriteDebugRegister(IN USHORT DebugRegister,
IN UINT_PTR Value)
AR::CpuFunc::WriteDebugRegister(IN USHORT DebugRegister,
IN UINT_PTR Value)
{
/* Write a value into specified debug register */
switch(DebugRegister)
@@ -840,7 +840,7 @@ ArWriteDebugRegister(IN USHORT DebugRegister,
*/
XTCDECL
VOID
ArWriteEflagsRegister(IN UINT_PTR Value)
AR::CpuFunc::WriteEflagsRegister(IN UINT_PTR Value)
{
__asm__ volatile("push %0\n"
"popf"
@@ -863,8 +863,8 @@ ArWriteEflagsRegister(IN UINT_PTR Value)
*/
XTCDECL
VOID
ArWriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
AR::CpuFunc::WriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
{
__asm__ volatile("wrmsr"
:
@@ -881,10 +881,185 @@ ArWriteModelSpecificRegister(IN ULONG Register,
*/
XTCDECL
VOID
ArYieldProcessor(VOID)
AR::CpuFunc::YieldProcessor(VOID)
{
__asm__ volatile("pause"
:
:
: "memory");
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
VOID
ArClearInterruptFlag(VOID)
{
AR::CpuFunc::ClearInterruptFlag();
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
BOOLEAN
ArCpuId(IN OUT PCPUID_REGISTERS Registers)
{
return AR::CpuFunc::CpuId(Registers);
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
VOID
ArHalt(VOID)
{
AR::CpuFunc::Halt();
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
ULONG_PTR
ArReadControlRegister(IN USHORT ControlRegister)
{
return AR::CpuFunc::ReadControlRegister(ControlRegister);
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
ULONGLONG
ArReadModelSpecificRegister(IN ULONG Register)
{
return AR::CpuFunc::ReadModelSpecificRegister(Register);
}
/* NEEDED BY XTLDR */
XTCLINK
XTCDECL
VOID
ArWriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
{
AR::CpuFunc::WriteControlRegister(ControlRegister, Value);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArYieldProcessor(VOID)
{
AR::CpuFunc::YieldProcessor();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArReadWriteBarrier(VOID)
{
AR::CpuFunc::ReadWriteBarrier();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
BOOLEAN
ArInterruptsEnabled(VOID)
{
return AR::CpuFunc::InterruptsEnabled();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArSetInterruptFlag(VOID)
{
AR::CpuFunc::SetInterruptFlag();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
ULONG
ArReadFSDualWord(ULONG Offset)
{
return AR::CpuFunc::ReadFSDualWord(Offset);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
ULONG_PTR
ArReadDebugRegister(IN USHORT DebugRegister)
{
return AR::CpuFunc::ReadDebugRegister(DebugRegister);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
UINT
ArReadMxCsrRegister(VOID)
{
return AR::CpuFunc::ReadMxCsrRegister();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArStoreGlobalDescriptorTable(IN PVOID Source)
{
AR::CpuFunc::StoreGlobalDescriptorTable(Source);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArStoreInterruptDescriptorTable(IN PVOID Source)
{
AR::CpuFunc::StoreInterruptDescriptorTable(Source);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArStoreLocalDescriptorTable(IN PVOID Source)
{
AR::CpuFunc::StoreLocalDescriptorTable(Source);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArStoreTaskRegister(OUT PVOID Destination)
{
AR::CpuFunc::StoreTaskRegister(Destination);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArFlushTlb(VOID)
{
AR::CpuFunc::FlushTlb();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTCDECL
VOID
ArWriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
{
AR::CpuFunc::WriteModelSpecificRegister(Register, Value);
}

34
xtoskrnl/ar/i686/data.cc Normal file
View File

@@ -0,0 +1,34 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/i686/data.cc
* DESCRIPTION: I686 architecture-specific global and static data
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.hh>
/* Initial kernel boot stack */
UCHAR AR::ProcSup::BootStack[KERNEL_STACK_SIZE] = {};
/* Double Fault gate */
UCHAR AR::ProcSup::DoubleFaultTss[KTSS_IO_MAPS];
/* Initial kernel fault stack */
UCHAR AR::ProcSup::FaultStack[KERNEL_STACK_SIZE] = {};
/* Initial GDT */
KGDTENTRY AR::ProcSup::InitialGdt[GDT_ENTRIES] = {};
/* Initial IDT */
KIDTENTRY AR::ProcSup::InitialIdt[IDT_ENTRIES] = {};
/* Initial Processor Block */
KPROCESSOR_BLOCK AR::ProcSup::InitialProcessorBlock;
/* Initial TSS */
KTSS AR::ProcSup::InitialTss;
/* NMI task gate */
UCHAR AR::ProcSup::NonMaskableInterruptTss[KTSS_IO_MAPS];

View File

@@ -1,32 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/i686/globals.c
* DESCRIPTION: XT architecture library global variables
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
/* Initial GDT */
KGDTENTRY ArInitialGdt[GDT_ENTRIES] = {0};
/* Initial IDT */
KIDTENTRY ArInitialIdt[IDT_ENTRIES] = {0};
/* Initial Processor Block */
KPROCESSOR_BLOCK ArInitialProcessorBlock;
/* Initial TSS */
KTSS ArInitialTss;
/* Double Fault and NMI task gates */
UCHAR ArpDoubleFaultTss[KTSS_IO_MAPS];
UCHAR ArpNonMaskableInterruptTss[KTSS_IO_MAPS];
/* Initial kernel boot stack */
UCHAR ArKernelBootStack[KERNEL_STACK_SIZE] = {0};
/* Initial kernel fault stack */
UCHAR ArKernelFaultStack[KERNEL_STACK_SIZE] = {0};

View File

@@ -1,116 +1,26 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/i686/procsup.c
* FILE: xtoskrnl/ar/i686/procsup.cc
* DESCRIPTION: I686 processor functionality support
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
* Initializes i686 processor specific structures.
* Gets the base address of the kernel boot stack.
*
* @return This routine does not return any value.
* @return This routine returns a pointer to the kernel boot stack.
*
* @since XT 1.0
*/
XTAPI
VOID
ArInitializeProcessor(IN PVOID ProcessorStructures)
PVOID
AR::ProcSup::GetBootStack(VOID)
{
KDESCRIPTOR GdtDescriptor, IdtDescriptor;
PVOID KernelBootStack, KernelFaultStack;
PKPROCESSOR_BLOCK ProcessorBlock;
PKGDTENTRY Gdt;
PKIDTENTRY Idt;
PKTSS Tss;
/* Check if processor structures buffer provided */
if(ProcessorStructures)
{
/* Assign CPU structures from provided buffer */
ArpInitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
&KernelBootStack, &KernelFaultStack);
/* Use global IDT */
Idt = ArInitialIdt;
}
else
{
/* Use initial structures */
Gdt = ArInitialGdt;
Idt = ArInitialIdt;
Tss = &ArInitialTss;
KernelBootStack = &ArKernelBootStack;
KernelFaultStack = &ArKernelFaultStack;
ProcessorBlock = &ArInitialProcessorBlock;
}
/* Initialize processor block */
ArpInitializeProcessorBlock(ProcessorBlock, Gdt, Idt, Tss, KernelFaultStack);
/* Initialize GDT, IDT and TSS */
ArpInitializeGdt(ProcessorBlock);
ArpInitializeIdt(ProcessorBlock);
ArpInitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
/* Set GDT and IDT descriptors */
GdtDescriptor.Base = Gdt;
GdtDescriptor.Limit = (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1;
IdtDescriptor.Base = Idt;
IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1;
/* Load GDT, IDT and TSS */
ArLoadGlobalDescriptorTable(&GdtDescriptor.Limit);
ArLoadInterruptDescriptorTable(&IdtDescriptor.Limit);
ArLoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Enter passive IRQ level */
HlSetRunLevel(PASSIVE_LEVEL);
/* Initialize segment registers */
ArpInitializeSegments();
/* Initialize processor registers */
ArpInitializeProcessorRegisters();
/* Identify processor */
ArpIdentifyProcessor();
}
/**
* Updates an existing i686 GDT entry with new base address.
*
* @param Gdt
* Supplies a pointer to the GDT.
*
* @param Selector
* Specifies a segment selector of the GDT entry.
*
* @param Base
* Specifies a base address value of the descriptor.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
ArSetGdtEntryBase(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base)
{
PKGDTENTRY GdtEntry;
/* Get GDT entry */
GdtEntry = (PKGDTENTRY)((ULONG_PTR)Gdt + (Selector & ~RPL_MASK));
/* Set new GDT descriptor base */
GdtEntry->BaseLow = (Base & 0xFFFF);
GdtEntry->Bytes.BaseMiddle = ((Base >> 16) & 0xFF);
GdtEntry->Bytes.BaseHigh = ((Base >> 24) & 0xFF);
return (PVOID)BootStack;
}
/**
@@ -123,7 +33,7 @@ ArSetGdtEntryBase(IN PKGDTENTRY Gdt,
*/
XTAPI
VOID
ArpIdentifyProcessor(VOID)
AR::ProcSup::IdentifyProcessor(VOID)
{
PKPROCESSOR_CONTROL_BLOCK Prcb;
CPUID_REGISTERS CpuRegisters;
@@ -141,7 +51,7 @@ ArpIdentifyProcessor(VOID)
ArCpuId(&CpuRegisters);
/* Store CPU vendor in processor control block */
Prcb->CpuId.Vendor = CpuRegisters.Ebx;
Prcb->CpuId.Vendor = (CPU_VENDOR)CpuRegisters.Ebx;
*(PULONG)&Prcb->CpuId.VendorName[0] = CpuRegisters.Ebx;
*(PULONG)&Prcb->CpuId.VendorName[4] = CpuRegisters.Edx;
*(PULONG)&Prcb->CpuId.VendorName[8] = CpuRegisters.Ecx;
@@ -190,6 +100,77 @@ ArpIdentifyProcessor(VOID)
/* TODO: Store a list of CPU features in processor control block */
}
/**
* Initializes i686 processor specific structures.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
{
KDESCRIPTOR GdtDescriptor, IdtDescriptor;
PVOID KernelBootStack, KernelFaultStack;
PKPROCESSOR_BLOCK ProcessorBlock;
PKGDTENTRY Gdt;
PKIDTENTRY Idt;
PKTSS Tss;
/* Check if processor structures buffer provided */
if(ProcessorStructures)
{
/* Assign CPU structures from provided buffer */
InitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
&KernelBootStack, &KernelFaultStack);
/* Use global IDT */
Idt = InitialIdt;
}
else
{
/* Use initial structures */
Gdt = InitialGdt;
Idt = InitialIdt;
Tss = &InitialTss;
KernelBootStack = &BootStack;
KernelFaultStack = &FaultStack;
ProcessorBlock = &InitialProcessorBlock;
}
/* Initialize processor block */
InitializeProcessorBlock(ProcessorBlock, Gdt, Idt, Tss, KernelFaultStack);
/* Initialize GDT, IDT and TSS */
InitializeGdt(ProcessorBlock);
InitializeIdt(ProcessorBlock);
InitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
/* Set GDT and IDT descriptors */
GdtDescriptor.Base = Gdt;
GdtDescriptor.Limit = (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1;
IdtDescriptor.Base = Idt;
IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1;
/* Load GDT, IDT and TSS */
CpuFunc::LoadGlobalDescriptorTable(&GdtDescriptor.Limit);
CpuFunc::LoadInterruptDescriptorTable(&IdtDescriptor.Limit);
CpuFunc::LoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Enter passive IRQ level */
HlSetRunLevel(PASSIVE_LEVEL);
/* Initialize segment registers */
InitializeSegments();
/* Initialize processor registers */
InitializeProcessorRegisters();
/* Identify processor */
IdentifyProcessor();
}
/**
* Initializes the kernel's Global Descriptor Table (GDT).
*
@@ -202,23 +183,23 @@ ArpIdentifyProcessor(VOID)
*/
XTAPI
VOID
ArpInitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
AR::ProcSup::InitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
{
/* Initialize GDT entries */
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_NULL, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_CODE, 0x0, 0xFFFFFFFF, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_DATA, 0x0, 0xFFFFFFFF, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_CODE, 0x0, 0xFFFFFFFF, KGDT_TYPE_CODE, KGDT_DPL_USER, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_DATA, 0x0, 0xFFFFFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_SYS_TSS, (ULONG_PTR)ProcessorBlock->TssBase, sizeof(KTSS) - 1, I686_TSS, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_PB, (ULONG_PTR)ProcessorBlock, sizeof(KPROCESSOR_BLOCK), KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_TEB, 0x0, 0xFFF, KGDT_TYPE_DATA | KGDT_DESCRIPTOR_ACCESSED, KGDT_DPL_USER, 2);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDM_TILE, 0x0400, 0xFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_LDT, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_DF_TSS, 0x20000, 0xFFFF, I686_TSS, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_NMI_TSS, 0x20000, 0xFFFF, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDBS, 0xB8000, 0x3FFF, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0);
ArpSetGdtEntry(ProcessorBlock->GdtBase, KGDT_ALIAS, (ULONG_PTR)ProcessorBlock->GdtBase, (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_NULL, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_CODE, 0x0, 0xFFFFFFFF, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_DATA, 0x0, 0xFFFFFFFF, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_CODE, 0x0, 0xFFFFFFFF, KGDT_TYPE_CODE, KGDT_DPL_USER, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_DATA, 0x0, 0xFFFFFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_SYS_TSS, (ULONG_PTR)ProcessorBlock->TssBase, sizeof(KTSS) - 1, I686_TSS, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_PB, (ULONG_PTR)ProcessorBlock, sizeof(KPROCESSOR_BLOCK), KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_TEB, 0x0, 0xFFF, KGDT_TYPE_DATA | KGDT_DESCRIPTOR_ACCESSED, KGDT_DPL_USER, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDM_TILE, 0x0400, 0xFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_LDT, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_DF_TSS, 0x20000, 0xFFFF, I686_TSS, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_NMI_TSS, 0x20000, 0xFFFF, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDBS, 0xB8000, 0x3FFF, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_ALIAS, (ULONG_PTR)ProcessorBlock->GdtBase, (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0);
}
/**
@@ -233,7 +214,7 @@ ArpInitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
*/
XTAPI
VOID
ArpInitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
AR::ProcSup::InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
{
UINT Vector;
@@ -241,34 +222,34 @@ ArpInitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
for(Vector = 0; Vector < IDT_ENTRIES; Vector++)
{
/* Set the IDT to handle unexpected interrupts */
ArpSetIdtGate(ProcessorBlock->IdtBase, Vector, ArpHandleTrapFF, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, Vector, (PVOID)ArTrap0xFF, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
}
/* Setup IDT handlers for known interrupts and traps */
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x00, ArpTrap0x00, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x01, ArpTrap0x01, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x02, ArpTrap0x02, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x03, ArpTrap0x03, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x04, ArpTrap0x04, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x05, ArpTrap0x05, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x06, ArpTrap0x06, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x07, ArpTrap0x07, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x08, ArpTrap0x08, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x09, ArpTrap0x09, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0A, ArpTrap0x0A, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0B, ArpTrap0x0B, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0C, ArpTrap0x0C, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0D, ArpTrap0x0D, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x0E, ArpTrap0x0E, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x10, ArpTrap0x10, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x11, ArpTrap0x11, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x12, ArpTrap0x12, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x13, ArpTrap0x13, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x2A, ArpTrap0x2A, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x2B, ArpTrap0x2B, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x2C, ArpTrap0x2C, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x2D, ArpTrap0x2D, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
ArpSetIdtGate(ProcessorBlock->IdtBase, 0x2E, ArpTrap0x2E, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x00, (PVOID)ArTrap0x00, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x01, (PVOID)ArTrap0x01, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x02, (PVOID)ArTrap0x02, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x03, (PVOID)ArTrap0x03, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x04, (PVOID)ArTrap0x04, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x05, (PVOID)ArTrap0x05, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x06, (PVOID)ArTrap0x06, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x07, (PVOID)ArTrap0x07, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x08, (PVOID)ArTrap0x08, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x09, (PVOID)ArTrap0x09, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0A, (PVOID)ArTrap0x0A, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0B, (PVOID)ArTrap0x0B, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0C, (PVOID)ArTrap0x0C, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0D, (PVOID)ArTrap0x0D, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0E, (PVOID)ArTrap0x0E, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x10, (PVOID)ArTrap0x10, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x11, (PVOID)ArTrap0x11, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x12, (PVOID)ArTrap0x12, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x13, (PVOID)ArTrap0x13, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x2A, (PVOID)ArTrap0x2A, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2B, (PVOID)ArTrap0x2B, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2C, (PVOID)ArTrap0x2C, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2D, (PVOID)ArTrap0x2D, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2E, (PVOID)ArTrap0x2E, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
}
/**
@@ -292,18 +273,18 @@ ArpInitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
*/
XTAPI
VOID
ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKGDTENTRY Gdt,
IN PKIDTENTRY Idt,
IN PKTSS Tss,
IN PVOID DpcStack)
AR::ProcSup::InitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKGDTENTRY Gdt,
IN PKIDTENTRY Idt,
IN PKTSS Tss,
IN PVOID DpcStack)
{
/* Set processor block and processor control block */
ProcessorBlock->Self = ProcessorBlock;
ProcessorBlock->CurrentPrcb = &ProcessorBlock->Prcb;
/* Set GDT, IDT and TSS descriptors */
ProcessorBlock->GdtBase = Gdt;
ProcessorBlock->GdtBase = (PKGDTENTRY)(PVOID)Gdt;
ProcessorBlock->IdtBase = Idt;
ProcessorBlock->TssBase = Tss;
@@ -320,10 +301,10 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
ProcessorBlock->Prcb.ProcessorState.SpecialRegisters.KernelDr7 = 0;
/* Set process and thread information */
ProcessorBlock->Prcb.CurrentThread = &KeInitialThread.ThreadControlBlock;
ProcessorBlock->Prcb.CurrentThread->ApcState.Process = &KeInitialProcess.ProcessControlBlock;
ProcessorBlock->Prcb.IdleThread = &KeInitialThread.ThreadControlBlock;
ProcessorBlock->Prcb.NextThread = NULL;
ProcessorBlock->Prcb.CurrentThread = &(KE::KThread::GetInitialThread())->ThreadControlBlock;
ProcessorBlock->Prcb.CurrentThread->ApcState.Process = &(KE::KProcess::GetInitialProcess())->ProcessControlBlock;
ProcessorBlock->Prcb.IdleThread = &(KE::KThread::GetInitialThread())->ThreadControlBlock;
ProcessorBlock->Prcb.NextThread = nullptr;
/* Set initial runlevel */
ProcessorBlock->RunLevel = PASSIVE_LEVEL;
@@ -338,13 +319,13 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
*/
XTAPI
VOID
ArpInitializeProcessorRegisters(VOID)
AR::ProcSup::InitializeProcessorRegisters(VOID)
{
/* Clear EFLAGS register */
ArWriteEflagsRegister(0);
CpuFunc::WriteEflagsRegister(0);
/* Enable write-protection */
ArWriteControlRegister(0, ArReadControlRegister(0) | CR0_WP);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) | CR0_WP);
}
/**
@@ -374,12 +355,12 @@ ArpInitializeProcessorRegisters(VOID)
*/
XTAPI
VOID
ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKGDTENTRY *Gdt,
OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack)
AR::ProcSup::InitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKGDTENTRY *Gdt,
OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack)
{
UINT_PTR Address;
@@ -394,15 +375,15 @@ ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
*KernelFaultStack = (PVOID)Address;
/* Assign a space for GDT and advance */
*Gdt = (PVOID)Address;
*Gdt = (PKGDTENTRY)(PVOID)Address;
Address += sizeof(ArInitialGdt);
/* Assign a space for Processor Block and advance */
*ProcessorBlock = (PVOID)Address;
*ProcessorBlock = (PKPROCESSOR_BLOCK)(PVOID)Address;
Address += sizeof(ArInitialProcessorBlock);
/* Assign a space for TSS */
*Tss = (PVOID)Address;
*Tss = (PKTSS)(PVOID)Address;
}
/**
@@ -414,13 +395,13 @@ ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
*/
XTAPI
VOID
ArpInitializeSegments(VOID)
AR::ProcSup::InitializeSegments(VOID)
{
/* Initialize segments */
ArLoadSegment(SEGMENT_CS, KGDT_R0_CODE);
ArLoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
ArLoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
ArLoadSegment(SEGMENT_FS, KGDT_R0_PB);
CpuFunc::LoadSegment(SEGMENT_CS, KGDT_R0_CODE);
CpuFunc::LoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_FS, KGDT_R0_PB);
}
/**
@@ -435,9 +416,9 @@ ArpInitializeSegments(VOID)
*/
XTAPI
VOID
ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack,
IN PVOID KernelFaultStack)
AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack,
IN PVOID KernelFaultStack)
{
/* Clear I/O map */
RtlSetMemory(ProcessorBlock->TssBase->IoMaps[0].IoMap, 0xFF, IOPM_FULL_SIZE);
@@ -468,8 +449,8 @@ ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
ProcessorBlock->TssBase->Ss0 = KGDT_R0_DATA;
/* Initialize task gates for DoubleFault and NMI traps */
ArpSetDoubleFaultTssEntry(ProcessorBlock, KernelFaultStack);
ArpSetNonMaskableInterruptTssEntry(ProcessorBlock, KernelFaultStack);
SetDoubleFaultTssEntry(ProcessorBlock, KernelFaultStack);
SetNonMaskableInterruptTssEntry(ProcessorBlock, KernelFaultStack);
}
/**
@@ -484,8 +465,8 @@ ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
*/
XTAPI
VOID
ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelFaultStack)
AR::ProcSup::SetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelFaultStack)
{
PKGDTENTRY TaskGateEntry, TssEntry;
PKTSS Tss;
@@ -498,20 +479,20 @@ ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
((PKIDTENTRY)TaskGateEntry)->Selector = KGDT_DF_TSS;
/* Initialize DoubleFault TSS and set initial state */
Tss = (PKTSS)ArpDoubleFaultTss;
Tss = (PKTSS)DoubleFaultTss;
Tss->IoMapBase = sizeof(KTSS);
Tss->Flags = 0;
Tss->LDT = KGDT_R0_LDT;
Tss->CR3 = ArReadControlRegister(3);
Tss->CR3 = CpuFunc::ReadControlRegister(3);
Tss->Esp = (ULONG_PTR)KernelFaultStack;
Tss->Esp0 = (ULONG_PTR)KernelFaultStack;
Tss->Eip = PtrToUlong(ArpHandleTrap08);
Tss->Eip = PtrToUlong(ArTrap0x08);
Tss->Cs = KGDT_R0_CODE;
Tss->Ds = KGDT_R3_DATA | RPL_MASK;
Tss->Es = KGDT_R3_DATA | RPL_MASK;
Tss->Fs = KGDT_R0_PB;
Tss->Ss0 = KGDT_R0_DATA;
ArStoreSegment(SEGMENT_SS, (PVOID)&Tss->Ss);
CpuFunc::StoreSegment(SEGMENT_SS, (PVOID)&Tss->Ss);
/* Setup DoubleFault TSS entry in Global Descriptor Table */
TssEntry = (PKGDTENTRY)(&(ProcessorBlock->GdtBase[KGDT_DF_TSS / sizeof(KGDTENTRY)]));
@@ -555,13 +536,13 @@ ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
*/
XTAPI
VOID
ArpSetGdtEntry(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base,
IN ULONG Limit,
IN UCHAR Type,
IN UCHAR Dpl,
IN UCHAR SegmentMode)
AR::ProcSup::SetGdtEntry(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base,
IN ULONG Limit,
IN UCHAR Type,
IN UCHAR Dpl,
IN UCHAR SegmentMode)
{
PKGDTENTRY GdtEntry;
UCHAR Granularity;
@@ -601,6 +582,39 @@ ArpSetGdtEntry(IN PKGDTENTRY Gdt,
GdtEntry->Bits.Type = (Type & 0x1F);
}
/**
* Updates an existing i686 GDT entry with new base address.
*
* @param Gdt
* Supplies a pointer to the GDT.
*
* @param Selector
* Specifies a segment selector of the GDT entry.
*
* @param Base
* Specifies a base address value of the descriptor.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
AR::ProcSup::SetGdtEntryBase(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base)
{
PKGDTENTRY GdtEntry;
/* Get GDT entry */
GdtEntry = (PKGDTENTRY)((ULONG_PTR)Gdt + (Selector & ~RPL_MASK));
/* Set new GDT descriptor base */
GdtEntry->BaseLow = (Base & 0xFFFF);
GdtEntry->Bytes.BaseMiddle = ((Base >> 16) & 0xFF);
GdtEntry->Bytes.BaseHigh = ((Base >> 24) & 0xFF);
}
/**
* Fills in a call, interrupt, task or trap gate entry.
*
@@ -628,12 +642,12 @@ ArpSetGdtEntry(IN PKGDTENTRY Gdt,
*/
XTAPI
VOID
ArpSetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Vector,
IN PVOID Handler,
IN USHORT Selector,
IN USHORT Ist,
IN USHORT Access)
AR::ProcSup::SetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Vector,
IN PVOID Handler,
IN USHORT Selector,
IN USHORT Ist,
IN USHORT Access)
{
/* Setup the gate */
Idt[Vector].Offset = (USHORT)((ULONG)Handler & 0xFFFF);
@@ -654,8 +668,8 @@ ArpSetIdtGate(IN PKIDTENTRY Idt,
*/
XTAPI
VOID
ArpSetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelFaultStack)
AR::ProcSup::SetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelFaultStack)
{
PKGDTENTRY TaskGateEntry, TssEntry;
PKTSS Tss;
@@ -668,19 +682,19 @@ ArpSetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
((PKIDTENTRY)TaskGateEntry)->Selector = KGDT_NMI_TSS;
/* Initialize NMI TSS and set initial state */
Tss = (PKTSS)ArpNonMaskableInterruptTss;
Tss = (PKTSS)NonMaskableInterruptTss;
Tss->IoMapBase = sizeof(KTSS);
Tss->Flags = 0;
Tss->LDT = KGDT_R0_LDT;
Tss->CR3 = ArReadControlRegister(3);
Tss->Esp = (ULONG_PTR)KernelFaultStack;
Tss->Esp0 = (ULONG_PTR)KernelFaultStack;
Tss->Eip = PtrToUlong(ArpHandleTrap02);
Tss->Eip = PtrToUlong(ArTrap0x02);
Tss->Cs = KGDT_R0_CODE;
Tss->Ds = KGDT_R3_DATA | RPL_MASK;
Tss->Es = KGDT_R3_DATA | RPL_MASK;
Tss->Fs = KGDT_R0_PB;
ArStoreSegment(SEGMENT_SS, (PVOID)&Tss->Ss);
CpuFunc::StoreSegment(SEGMENT_SS, (PVOID)&Tss->Ss);
/* Setup NMI TSS entry in Global Descriptor Table */
TssEntry = (PKGDTENTRY)(&(ProcessorBlock->GdtBase[KGDT_NMI_TSS / sizeof(KGDTENTRY)]));

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/i686/traps.c
* FILE: xtoskrnl/ar/i686/traps.cc
* DESCRIPTION: I686 system traps
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -21,110 +21,110 @@
*/
XTCDECL
VOID
ArpDispatchTrap(IN PKTRAP_FRAME TrapFrame)
AR::Traps::DispatchTrap(IN PKTRAP_FRAME TrapFrame)
{
/* Check vector and call appropriate handler */
switch(TrapFrame->Vector)
{
case 0x00:
/* Divide By Zero exception */
ArpHandleTrap00(TrapFrame);
HandleTrap00(TrapFrame);
break;
case 0x01:
/* Debug exception */
ArpHandleTrap01(TrapFrame);
HandleTrap01(TrapFrame);
break;
case 0x02:
/* Non-Maskable Interrupt (NMI) */
ArpHandleTrap02(TrapFrame);
HandleTrap02(TrapFrame);
break;
case 0x03:
/* INT3 instruction executed */
ArpHandleTrap03(TrapFrame);
HandleTrap03(TrapFrame);
break;
case 0x04:
/* Overflow exception */
ArpHandleTrap04(TrapFrame);
HandleTrap04(TrapFrame);
break;
case 0x05:
/* Bound Range Exceeded exception */
ArpHandleTrap05(TrapFrame);
HandleTrap05(TrapFrame);
break;
case 0x06:
/* Invalid Opcode exception */
ArpHandleTrap06(TrapFrame);
HandleTrap06(TrapFrame);
break;
case 0x07:
/* Device Not Available exception */
ArpHandleTrap07(TrapFrame);
HandleTrap07(TrapFrame);
break;
case 0x08:
/* Double Fault exception */
ArpHandleTrap08(TrapFrame);
HandleTrap08(TrapFrame);
break;
case 0x09:
/* Segment Overrun exception */
ArpHandleTrap09(TrapFrame);
HandleTrap09(TrapFrame);
break;
case 0x0A:
/* Invalid TSS exception */
ArpHandleTrap0A(TrapFrame);
HandleTrap0A(TrapFrame);
break;
case 0x0B:
/* Segment Not Present exception */
ArpHandleTrap0B(TrapFrame);
HandleTrap0B(TrapFrame);
break;
case 0x0C:
/* Stack Segment Fault exception */
ArpHandleTrap0C(TrapFrame);
HandleTrap0C(TrapFrame);
break;
case 0x0D:
/* General Protection Fault (GPF) exception*/
ArpHandleTrap0D(TrapFrame);
HandleTrap0D(TrapFrame);
break;
case 0x0E:
/* Page Fault exception */
ArpHandleTrap0E(TrapFrame);
HandleTrap0E(TrapFrame);
break;
case 0x10:
/* X87 Floating-Point exception */
ArpHandleTrap10(TrapFrame);
HandleTrap10(TrapFrame);
break;
case 0x11:
/* Alignment Check exception */
ArpHandleTrap11(TrapFrame);
HandleTrap11(TrapFrame);
break;
case 0x12:
/* Machine Check exception */
ArpHandleTrap12(TrapFrame);
HandleTrap12(TrapFrame);
break;
case 0x13:
/* SIMD Floating-Point exception */
ArpHandleTrap13(TrapFrame);
HandleTrap13(TrapFrame);
break;
case 0x2A:
/* Tick Count service request */
ArpHandleTrap2A(TrapFrame);
HandleTrap2A(TrapFrame);
break;
case 0x2B:
/* User-mode callback return */
ArpHandleTrap2B(TrapFrame);
HandleTrap2B(TrapFrame);
break;
case 0x2C:
/* Assertion raised */
ArpHandleTrap2C(TrapFrame);
HandleTrap2C(TrapFrame);
break;
case 0x2D:
/* Debug-Service-Request raised */
ArpHandleTrap2D(TrapFrame);
HandleTrap2D(TrapFrame);
break;
case 0x2E:
/* System call service request */
ArpHandleTrap2E(TrapFrame);
HandleTrap2E(TrapFrame);
break;
default:
/* Unknown/Unexpected trap */
ArpHandleTrapFF(TrapFrame);
HandleTrapFF(TrapFrame);
break;
}
}
@@ -141,7 +141,7 @@ ArpDispatchTrap(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap00(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap00(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Division-By-Zero Error (0x00)!\n");
for(;;);
@@ -159,7 +159,7 @@ ArpHandleTrap00(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap01(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap01(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Debug exception (0x01)!\n");
for(;;);
@@ -177,7 +177,7 @@ ArpHandleTrap01(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap02(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n");
for(;;);
@@ -195,7 +195,7 @@ ArpHandleTrap02(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap03(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap03(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled INT3 (0x03)!\n");
for(;;);
@@ -213,7 +213,7 @@ ArpHandleTrap03(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap04(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap04(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Overflow exception (0x04)!\n");
for(;;);
@@ -231,7 +231,7 @@ ArpHandleTrap04(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap05(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap05(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Bound-Range-Exceeded exception (0x05)!\n");
for(;;);
@@ -249,7 +249,7 @@ ArpHandleTrap05(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap06(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap06(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Invalid Opcode exception (0x06)!\n");
for(;;);
@@ -267,7 +267,7 @@ ArpHandleTrap06(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap07(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap07(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Device Not Available exception (0x07)!\n");
for(;;);
@@ -285,7 +285,7 @@ ArpHandleTrap07(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap08(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap08(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Double-Fault exception (0x08)!\n");
for(;;);
@@ -303,7 +303,7 @@ ArpHandleTrap08(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap09(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap09(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Segment-Overrun exception (0x09)!\n");
for(;;);
@@ -321,7 +321,7 @@ ArpHandleTrap09(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0A(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0A(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Invalid-TSS exception (0x0A)!\n");
for(;;);
@@ -339,7 +339,7 @@ ArpHandleTrap0A(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0B(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0B(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Segment-Not-Present exception (0x0B)!\n");
for(;;);
@@ -357,7 +357,7 @@ ArpHandleTrap0B(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0C(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0C(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Stack-Segment-Fault exception (0x0C)!\n");
for(;;);
@@ -375,7 +375,7 @@ ArpHandleTrap0C(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0D(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0D(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled General-Protection-Fault (0x0D)!\n");
for(;;);
@@ -393,7 +393,7 @@ ArpHandleTrap0D(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap0E(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap0E(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Page-Fault exception (0x0E)!\n");
for(;;);
@@ -411,7 +411,7 @@ ArpHandleTrap0E(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap10(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap10(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled x87 Floating-Point exception (0x10)!\n");
for(;;);
@@ -429,7 +429,7 @@ ArpHandleTrap10(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap11(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap11(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Alignment-Check exception (0x11)!\n");
for(;;);
@@ -447,7 +447,7 @@ ArpHandleTrap11(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap12(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap12(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Machine-Check exception (0x12)!\n");
for(;;);
@@ -465,7 +465,7 @@ ArpHandleTrap12(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap13(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap13(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled SIMD Floating-Point exception (0x13)!\n");
for(;;);
@@ -483,7 +483,7 @@ ArpHandleTrap13(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap2A(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap2A(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Unhandled Tick Count service request (0x2A)!\n");
}
@@ -500,7 +500,7 @@ ArpHandleTrap2A(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap2B(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap2B(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Unhandled Callback return service request (0x2B)!\n");
}
@@ -517,7 +517,7 @@ ArpHandleTrap2B(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap2C(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap2C(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Assertion (0x2C)!\n");
for(;;);
@@ -535,7 +535,7 @@ ArpHandleTrap2C(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap2D(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap2D(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Debug-Service-Request (0x2D)!\n");
for(;;);
@@ -553,7 +553,7 @@ ArpHandleTrap2D(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrap2E(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrap2E(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Unhandled system call (0x2E)!\n");
}
@@ -570,8 +570,26 @@ ArpHandleTrap2E(IN PKTRAP_FRAME TrapFrame)
*/
XTCDECL
VOID
ArpHandleTrapFF(IN PKTRAP_FRAME TrapFrame)
AR::Traps::HandleTrapFF(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Unexpected-Interrupt (0xFF)!\n");
for(;;);
}
/**
* C-linkage wrapper for dispatching the trap provided by common trap handler.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common trap handler on the stack.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTCDECL
VOID
ArDispatchTrap(IN PKTRAP_FRAME TrapFrame)
{
AR::Traps::DispatchTrap(TrapFrame);
}

112
xtoskrnl/ex/exports.cc Normal file
View File

@@ -0,0 +1,112 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ex/exports.cc
* DESCRIPTION: C-compatible API wrappers for exported kernel functions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.hh>
/**
* Acquires the rundown protection for given descriptor.
*
* @param Descriptor
* Supplies a pointer to the rundown block descriptor.
*
* @return This routine returns TRUE if protection acquired successfully, or FALSE otherwise.
*
* @since NT 5.1
*/
XTFASTCALL
BOOLEAN
ExAcquireRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
return EX::Rundown::AcquireProtection(Descriptor);
}
/**
* Marks the rundown descriptor as completed.
*
* @param Descriptor
* Supplies a pointer to the descriptor to be completed.
*
* @return This routine does not return any value.
*
* @since NT 5.1
*/
XTFASTCALL
VOID
ExCompleteRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
EX::Rundown::CompleteProtection(Descriptor);
}
/**
* Initializes the rundown protection descriptor.
*
* @param Descriptor
* Supplies a pointer to the descriptor to be initialized.
*
* @return This routine does not return any value.
*
* @since NT 5.1
*/
XTFASTCALL
VOID
ExInitializeRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
EX::Rundown::InitializeProtection(Descriptor);
}
/**
* Reinitializes the rundown protection structure after it has been completed.
*
* @param Descriptor
* Supplies a pointer to the descriptor to be reinitialized.
*
* @return This routine does not return any value.
*
* @since NT 5.1
*/
XTFASTCALL
VOID
ExReInitializeRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
EX::Rundown::ReInitializeProtection(Descriptor);
}
/**
* Releases the rundown protection for given descriptor.
*
* @param Descriptor
* Supplies a pointer to the descriptor to be initialized.
*
* @return This routine does not return any value.
*
* @since NT 5.1
*/
XTFASTCALL
VOID
ExReleaseRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
EX::Rundown::ReleaseProtection(Descriptor);
}
/**
* Waits until rundown protection calls are completed.
*
* @param Descriptor
* Supplies a pointer to the rundown block descriptor.
*
* @return This routine does not return any value.
*
* @since NT 5.1
*/
XTFASTCALL
VOID
ExWaitForRundownProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
EX::Rundown::WaitForProtectionRelease(Descriptor);
}

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ex/rundown.c
* FILE: xtoskrnl/ex/rundown.cc
* DESCRIPTION: Rundown protection mechanism
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -21,7 +21,7 @@
*/
XTFASTCALL
BOOLEAN
ExAcquireRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
EX::Rundown::AcquireProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
ULONG_PTR CurrentValue, NewValue;
@@ -42,8 +42,8 @@ ExAcquireRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
NewValue = CurrentValue + 2;
/* Exchange the value */
NewValue = (ULONG_PTR)RtlAtomicCompareExchangePointer(&Descriptor->Ptr, (PVOID)NewValue,
(PVOID)CurrentValue);
NewValue = (ULONG_PTR)RTL::Atomic::CompareExchangePointer(&Descriptor->Ptr, (PVOID)NewValue,
(PVOID)CurrentValue);
/* Make sure protection acquired */
if(NewValue == CurrentValue)
@@ -69,9 +69,9 @@ ExAcquireRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
*/
XTFASTCALL
VOID
ExCompleteRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
EX::Rundown::CompleteProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
RtlAtomicExchangePointer(&Descriptor->Ptr, (PVOID)EX_RUNDOWN_ACTIVE);
RTL::Atomic::ExchangePointer(&Descriptor->Ptr, (PVOID)EX_RUNDOWN_ACTIVE);
}
/**
@@ -86,7 +86,7 @@ ExCompleteRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
*/
XTFASTCALL
VOID
ExInitializeRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
EX::Rundown::InitializeProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
/* Reset descriptor counter */
Descriptor->Count = 0;
@@ -104,9 +104,9 @@ ExInitializeRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
*/
XTFASTCALL
VOID
ExReInitializeRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
EX::Rundown::ReInitializeProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
RtlAtomicExchangePointer(&Descriptor->Ptr, NULL);
RTL::Atomic::ExchangePointer(&Descriptor->Ptr, NULL);
}
/**
@@ -121,7 +121,7 @@ ExReInitializeRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
*/
XTFASTCALL
VOID
ExReleaseRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
EX::Rundown::ReleaseProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
ULONG_PTR CurrentValue, NewValue;
PEX_RUNDOWN_WAIT_BLOCK WaitBlock;
@@ -134,9 +134,9 @@ ExReleaseRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
WaitBlock = (PEX_RUNDOWN_WAIT_BLOCK)(CurrentValue & ~0x1);
if(!RtlAtomicDecrement64((PLONG_PTR)&WaitBlock->Count))
if(!RTL::Atomic::Decrement64((PLONG_PTR)&WaitBlock->Count))
{
KeSetEvent(&WaitBlock->WakeEvent, 0, FALSE);
KE::Event::SetEvent(&WaitBlock->WakeEvent, 0, FALSE);
}
break;
@@ -147,8 +147,8 @@ ExReleaseRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
NewValue = CurrentValue - 2;
/* Exchange the value */
NewValue = (ULONG_PTR)RtlAtomicCompareExchangePointer(&Descriptor->Ptr, (PVOID)NewValue,
(PVOID)CurrentValue);
NewValue = (ULONG_PTR)RTL::Atomic::CompareExchangePointer(&Descriptor->Ptr, (PVOID)NewValue,
(PVOID)CurrentValue);
if(NewValue == CurrentValue)
{
@@ -172,7 +172,7 @@ ExReleaseRundownProtection(IN PEX_RUNDOWN_REFERENCE Descriptor)
*/
XTFASTCALL
VOID
ExWaitForRundownProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor)
EX::Rundown::WaitForProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor)
{
UNIMPLEMENTED;
}

130
xtoskrnl/hl/exports.cc Normal file
View File

@@ -0,0 +1,130 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/hl/exports.cc
* DESCRIPTION: C-compatible API wrappers for exported kernel functions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.hh>
/**
* Reads an 8-bit data from a specified register address.
*
* @param Register
* Supplies a pointer to register address holding data to read.
*
* @return This routine returns a value at the specified register.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
UCHAR
HlReadRegister8(IN PVOID Register)
{
return HL::IoRegister::ReadRegister8(Register);
}
/**
* Reads a 16-bit data from a specified register address.
*
* @param Register
* Supplies a pointer to register address holding data to read.
*
* @return This routine returns a value at the specified register.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
USHORT
HlReadRegister16(IN PVOID Register)
{
return HL::IoRegister::ReadRegister16(Register);
}
/**
* Reads a 32-bit data from a specified register address.
*
* @param Register
* Supplies a pointer to register address holding data to read.
*
* @return This routine returns a value at the specified register.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
ULONG
HlReadRegister32(IN PVOID Register)
{
return HL::IoRegister::ReadRegister32(Register);
}
/**
* Writes an 8-bit value into a specified register address.
*
* @param Register
* Supplies a pointer to register address where data will be written.
*
* @param Value
* Supplies a new value that will be stored into a register.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
HlWriteRegister8(IN PVOID Register,
IN UCHAR Value)
{
HL::IoRegister::WriteRegister8(Register, Value);
}
/**
* Writes a 16-bit value into a specified register address.
*
* @param Register
* Supplies a pointer to register address where data will be written.
*
* @param Value
* Supplies a new value that will be stored into a register.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
HlWriteRegister16(IN PVOID Register,
IN USHORT Value)
{
HL::IoRegister::WriteRegister16(Register, Value);
}
/**
* Writes a 32-bit value into a specified register address.
*
* @param Register
* Supplies a pointer to register address where data will be written.
*
* @param Value
* Supplies a new value that will be stored into a register.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
HlWriteRegister32(IN PVOID Register,
IN ULONG Value)
{
HL::IoRegister::WriteRegister32(Register, Value);
}

View File

@@ -1,73 +1,73 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/rtl/ioreg.c
* DESCRIPTION: I/O registers related routines
* FILE: xtoskrnl/hl/ioreg.cc
* DESCRIPTION: Basic I/O registers access functionality
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
* Reads a byte from a specified register address.
* Reads an 8-bit data from a specified register address.
*
* @param Register
* Supplies a pointer to register address holding data to read.
*
* @return This routine returns UCHAR byte read from the register.
* @return This routine returns a value at the specified register.
*
* @since XT 1.0
*/
XTAPI
UCHAR
RtlReadRegisterByte(IN VOLATILE PVOID Register)
HL::IoRegister::ReadRegister8(IN PVOID Register)
{
return *((VOLATILE PUCHAR)Register);
}
/**
* Reads a byte from a specified register address.
* Reads a 16-bit data from a specified register address.
*
* @param Register
* Supplies a pointer to register address holding data to read.
*
* @return This routine returns ULONG byte read from the register.
*
* @since XT 1.0
*/
XTAPI
ULONG
RtlReadRegisterLong(IN VOLATILE PVOID Register)
{
return *((VOLATILE PULONG)Register);
}
/**
* Reads a byte from a specified register address.
*
* @param Register
* Supplies a pointer to register address holding data to read.
*
* @return This routine returns USHORT byte read from the register.
* @return This routine returns a value at the specified register.
*
* @since XT 1.0
*/
XTAPI
USHORT
RtlReadRegisterShort(IN VOLATILE PVOID Register)
HL::IoRegister::ReadRegister16(IN PVOID Register)
{
return *((VOLATILE PUSHORT)Register);
}
/**
* Writes a byte into a specified register address.
* Reads a 32-bit data from a specified register address.
*
* @param Register
* Supplies a pointer to register address holding data to read.
*
* @return This routine returns a value at the specified register.
*
* @since XT 1.0
*/
XTAPI
ULONG
HL::IoRegister::ReadRegister32(IN PVOID Register)
{
return *((VOLATILE PULONG)Register);
}
/**
* Writes an 8-bit value into a specified register address.
*
* @param Register
* Supplies a pointer to register address where data will be written.
*
* @param Value
* Supplies a new UCHAR value that will be stored into a register.
* Supplies a new value that will be stored into a register.
*
* @return This routine does not return any value.
*
@@ -75,20 +75,20 @@ RtlReadRegisterShort(IN VOLATILE PVOID Register)
*/
XTAPI
VOID
RtlWriteRegisterByte(IN VOLATILE PVOID Register,
IN UCHAR Value)
HL::IoRegister::WriteRegister8(IN PVOID Register,
IN UCHAR Value)
{
*((VOLATILE PUCHAR)Register) = Value;
}
/**
* Writes a byte into a specified register address.
* Writes a 16-bit value into a specified register address.
*
* @param Register
* Supplies a pointer to register address where data will be written.
*
* @param Value
* Supplies a new ULONG value that will be stored into a register.
* Supplies a new value that will be stored into a register.
*
* @return This routine does not return any value.
*
@@ -96,29 +96,29 @@ RtlWriteRegisterByte(IN VOLATILE PVOID Register,
*/
XTAPI
VOID
RtlWriteRegisterLong(IN VOLATILE PVOID Register,
IN ULONG Value)
{
*((VOLATILE PULONG)Register) = Value;
}
/**
* Writes a byte into a specified register address.
*
* @param Register
* Supplies a pointer to register address where data will be written.
*
* @param Value
* Supplies a new USHORT value that will be stored into a register.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
RtlWriteRegisterShort(IN VOLATILE PVOID Register,
IN USHORT Value)
HL::IoRegister::WriteRegister16(IN PVOID Register,
IN USHORT Value)
{
*((VOLATILE PUSHORT)Register) = Value;
}
/**
* Writes a 32-bit value into a specified register address.
*
* @param Register
* Supplies a pointer to register address where data will be written.
*
* @param Value
* Supplies a new value that will be stored into a register.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
HL::IoRegister::WriteRegister32(IN PVOID Register,
IN ULONG Value)
{
*((VOLATILE PULONG)Register) = Value;
}

View File

@@ -46,7 +46,7 @@ HlReadApicRegister(IN APIC_REGISTER Register)
else
{
/* Read from xAPIC */
return RtlReadRegisterLong((PULONG)(APIC_BASE + (Register << 4)));
return HlReadRegister32((PULONG)(APIC_BASE + (Register << 4)));
}
}
@@ -91,7 +91,7 @@ HlWriteApicRegister(IN APIC_REGISTER Register,
else
{
/* Write to xAPIC */
RtlWriteRegisterLong((PULONG)(APIC_BASE + (Register << 4)), Value);
HlWriteRegister32((PULONG)(APIC_BASE + (Register << 4)), Value);
}
}

View File

@@ -25,6 +25,10 @@ XTCDECL
VOID
ArFlushTlb(VOID);
XTAPI
PVOID
ArGetBootStack(VOID);
XTCDECL
ULONG
ArGetCpuFlags(VOID);
@@ -431,4 +435,8 @@ XTCDECL
VOID
ArpTrap0xE1(VOID);
XTCDECL
VOID
ArpTrap0xFF(VOID);
#endif /* __XTOSKRNL_AMD64_ARI_H */

View File

@@ -55,6 +55,6 @@ KepStartKernel(VOID);
XTAPI
VOID
KepSwitchBootStack(IN ULONG_PTR Stack);
KepSwitchBootStack();
#endif /* __XTOSKRNL_AMD64_KEI_H */

18
xtoskrnl/includes/ar.hh Normal file
View File

@@ -0,0 +1,18 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ar.hh
* DESCRIPTION: Architecture Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_AR_HH
#define __XTOSKRNL_AR_HH
#include <xtos.hh>
#include XTOS_ARCH_HEADER(ar, cpufunc.hh)
#include XTOS_ARCH_HEADER(ar, procsup.hh)
#include XTOS_ARCH_HEADER(ar, traps.hh)
#endif /* __XTOSKRNL_AR_HH */

View File

@@ -0,0 +1,62 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ar/amd64/cpufunc.hh
* DESCRIPTION: Architecture-specific CPU control and utility functions for low-level system operations
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_AR_CPUFUNC_HH
#define __XTOSKRNL_AR_CPUFUNC_HH
#include <xtos.hh>
/* Architecture-specific Library */
namespace AR
{
class CpuFunc
{
public:
STATIC XTCDECL VOID ClearInterruptFlag(VOID);
STATIC XTCDECL BOOLEAN CpuId(IN OUT PCPUID_REGISTERS Registers);
STATIC XTCDECL VOID FlushTlb(VOID);
STATIC XTCDECL ULONG GetCpuFlags(VOID);
STATIC XTASSEMBLY XTCDECL ULONG_PTR GetStackPointer(VOID);
STATIC XTCDECL VOID Halt(VOID);
STATIC XTCDECL BOOLEAN InterruptsEnabled(VOID);
STATIC XTCDECL VOID InvalidateTlbEntry(IN PVOID Address);
STATIC XTCDECL VOID LoadGlobalDescriptorTable(IN PVOID Source);
STATIC XTCDECL VOID LoadInterruptDescriptorTable(IN PVOID Source);
STATIC XTCDECL VOID LoadLocalDescriptorTable(IN USHORT Source);
STATIC XTCDECL VOID LoadMxcsrRegister(IN ULONG Source);
STATIC XTCDECL VOID LoadSegment(IN USHORT Segment,
IN ULONG Source);
STATIC XTCDECL VOID LoadTaskRegister(USHORT Source);
STATIC XTCDECL VOID MemoryBarrier(VOID);
STATIC XTCDECL ULONG_PTR ReadControlRegister(IN USHORT ControlRegister);
STATIC XTCDECL ULONG_PTR ReadDebugRegister(IN USHORT DebugRegister);
STATIC XTCDECL ULONGLONG ReadGSQuadWord(ULONG Offset);
STATIC XTCDECL ULONGLONG ReadModelSpecificRegister(IN ULONG Register);
STATIC XTCDECL UINT ReadMxCsrRegister(VOID);
STATIC XTCDECL ULONGLONG ReadTimeStampCounter(VOID);
STATIC XTCDECL VOID ReadWriteBarrier(VOID);
STATIC XTCDECL VOID SetInterruptFlag(VOID);
STATIC XTCDECL VOID StoreGlobalDescriptorTable(OUT PVOID Destination);
STATIC XTCDECL VOID StoreInterruptDescriptorTable(OUT PVOID Destination);
STATIC XTCDECL VOID StoreLocalDescriptorTable(OUT PVOID Destination);
STATIC XTCDECL VOID StoreSegment(IN USHORT Segment,
OUT PVOID Destination);
STATIC XTCDECL VOID StoreTaskRegister(OUT PVOID Destination);
STATIC XTCDECL VOID WriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value);
STATIC XTCDECL VOID WriteDebugRegister(IN USHORT DebugRegister,
IN UINT_PTR Value);
STATIC XTCDECL VOID WriteEflagsRegister(IN UINT_PTR Value);
STATIC XTCDECL VOID WriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value);
STATIC XTCDECL VOID YieldProcessor(VOID);
};
}
#endif /* __XTOSKRNL_AR_CPUFUNC_HH */

View File

@@ -0,0 +1,71 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ar/amd64/procsup.hh
* DESCRIPTION: Architecture-specific routines for AMD64 processor initialization and system structure setup
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_AR_PROCSUP_HH
#define __XTOSKRNL_AR_PROCSUP_HH
#include <xtos.hh>
/* Architecture-specific Library */
namespace AR
{
class ProcSup
{
private:
STATIC UCHAR BootStack[KERNEL_STACK_SIZE];
STATIC UCHAR FaultStack[KERNEL_STACK_SIZE];
STATIC KGDTENTRY InitialGdt[GDT_ENTRIES];
STATIC KIDTENTRY InitialIdt[IDT_ENTRIES];
STATIC KPROCESSOR_BLOCK InitialProcessorBlock;
STATIC KTSS InitialTss;
public:
STATIC XTAPI PVOID GetBootStack(VOID);
STATIC XTAPI VOID InitializeProcessor(IN PVOID ProcessorStructures);
private:
STATIC XTAPI VOID IdentifyProcessor(VOID);
STATIC XTAPI VOID InitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock);
STATIC XTAPI VOID InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock);
STATIC XTAPI VOID InitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKGDTENTRY Gdt,
IN PKIDTENTRY Idt,
IN PKTSS Tss,
IN PVOID DpcStack);
STATIC XTAPI VOID InitializeProcessorRegisters(VOID);
STATIC XTAPI VOID InitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKGDTENTRY *Gdt,
OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack);
STATIC XTAPI VOID InitializeSegments(VOID);
STATIC XTAPI VOID InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack,
IN PVOID KernelFaultStack);
STATIC XTAPI VOID SetGdtEntry(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base,
IN ULONG Limit,
IN UCHAR Type,
IN UCHAR Dpl,
IN UCHAR SegmentMode);
STATIC XTAPI VOID SetGdtEntryBase(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base);
STATIC XTAPI VOID SetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Vector,
IN PVOID Handler,
IN USHORT Selector,
IN USHORT Ist,
IN USHORT Access);
};
}
#endif /* __XTOSKRNL_AR_PROCSUP_HH */

View File

@@ -0,0 +1,180 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ar/amd64/traps.hh
* DESCRIPTION: Trap handling routines and the dispatcher for processor exceptions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_AR_TRAPS_HH
#define __XTOSKRNL_AR_TRAPS_HH
#include <xtos.hh>
/* Architecture-specific Library */
namespace AR
{
class Traps
{
public:
STATIC XTCDECL VOID DispatchTrap(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID InitializeSystemCallMsrs(VOID);
private:
STATIC XTCDECL VOID HandleSystemCall32(VOID);
STATIC XTCDECL VOID HandleSystemCall64(VOID);
STATIC XTCDECL VOID HandleTrap00(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap01(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap02(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap03(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap04(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap05(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap06(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap07(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap08(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap09(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0A(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0B(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0C(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0D(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0E(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap10(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap11(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap12(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap13(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap1F(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap2C(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap2D(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap2F(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrapE1(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrapFF(IN PKTRAP_FRAME TrapFrame);
};
}
XTCLINK
XTCDECL
VOID
ArTrap0x00(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x01(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x02(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x03(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x04(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x05(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x06(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x07(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x08(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x09(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0A(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0B(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0C(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0D(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0E(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x10(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x11(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x12(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x13(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x1F(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x2C(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x2D(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x2F(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0xE1(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0xFF(VOID);
#endif /* __XTOSKRNL_AR_TRAPS_HH */

View File

@@ -0,0 +1,61 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ar/i686/cpufunc.hh
* DESCRIPTION: Architecture-specific CPU control and utility functions for low-level system operations
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_AR_CPUFUNC_HH
#define __XTOSKRNL_AR_CPUFUNC_HH
#include <xtos.hh>
/* Architecture-specific Library */
namespace AR
{
class CpuFunc
{
public:
STATIC XTCDECL VOID ClearInterruptFlag(VOID);
STATIC XTCDECL BOOLEAN CpuId(IN OUT PCPUID_REGISTERS Registers);
STATIC XTCDECL VOID FlushTlb(VOID);
STATIC XTCDECL ULONG GetCpuFlags(VOID);
STATIC XTASSEMBLY XTCDECL ULONG_PTR GetStackPointer(VOID);
STATIC XTCDECL VOID Halt(VOID);
STATIC XTCDECL BOOLEAN InterruptsEnabled(VOID);
STATIC XTCDECL VOID InvalidateTlbEntry(IN PVOID Address);
STATIC XTCDECL VOID LoadGlobalDescriptorTable(IN PVOID Source);
STATIC XTCDECL VOID LoadInterruptDescriptorTable(IN PVOID Source);
STATIC XTCDECL VOID LoadLocalDescriptorTable(IN USHORT Source);
STATIC XTCDECL VOID LoadSegment(IN USHORT Segment,
IN ULONG Source);
STATIC XTCDECL VOID LoadTaskRegister(USHORT Source);
STATIC XTCDECL VOID MemoryBarrier(VOID);
STATIC XTCDECL ULONG_PTR ReadControlRegister(IN USHORT ControlRegister);
STATIC XTCDECL ULONG_PTR ReadDebugRegister(IN USHORT DebugRegister);
STATIC XTCDECL ULONG ReadFSDualWord(ULONG Offset);
STATIC XTCDECL ULONGLONG ReadModelSpecificRegister(IN ULONG Register);
STATIC XTCDECL UINT ReadMxCsrRegister(VOID);
STATIC XTCDECL ULONGLONG ReadTimeStampCounter(VOID);
STATIC XTCDECL VOID ReadWriteBarrier(VOID);
STATIC XTCDECL VOID SetInterruptFlag(VOID);
STATIC XTCDECL VOID StoreGlobalDescriptorTable(OUT PVOID Destination);
STATIC XTCDECL VOID StoreInterruptDescriptorTable(OUT PVOID Destination);
STATIC XTCDECL VOID StoreLocalDescriptorTable(OUT PVOID Destination);
STATIC XTCDECL VOID StoreSegment(IN USHORT Segment,
OUT PVOID Destination);
STATIC XTCDECL VOID StoreTaskRegister(OUT PVOID Destination);
STATIC XTCDECL VOID WriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value);
STATIC XTCDECL VOID WriteDebugRegister(IN USHORT DebugRegister,
IN UINT_PTR Value);
STATIC XTCDECL VOID WriteEflagsRegister(IN UINT_PTR Value);
STATIC XTCDECL VOID WriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value);
STATIC XTCDECL VOID YieldProcessor(VOID);
};
}
#endif /* __XTOSKRNL_AR_CPUFUNC_HH */

View File

@@ -0,0 +1,79 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ar/i686/procsup.hh
* DESCRIPTION: Architecture-specific routines for i686 processor initialization and system structure setup
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_AR_PROCSUP_HH
#define __XTOSKRNL_AR_PROCSUP_HH
#include <xtos.hh>
/* Architecture-specific Library */
namespace AR
{
class ProcSup
{
private:
STATIC UCHAR BootStack[KERNEL_STACK_SIZE];
STATIC UCHAR DoubleFaultTss[KTSS_IO_MAPS];
STATIC UCHAR FaultStack[KERNEL_STACK_SIZE];
STATIC KGDTENTRY InitialGdt[GDT_ENTRIES];
STATIC KIDTENTRY InitialIdt[IDT_ENTRIES];
STATIC KPROCESSOR_BLOCK InitialProcessorBlock;
STATIC KTSS InitialTss;
STATIC UCHAR NonMaskableInterruptTss[KTSS_IO_MAPS];
public:
STATIC XTAPI PVOID GetBootStack(VOID);
STATIC XTAPI VOID InitializeProcessor(IN PVOID ProcessorStructures);
private:
STATIC XTAPI VOID IdentifyProcessor(VOID);
STATIC XTAPI VOID InitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock);
STATIC XTAPI VOID InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock);
STATIC XTAPI VOID InitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKGDTENTRY Gdt,
IN PKIDTENTRY Idt,
IN PKTSS Tss,
IN PVOID DpcStack);
STATIC XTAPI VOID InitializeProcessorRegisters(VOID);
STATIC XTAPI VOID InitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKGDTENTRY *Gdt,
OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack);
STATIC XTAPI VOID InitializeSegments(VOID);
STATIC XTAPI VOID InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack,
IN PVOID KernelFaultStack);
STATIC XTAPI VOID SetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelFaultStack);
STATIC XTAPI VOID SetGdtEntry(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base,
IN ULONG Limit,
IN UCHAR Type,
IN UCHAR Dpl,
IN UCHAR SegmentMode);
STATIC XTAPI VOID SetGdtEntryBase(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base);
STATIC XTAPI VOID SetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Vector,
IN PVOID Handler,
IN USHORT Selector,
IN USHORT Ist,
IN USHORT Access);
STATIC XTAPI VOID SetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelFaultStack);
};
}
#endif /* __XTOSKRNL_AR_PROCSUP_HH */

View File

@@ -0,0 +1,177 @@
/**@s
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ar/i686/traps.hh
* DESCRIPTION: Trap handling routines and the dispatcher for processor exceptions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_AR_TRAPS_HH
#define __XTOSKRNL_AR_TRAPS_HH
#include <xtos.hh>
/* Architecture-specific Library */
namespace AR
{
class Traps
{
public:
STATIC XTCDECL VOID DispatchTrap(IN PKTRAP_FRAME TrapFrame);
private:
STATIC XTCDECL VOID HandleTrap00(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap01(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap02(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap03(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap04(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap05(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap06(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap07(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap08(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap09(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0A(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0B(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0C(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0D(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap0E(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap10(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap11(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap12(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap13(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap2A(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap2B(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap2C(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap2D(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrap2E(IN PKTRAP_FRAME TrapFrame);
STATIC XTCDECL VOID HandleTrapFF(IN PKTRAP_FRAME TrapFrame);
};
}
XTCLINK
XTCDECL
VOID
ArTrap0x00(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x01(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x02(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x03(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x04(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x05(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x06(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x07(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x08(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x09(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0A(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0B(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0C(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0D(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x0E(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x10(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x11(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x12(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x13(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x2A(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x2B(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x2C(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x2D(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0x2E(VOID);
XTCLINK
XTCDECL
VOID
ArTrap0xFF(VOID);
#endif /* __XTOSKRNL_AR_TRAPS_HH */

16
xtoskrnl/includes/ex.hh Normal file
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@@ -0,0 +1,16 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ex.hh
* DESCRIPTION: Kernel Executive
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_EX_HH
#define __XTOSKRNL_EX_HH
#include <xtos.hh>
#include <ex/rundown.hh>
#endif /* __XTOSKRNL_EX_HH */

View File

@@ -0,0 +1,30 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ex/rundown.hh
* DESCRIPTION: Rundown protection mechanism
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_EX_RUNDOWN_HH
#define __XTOSKRNL_EX_RUNDOWN_HH
#include <xtos.hh>
/* Architecture-specific Library */
namespace EX
{
class Rundown
{
public:
STATIC XTFASTCALL BOOLEAN AcquireProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
STATIC XTFASTCALL VOID CompleteProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
STATIC XTFASTCALL VOID InitializeProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
STATIC XTFASTCALL VOID ReInitializeProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
STATIC XTFASTCALL VOID ReleaseProtection(IN PEX_RUNDOWN_REFERENCE Descriptor);
STATIC XTFASTCALL VOID WaitForProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor);
};
}
#endif /* __XTOSKRNL_EX_RUNDOWN_HH */

17
xtoskrnl/includes/hl.hh Normal file
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@@ -0,0 +1,17 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/hl.hh
* DESCRIPTION: Hardware Layer
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_HL_HH
#define __XTOSKRNL_HL_HH
#include <xtos.hh>
#include <hl/ioreg.hh>
#endif /* __XTOSKRNL_HL_HH */

View File

@@ -0,0 +1,33 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/hl/ioreg.hh
* DESCRIPTION: Basic I/O registers access functionality
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_HL_IOREG_HH
#define __XTOSKRNL_HL_IOREG_HH
#include <xtos.hh>
/* Hardware Layer */
namespace HL
{
class IoRegister
{
public:
STATIC XTAPI UCHAR ReadRegister8(IN PVOID Register);
STATIC XTAPI USHORT ReadRegister16(IN PVOID Register);
STATIC XTAPI ULONG ReadRegister32(IN PVOID Register);
STATIC XTAPI VOID WriteRegister8(IN PVOID Register,
IN UCHAR Value);
STATIC XTAPI VOID WriteRegister16(IN PVOID Register,
IN USHORT Value);
STATIC XTAPI VOID WriteRegister32(IN PVOID Register,
IN ULONG Value);
};
}
#endif /* __XTOSKRNL_HL_IOREG_HH */

View File

@@ -25,6 +25,10 @@ XTCDECL
VOID
ArFlushTlb(VOID);
XTAPI
PVOID
ArGetBootStack(VOID);
XTCDECL
ULONG
ArGetCpuFlags(VOID);

View File

@@ -55,6 +55,6 @@ KepStartKernel(VOID);
XTAPI
VOID
KepSwitchBootStack(IN ULONG_PTR Stack);
KepSwitchBootStack();
#endif /* __XTOSKRNL_I686_KEI_H */

31
xtoskrnl/includes/ke.hh Normal file
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@@ -0,0 +1,31 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke.hh
* DESCRIPTION: Kernel Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_HH
#define __XTOSKRNL_KE_HH
#include <xtos.hh>
#include <ke/apc.hh>
#include <ke/bootinfo.hh>
#include <ke/crash.hh>
#include <ke/dpc.hh>
#include <ke/event.hh>
#include <ke/irq.hh>
#include <ke/kprocess.hh>
#include <ke/krnlinit.hh>
#include <ke/kthread.hh>
#include <ke/kubsan.hh>
#include <ke/proc.hh>
#include <ke/runlevel.hh>
#include <ke/semphore.hh>
#include <ke/spinlock.hh>
#include <ke/sysres.hh>
#include <ke/timer.hh>
#endif /* __XTOSKRNL_KE_HH */

View File

@@ -0,0 +1,32 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/apc.hh
* DESCRIPTION: Kernel APC objects support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_APC_HH
#define __XTOSKRNL_KE_APC_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Apc
{
public:
STATIC XTAPI VOID InitializeApc(IN PKAPC Apc,
IN PKTHREAD Thread,
IN KAPC_ENVIRONMENT Environment,
IN PKKERNEL_ROUTINE KernelRoutine,
IN PKRUNDOWN_ROUTINE RundownRoutine,
IN PKNORMAL_ROUTINE NormalRoutine,
IN KPROCESSOR_MODE ApcMode,
IN PVOID Context);
};
}
#endif /* __XTOSKRNL_KE_APC_HH */

View File

@@ -0,0 +1,39 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/bootinfo.hh
* DESCRIPTION: Bootloader-provided system information handling support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_BOOTINFO_HH
#define __XTOSKRNL_KE_BOOTINFO_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class BootInformation
{
private:
STATIC PKERNEL_INITIALIZATION_BLOCK InitializationBlock;
public:
STATIC XTAPI PVOID GetDebugPrint(VOID);
STATIC XTAPI SYSTEM_FIRMWARE_TYPE GetFirmwareType(VOID);
STATIC XTAPI XTSTATUS GetKernelParameter(IN PCWSTR ParameterName,
OUT PCWSTR *Parameter);
STATIC XTAPI PLIST_ENTRY GetSystemResources(VOID);
STATIC XTAPI VOID InitializeInitializationBlock(IN PKERNEL_INITIALIZATION_BLOCK Block);
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
STATIC XTAPI PKERNEL_INITIALIZATION_BLOCK GetInitializationBlock(VOID)
{
return InitializationBlock;
}
};
}
#endif /* __XTOSKRNL_KE_BOOTINFO_HH */

View File

@@ -0,0 +1,31 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/crash.hh
* DESCRIPTION: System shutdown and kernel panic mechanism
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_CRASH_HH
#define __XTOSKRNL_KE_CRASH_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Crash
{
public:
STATIC XTAPI VOID HaltSystem(VOID);
STATIC XTAPI VOID Panic(IN ULONG Code);
STATIC XTAPI VOID PanicEx(IN ULONG Code,
IN ULONG_PTR Parameter1,
IN ULONG_PTR Parameter2,
IN ULONG_PTR Parameter3,
IN ULONG_PTR Parameter4);
};
}
#endif /* __XTOSKRNL_KE_CRASH_HH */

View File

@@ -0,0 +1,37 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/dpc.hh
* DESCRIPTION: Deferred Procedure Call (DPC) support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_DPC_HH
#define __XTOSKRNL_KE_DPC_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Dpc
{
public:
STATIC XTAPI VOID InitializeDpc(IN PKDPC Dpc,
IN PKDEFERRED_ROUTINE DpcRoutine,
IN PVOID DpcContext);
STATIC XTAPI VOID InitializeThreadedDpc(IN PKDPC Dpc,
IN PKDEFERRED_ROUTINE DpcRoutine,
IN PVOID DpcContext);
STATIC XTAPI VOID SetTargetProcessor(IN PKDPC Dpc,
IN CCHAR Number);
STATIC XTAPI VOID SignalCallDone(IN PVOID SystemArgument);
STATIC XTAPI BOOLEAN SignalCallSynchronize(IN PVOID SystemArgument);
private:
STATIC XTFASTCALL VOID RetireList(IN PKPROCESSOR_CONTROL_BLOCK Prcb);
};
}
#endif /* __XTOSKRNL_KE_DPC_HH */

View File

@@ -0,0 +1,31 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/event.hh
* DESCRIPTION: Kernel events support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_EVENT_HH
#define __XTOSKRNL_KE_EVENT_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Event
{
public:
STATIC XTAPI VOID ClearEvent(IN PKEVENT Event);
STATIC XTAPI VOID InitializeEvent(OUT PKEVENT Event,
IN KEVENT_TYPE EventType,
IN BOOLEAN InitialState);
STATIC XTAPI LONG SetEvent(IN PKEVENT Event,
IN KPRIORITY Increment,
IN BOOLEAN Wait);
};
}
#endif /* __XTOSKRNL_KE_EVENT_HH */

View File

@@ -0,0 +1,27 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/info.hh
* DESCRIPTION: Generic kernel information support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_INFO_HH
#define __XTOSKRNL_KE_INFO_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Info
{
public:
STATIC XTAPI SYSTEM_FIRMWARE_TYPE GetFirmwareType(VOID);
STATIC XTAPI XTSTATUS GetKernelParameter(IN PCWSTR ParameterName,
OUT PCWSTR *Parameter);
};
}
#endif /* __XTOSKRNL_KE_INFO_HH */

View File

@@ -0,0 +1,26 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/irq.hh
* DESCRIPTION: Kernel interrupts support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_IRQ_HH
#define __XTOSKRNL_KE_IRQ_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Irq
{
public:
STATIC XTAPI VOID SetInterruptHandler(IN ULONG Vector,
IN PVOID Handler);
};
}
#endif /* __XTOSKRNL_KE_IRQ_HH */

View File

@@ -0,0 +1,33 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/kprocess.hh
* DESCRIPTION: XT kernel process manipulation support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_KPROCESS_HH
#define __XTOSKRNL_KE_KPROCESS_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class KProcess
{
private:
STATIC EPROCESS InitialProcess;
public:
STATIC XTAPI PEPROCESS GetInitialProcess(VOID);
STATIC XTAPI VOID InitializeProcess(IN OUT PKPROCESS Process,
IN KPRIORITY Priority,
IN KAFFINITY Affinity,
IN PULONG_PTR DirectoryTable,
IN BOOLEAN Alignment);
};
}
#endif /* __XTOSKRNL_KE_KPROCESS_HH */

View File

@@ -0,0 +1,30 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/krnlinit.hh
* DESCRIPTION: XTOS Kernel initialization
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_KRNLINIT_HH
#define __XTOSKRNL_KE_KRNLINIT_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class KernelInit
{
public:
STATIC XTAPI VOID InitializeMachine(VOID);
STATIC XTAPI VOID SwitchBootStack(VOID);
private:
STATIC XTAPI VOID InitializeKernel(VOID);
STATIC XTAPI VOID StartKernel(VOID);
};
}
#endif /* __XTOSKRNL_KE_KRNLINIT_HH */

View File

@@ -0,0 +1,55 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/kthread.hh
* DESCRIPTION: XT kernel thread manipulation support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_KTHREAD_HH
#define __XTOSKRNL_KE_KTHREAD_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class KThread
{
private:
STATIC ETHREAD InitialThread;
public:
STATIC XTFASTCALL VOID ExitDispatcher(IN KRUNLEVEL OldRunLevel);
STATIC XTAPI PETHREAD GetInitialThread(VOID);
STATIC XTAPI XTSTATUS InitializeThread(IN PKPROCESS Process,
IN OUT PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT Context,
IN PVOID EnvironmentBlock,
IN PVOID Stack,
IN BOOLEAN StartThread);
STATIC XTAPI VOID StartThread(IN PKTHREAD Thread);
private:
STATIC XTAPI VOID InitializeThreadContext(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextRecord);
STATIC XTAPI VOID SuspendNop(IN PKAPC Apc,
IN OUT PKNORMAL_ROUTINE *NormalRoutine,
IN OUT PVOID *NormalContext,
IN OUT PVOID *SystemArgument1,
IN OUT PVOID *SystemArgument2);
STATIC XTAPI VOID SuspendRundown(IN PKAPC Apc);
STATIC XTAPI VOID SuspendThread(IN PVOID NormalContext,
IN PVOID SystemArgument1,
IN PVOID SystemArgument2);
};
}
#endif /* __XTOSKRNL_KE_KTHREAD_HH */

View File

@@ -0,0 +1,67 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/kubsan.hh
* DESCRIPTION: Kernel Undefined Behaviour Sanitizer (UBSAN) error reporting handler
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_KUBSAN_HH
#define __XTOSKRNL_KE_KUBSAN_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class KUbsan
{
private:
STATIC BOOLEAN ActiveFrame;
public:
STATIC XTCDECL VOID HandleDivisionOverflow(PKUBSAN_OVERFLOW_DATA Data,
PVOID Lhs,
PVOID Rhs);
STATIC XTCDECL VOID HandleFloatCastOverflow(PKUBSAN_FLOAT_CAST_OVERFLOW_DATA Data,
ULONG_PTR Lhs,
ULONG_PTR Rhs);
STATIC XTCDECL VOID HandleFunctionTypeMismatch(PKUBSAN_FUNCTION_TYPE_MISMATCH_DATA Data,
ULONG_PTR Pointer);
STATIC XTCDECL VOID HandleIntegerOverflow(PKUBSAN_OVERFLOW_DATA Data,
ULONG_PTR Lhs,
ULONG_PTR Rhs);
STATIC XTCDECL VOID HandleInvalidBuiltin(PKUBSAN_INVALID_BUILTIN_DATA Data);
STATIC XTCDECL VOID HandleMisalignedAccess(PKUBSAN_TYPE_MISMATCH_DATA Data,
ULONG_PTR Pointer);
STATIC XTCDECL VOID HandleNegateOverflow(PKUBSAN_OVERFLOW_DATA Data,
ULONG_PTR OldValue);
STATIC XTCDECL VOID HandleNullPointerDereference(PKUBSAN_TYPE_MISMATCH_DATA Data);
STATIC XTCDECL VOID HandleObjectSizeMismatch(PKUBSAN_TYPE_MISMATCH_DATA Data,
ULONG_PTR Pointer);
STATIC XTCDECL VOID HandleOutOfBounds(PKUBSAN_OUT_OF_BOUNDS_DATA Data,
ULONG_PTR Index);
STATIC XTCDECL VOID HandlePointerOverflow(PKUBSAN_OVERFLOW_DATA Data,
ULONG_PTR Lhs,
ULONG_PTR Rhs);
STATIC XTCDECL VOID HandleShiftOutOfBounds(PKUBSAN_SHIFT_OUT_OF_BOUNDS_DATA Data,
ULONG_PTR Lhs,
ULONG_PTR Rhs);
STATIC XTCDECL VOID HandleTypeMismatch(PKUBSAN_TYPE_MISMATCH_DATA Data,
ULONG_PTR Pointer);
private:
STATIC XTCDECL BOOLEAN CheckReport(PKUBSAN_SOURCE_LOCATION Location);
STATIC XTCDECL VOID EnterFrame(PKUBSAN_SOURCE_LOCATION Location,
PCCHAR Reason);
STATIC XTCDECL LONGLONG GetSignedValue(PKUBSAN_TYPE_DESCRIPTOR Type,
PVOID Value);
STATIC XTCDECL PCCHAR GetTypeKind(UCHAR TypeCheckKind);
STATIC XTCDECL ULONGLONG GetUnsignedValue(PKUBSAN_TYPE_DESCRIPTOR Type,
PVOID Value);
STATIC XTCDECL VOID LeaveFrame();
};
}
#endif /* __XTOSKRNL_KE_KUBSAN_HH */

View File

@@ -0,0 +1,29 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/proc.hh
* DESCRIPTION: Processor-related functionality for the kernel
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_PROC_HH
#define __XTOSKRNL_KE_PROC_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Processor
{
public:
STATIC XTAPI PKPROCESSOR_BLOCK GetCurrentProcessorBlock(VOID);
STATIC XTAPI PKPROCESSOR_CONTROL_BLOCK GetCurrentProcessorControlBlock(VOID);
STATIC XTAPI ULONG GetCurrentProcessorNumber(VOID);
STATIC XTAPI PKTHREAD GetCurrentThread(VOID);
STATIC XTAPI VOID SaveProcessorState(OUT PKPROCESSOR_STATE CpuState);
};
}
#endif /* __XTOSKRNL_KE_PROC_HH */

View File

@@ -0,0 +1,27 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/runlevel.hh
* DESCRIPTION: Running Level management support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_RUNLEVEL_HH
#define __XTOSKRNL_KE_RUNLEVEL_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class RunLevel
{
public:
STATIC XTFASTCALL KRUNLEVEL GetCurrentRunLevel(VOID);
STATIC XTFASTCALL VOID LowerRunLevel(IN KRUNLEVEL RunLevel);
STATIC XTFASTCALL KRUNLEVEL RaiseRunLevel(IN KRUNLEVEL RunLevel);
};
}
#endif /* __XTOSKRNL_KE_RUNLEVEL_HH */

View File

@@ -0,0 +1,32 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/semphore.hh
* DESCRIPTION: Semaphores support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_SEMPHORE_HH
#define __XTOSKRNL_KE_SEMPHORE_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Semaphore
{
public:
STATIC XTAPI VOID InitializeSemaphore(IN PKSEMAPHORE Semaphore,
IN LONG Count,
IN LONG Limit);
STATIC XTAPI LONG ReadState(IN PKSEMAPHORE Semaphore);
STATIC XTAPI LONG ReleaseSemaphore(IN PKSEMAPHORE Semaphore,
IN KPRIORITY Increment,
IN LONG Adjustment,
IN BOOLEAN Wait);
};
}
#endif /* __XTOSKRNL_KE_SEMPHORE_HH */

View File

@@ -0,0 +1,29 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/spinlock.hh
* DESCRIPTION: Spinlocks support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_SPINLOCK_HH
#define __XTOSKRNL_KE_SPINLOCK_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class SpinLock
{
public:
STATIC XTFASTCALL VOID AcquireQueuedSpinLock(IN KSPIN_LOCK_QUEUE_LEVEL LockLevel);
STATIC XTFASTCALL VOID AcquireSpinLock(IN OUT PKSPIN_LOCK SpinLock);
STATIC XTAPI VOID InitializeSpinLock(IN PKSPIN_LOCK SpinLock);
STATIC XTFASTCALL VOID ReleaseQueuedSpinLock(IN KSPIN_LOCK_QUEUE_LEVEL LockLevel);
STATIC XTFASTCALL VOID ReleaseSpinLock(IN OUT PKSPIN_LOCK SpinLock);
};
}
#endif /* __XTOSKRNL_KE_SPINLOCK_HH */

View File

@@ -0,0 +1,40 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/sysres.hh
* DESCRIPTION: System boot resources management
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_SYSRES_HH
#define __XTOSKRNL_KE_SYSRES_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class SystemResources
{
private:
STATIC LIST_ENTRY ResourcesListHead;
STATIC KSPIN_LOCK ResourcesLock;
public:
STATIC XTAPI XTSTATUS AcquireResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader);
STATIC XTAPI XTSTATUS GetResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader);
STATIC XTAPI VOID InitializeResources(VOID);
STATIC XTAPI VOID ReleaseResource(IN PSYSTEM_RESOURCE_HEADER ResourceHeader);
private:
STATIC XTAPI XTSTATUS GetSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
IN BOOLEAN ResourceLock,
OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader);
};
}
#endif /* __XTOSKRNL_KE_SYSRES_HH */

View File

@@ -0,0 +1,37 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/ke/timer.hh
* DESCRIPTION: Kernel timer object support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_KE_TIMER_HH
#define __XTOSKRNL_KE_TIMER_HH
#include <xtos.hh>
/* Kernel Library */
namespace KE
{
class Timer
{
public:
STATIC XTAPI BOOLEAN CancelTimer(IN PKTIMER Timer);
STATIC XTAPI VOID ClearTimer(IN PKTIMER Timer);
STATIC XTAPI BOOLEAN GetState(IN PKTIMER Timer);
STATIC XTAPI VOID InitializeTimer(OUT PKTIMER Timer,
IN KTIMER_TYPE Type);
STATIC XTAPI ULONGLONG QueryTimer(IN PKTIMER Timer);
STATIC XTAPI VOID SetTimer(IN PKTIMER Timer,
IN LARGE_INTEGER DueTime,
IN LONG Period,
IN PKDPC Dpc);
private:
STATIC XTAPI VOID RemoveTimer(IN OUT PKTIMER Timer);
};
}
#endif /* __XTOSKRNL_KE_TIMER_HH */

View File

@@ -13,6 +13,10 @@
/* Kernel services routines forward references */
XTAPI
PKERNEL_INITIALIZATION_BLOCK
KeGetInitializationBlock(VOID);
XTAPI
VOID
KeClearEvent(IN PKEVENT Event);

17
xtoskrnl/includes/po.hh Normal file
View File

@@ -0,0 +1,17 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/po.hh
* DESCRIPTION: Power Management
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_PO_HH
#define __XTOSKRNL_PO_HH
#include <xtos.hh>
#include <po/idle.hh>
#endif /* __XTOSKRNL_PO_HH */

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@@ -0,0 +1,33 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/po/idle.hh
* DESCRIPTION: Processor idle functionality support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_PO_IDLE_HH
#define __XTOSKRNL_PO_IDLE_HH
#include <xtos.hh>
/* Runtime Library */
namespace PO
{
class Idle
{
public:
STATIC XTAPI VOID InitializeProcessorIdleState(IN OUT PKPROCESSOR_CONTROL_BLOCK Prcb);
private:
STATIC XTFASTCALL VOID Idle0Function(IN PPROCESSOR_POWER_STATE PowerState);
STATIC XTAPI VOID PerfIdle(IN PPROCESSOR_POWER_STATE PowerState);
STATIC XTAPI VOID PerfIdleDpc(IN PKDPC Dpc,
IN PVOID DeferredContext,
IN PVOID SystemArgument1,
IN PVOID SystemArgument2);
};
}
#endif /* __XTOSKRNL_PO_IDLE_HH */

25
xtoskrnl/includes/rtl.hh Normal file
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@@ -0,0 +1,25 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl.hh
* DESCRIPTION: Runtime Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_HH
#define __XTOSKRNL_RTL_HH
#include <xtos.hh>
#include <rtl/atomic.hh>
#include <rtl/bitmap.hh>
#include <rtl/dispatch.hh>
#include <rtl/endian.hh>
#include <rtl/guid.hh>
#include <rtl/llist.hh>
#include <rtl/math.hh>
#include <rtl/memory.hh>
#include <rtl/string.hh>
#include <rtl/widestr.hh>
#endif /* __XTOSKRNL_RTL_HH */

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@@ -0,0 +1,97 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/atomic.hh
* DESCRIPTION: Atomic operations support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_ATOMIC_HH
#define __XTOSKRNL_RTL_ATOMIC_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class Atomic
{
public:
STATIC XTFASTCALL CHAR And8(IN PCHAR Address,
IN CHAR Mask);
STATIC XTFASTCALL SHORT And16(IN PSHORT Address,
IN SHORT Mask);
STATIC XTFASTCALL LONG And32(IN PLONG Address,
IN LONG Mask);
STATIC XTFASTCALL LONG_PTR And64(IN PLONG_PTR Address,
IN LONG_PTR Mask);
STATIC XTFASTCALL UCHAR BitTestAndSet(IN PLONG Base,
IN LONG Offset);
STATIC XTFASTCALL UCHAR BitTestAndSet64(IN PLONGLONG Base,
IN LONGLONG Offset);
STATIC XTFASTCALL CHAR CompareExchange8(IN PCHAR Address,
IN CHAR Comperand,
IN CHAR Exchange);
STATIC XTFASTCALL SHORT CompareExchange16(IN PSHORT Address,
IN SHORT Comperand,
IN SHORT Exchange);
STATIC XTFASTCALL LONG CompareExchange32(IN PLONG Address,
IN LONG Comperand,
IN LONG Exchange);
STATIC XTFASTCALL LONG_PTR CompareExchange64(IN PLONG_PTR Address,
IN LONG_PTR Comperand,
IN LONG_PTR Exchange);
STATIC XTFASTCALL PVOID CompareExchangePointer(IN PVOID *Address,
IN PVOID Comperand,
IN PVOID Exchange);
STATIC XTFASTCALL CHAR Decrement8(IN PCHAR Address);
STATIC XTFASTCALL SHORT Decrement16(IN PSHORT Address);
STATIC XTFASTCALL LONG Decrement32(IN PLONG Address);
STATIC XTFASTCALL LONG_PTR Decrement64(IN PLONG_PTR Address);
STATIC XTFASTCALL CHAR Exchange8(IN PCHAR Address,
IN CHAR Exchange);
STATIC XTFASTCALL SHORT Exchange16(IN PSHORT Address,
IN SHORT Exchange);
STATIC XTFASTCALL LONG Exchange32(IN PLONG Address,
IN LONG Exchange);
STATIC XTFASTCALL LONG_PTR Exchange64(IN PLONG_PTR Address,
IN LONG_PTR Exchange);
STATIC XTFASTCALL CHAR ExchangeAdd8(IN PCHAR Address,
IN CHAR Value);
STATIC XTFASTCALL SHORT ExchangeAdd16(IN PSHORT Address,
IN SHORT Value);
STATIC XTFASTCALL LONG ExchangeAdd32(IN PLONG Address,
IN LONG Value);
STATIC XTFASTCALL LONG_PTR ExchangeAdd64(IN PLONG_PTR Address,
IN LONG_PTR Value);
STATIC XTFASTCALL PVOID ExchangePointer(IN PVOID *Address,
IN PVOID Exchange);
STATIC XTFASTCALL PSINGLE_LIST_ENTRY FlushSingleList(IN PSINGLE_LIST_HEADER Header);
STATIC XTFASTCALL CHAR Increment8(IN PCHAR Address);
STATIC XTFASTCALL SHORT Increment16(IN PSHORT Address);
STATIC XTFASTCALL LONG Increment32(IN PLONG Address);
STATIC XTFASTCALL LONG_PTR Increment64(IN PLONG_PTR Address);
STATIC XTFASTCALL CHAR Or8(IN PCHAR Address,
IN CHAR Mask);
STATIC XTFASTCALL SHORT Or16(IN PSHORT Address,
IN SHORT Mask);
STATIC XTFASTCALL LONG Or32(IN PLONG Address,
IN LONG Mask);
STATIC XTFASTCALL LONG_PTR Or64(IN PLONG_PTR Address,
IN LONG_PTR Mask);
STATIC XTFASTCALL XTFASTCALL PSINGLE_LIST_ENTRY PopEntrySingleList(IN PSINGLE_LIST_HEADER Header);
STATIC XTFASTCALL PSINGLE_LIST_ENTRY PushEntrySingleList(IN PSINGLE_LIST_HEADER Header,
IN PSINGLE_LIST_ENTRY Entry);
STATIC XTFASTCALL CHAR Xor8(IN PCHAR Address,
IN CHAR Mask);
STATIC XTFASTCALL SHORT Xor16(IN PSHORT Address,
IN SHORT Mask);
STATIC XTFASTCALL LONG Xor32(IN PLONG Address,
IN LONG Mask);
STATIC XTFASTCALL LONG_PTR Xor64(IN PLONG_PTR Address,
IN LONG_PTR Mask);
};
}
#endif /* __XTOSKRNL_RTL_ATOMIC_HH */

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@@ -0,0 +1,64 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/bitmap.hh
* DESCRIPTION: Bit maps support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_BITMAP_HH
#define __XTOSKRNL_RTL_BITMAP_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class BitMap
{
public:
STATIC XTAPI VOID ClearAllBits(IN PRTL_BITMAP BitMap);
STATIC XTAPI VOID ClearBit(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Bit);
STATIC XTAPI VOID ClearBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR StartingIndex,
IN ULONG_PTR Length);
STATIC XTAPI ULONG ClearSetBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR Index);
STATIC XTAPI VOID DumpBitMap(IN PRTL_BITMAP BitMap);
STATIC XTAPI ULONG_PTR FindClearBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR Index);
STATIC XTAPI ULONG_PTR FindSetBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR Index);
STATIC XTAPI VOID InitializeBitMap(IN PRTL_BITMAP BitMap,
IN PULONG_PTR Buffer,
IN ULONG Size);
STATIC XTAPI VOID SetAllBits(IN PRTL_BITMAP BitMap);
STATIC XTAPI VOID SetBit(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Bit);
STATIC XTAPI VOID SetBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR StartingIndex,
IN ULONG_PTR Length);
STATIC XTAPI ULONG SetClearBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR Index);
STATIC XTAPI BOOLEAN TestBit(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Bit);
private:
STATIC XTAPI ULONG_PTR CountBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR StartingIndex,
IN BOOLEAN SetBits);
STATIC XTAPI ULONG_PTR FindBits(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Length,
IN ULONG_PTR StartingIndex,
IN BOOLEAN SetBits);
};
}
#endif /* __XTOSKRNL_RTL_BITMAP_HH */

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@@ -0,0 +1,26 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/dispatch.hh
* DESCRIPTION: Dispatching support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_DISPATCH_HH
#define __XTOSKRNL_RTL_DISPATCH_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class Dispatcher
{
public:
STATIC XTAPI VOID GetStackLimits(OUT PULONG_PTR StackBase,
OUT PULONG_PTR StackLimit);
};
}
#endif /* __XTOSKRNL_RTL_DISPATCH_HH */

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@@ -0,0 +1,27 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/endian.hh
* DESCRIPTION: Endian conversion routines
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_ENDIAN_HH
#define __XTOSKRNL_RTL_ENDIAN_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class Endianness
{
public:
STATIC XTFASTCALL USHORT SwapByte16(IN USHORT Source);
STATIC XTFASTCALL ULONG SwapByte32(IN ULONG Source);
STATIC XTFASTCALL ULONGLONG SwapByte64(IN ULONGLONG Source);
};
}
#endif /* __XTOSKRNL_RTL_ENDIAN_HH */

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@@ -0,0 +1,26 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/gui.hh
* DESCRIPTION: Endian conversion routines
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_GUID_HH
#define __XTOSKRNL_RTL_GUID_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class Guid
{
public:
STATIC XTAPI BOOLEAN CompareGuids(IN PGUID Guid1,
IN PGUID Guid2);
};
}
#endif /* __XTOSKRNL_RTL_GUID_HH */

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@@ -0,0 +1,33 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/llist.hh
* DESCRIPTION: Linked list manipulation routines
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_LLIST_HH
#define __XTOSKRNL_RTL_LLIST_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class LinkedList
{
public:
STATIC XTCDECL VOID InitializeListHead(IN PLIST_ENTRY ListHead);
STATIC XTCDECL VOID InitializeListHead32(IN PLIST_ENTRY32 ListHead);
STATIC XTCDECL VOID InsertHeadList(IN OUT PLIST_ENTRY ListHead,
IN PLIST_ENTRY Entry);
STATIC XTCDECL VOID InsertTailList(IN OUT PLIST_ENTRY ListHead,
IN PLIST_ENTRY Entry);
STATIC XTCDECL BOOLEAN ListEmpty(IN PLIST_ENTRY ListHead);
STATIC XTCDECL BOOLEAN ListLoop(IN PLIST_ENTRY ListHead);
STATIC XTCDECL VOID RemoveEntryList(IN PLIST_ENTRY Entry);
};
}
#endif /* __XTOSKRNL_RTL_LLIST_HH */

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@@ -0,0 +1,51 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/math.hh
* DESCRIPTION: Kernel math support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_MATH_HH
#define __XTOSKRNL_RTL_MATH_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class Math
{
public:
STATIC XTAPI LARGE_INTEGER ConvertToLargeInteger32(IN LONG Value);
STATIC XTAPI LARGE_INTEGER ConvertToLargeIntegerUnsigned32(IN ULONG Value);
STATIC XTAPI INT CountLeadingZeroes32(IN ULONG Value);
STATIC XTAPI INT CountLeadingZeroes64(IN ULONGLONG Value);
STATIC XTAPI INT CountTrailingZeroes32(IN ULONG Value);
STATIC XTAPI INT CountTrailingZeroes64(IN ULONGLONG Value);
STATIC XTAPI LONGLONG Divide32(IN LONG Dividend,
IN LONG Divisor,
OUT PLONG Remainder);
STATIC XTAPI LONGLONG Divide64(IN LONGLONG Dividend,
IN LONGLONG Divisor,
OUT PLONGLONG Remainder);
STATIC XTAPI ULONGLONG DivideUnsigned32(IN ULONG Dividend,
IN ULONG Divisor,
OUT PULONG Remainder);
STATIC XTAPI ULONGLONG DivideUnsigned64(IN ULONGLONG Dividend,
IN ULONGLONG Divisor,
OUT PULONGLONG Remainder);
STATIC XTAPI LARGE_INTEGER DivideLargeInteger(IN LARGE_INTEGER Dividend,
IN ULONG Divisor,
OUT PULONG Remainder);
STATIC XTAPI LONG GetBaseExponent(IN DOUBLE Value,
OUT PDOUBLE PowerOfTen);
STATIC XTAPI BOOLEAN InfiniteDouble(IN DOUBLE Value);
STATIC XTAPI LARGE_INTEGER MultiplyLargeInteger(IN LARGE_INTEGER Multiplicand,
IN LONG Multiplier);
STATIC XTAPI BOOLEAN NanDouble(IN DOUBLE Value);
};
}
#endif /* __XTOSKRNL_RTL_MATH_HH */

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@@ -0,0 +1,41 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/memory.hh
* DESCRIPTION: Memory related routines
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_MEMORY_HH
#define __XTOSKRNL_RTL_MEMORY_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class Memory
{
public:
STATIC XTAPI SIZE_T CompareMemory(IN PCVOID LeftBuffer,
IN PCVOID RightBuffer,
IN SIZE_T Length);
STATIC XTAPI VOID CopyMemory(OUT PVOID Destination,
IN PCVOID Source,
IN SIZE_T Length);
STATIC XTAPI VOID MoveMemory(OUT PVOID Destination,
IN PCVOID Source,
IN SIZE_T Length);
STATIC XTAPI BOOLEAN SameMemory(IN PCVOID LeftBuffer,
IN PCVOID RightBuffer,
IN SIZE_T Length);
STATIC XTAPI VOID SetMemory(OUT PVOID Destination,
IN UCHAR Byte,
IN SIZE_T Length);
STATIC XTAPI VOID ZeroMemory(OUT PVOID Destination,
IN SIZE_T Length);
};
}
#endif /* __XTOSKRNL_RTL_MEMORY_HH */

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@@ -0,0 +1,55 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/string.hh
* DESCRIPTION: String support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_STRING_HH
#define __XTOSKRNL_RTL_STRING_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class String
{
public:
STATIC XTAPI SIZE_T CompareString(IN PCSTR String1,
IN PCSTR String2,
IN SIZE_T Length);
STATIC XTAPI SIZE_T CompareStringInsensitive(IN PCSTR String1,
IN PCSTR String2,
IN SIZE_T Length);
STATIC XTAPI PCHAR ConcatenateString(OUT PCHAR Destination,
IN PCHAR Source,
IN SIZE_T Count);
STATIC XTAPI VOID CopyString(IN PCHAR Destination,
IN PCSTR Source,
IN ULONG Length);
STATIC XTAPI PCSTR FindString(IN PCSTR Source,
IN PCSTR Search);
STATIC XTAPI PCSTR FindStringInsensitive(IN PCSTR Source,
IN PCSTR Search);
STATIC XTAPI VOID ReverseString(IN OUT PCHAR String,
IN ULONG Length);
STATIC XTAPI SIZE_T StringLength(IN PCSTR String,
IN SIZE_T MaxLength);
STATIC XTAPI SIZE_T StringToWideString(OUT PWCHAR Destination,
IN PCSTR *Source,
IN SIZE_T Length);
STATIC XTAPI PCHAR TokenizeString(IN PCHAR String,
IN PCSTR Delimiter,
IN OUT PCHAR *SavePtr);
STATIC XTAPI CHAR ToLowerCharacter(IN CHAR Character);
STATIC XTAPI CHAR ToUpperCharacter(IN CHAR Character);
STATIC XTAPI PCHAR TrimLeftString(IN PCHAR String);
STATIC XTAPI PCHAR TrimRightString(IN PCHAR String);
STATIC XTAPI PCHAR TrimString(IN PCHAR String);
};
}
#endif /* __XTOSKRNL_RTL_STRING_HH */

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@@ -0,0 +1,87 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/rtl/widestr.hh
* DESCRIPTION: Wide string support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTOSKRNL_RTL_WIDESTR_HH
#define __XTOSKRNL_RTL_WIDESTR_HH
#include <xtos.hh>
/* Runtime Library */
namespace RTL
{
class WideString
{
public:
STATIC XTAPI SIZE_T CompareWideString(IN PCWSTR String1,
IN PCWSTR String2,
IN SIZE_T Length);
STATIC XTAPI SIZE_T CompareWideStringInsensitive(IN PCWSTR String1,
IN PCWSTR String2,
IN SIZE_T Length);
STATIC XTAPI PWCHAR ConcatenateWideString(OUT PWCHAR Destination,
IN PWCHAR Source,
IN SIZE_T Count);
STATIC XTAPI VOID CopyWideString(IN PWCHAR Destination,
IN PCWSTR Source,
IN ULONG Length);
STATIC XTAPI PCWSTR FindWideString(IN PCWSTR Source,
IN PCWSTR Search);
STATIC XTAPI PCWSTR FindWideStringInsensitive(IN PCWSTR Source,
IN PCWSTR Search);
STATIC XTAPI XTSTATUS FormatWideString(IN PRTL_PRINT_CONTEXT Context,
IN PCWSTR Format,
IN VA_LIST ArgumentList);
STATIC XTAPI VOID ReverseWideString(IN OUT PWCHAR String,
IN ULONG Length);
STATIC XTAPI PWCHAR TokenizeWideString(IN PWCHAR String,
IN PCWSTR Delimiter,
IN OUT PWCHAR *SavePtr);
STATIC XTAPI WCHAR ToLowerWideCharacter(IN WCHAR Character);
STATIC XTAPI WCHAR ToUpperWideCharacter(IN WCHAR Character);
STATIC XTAPI PWCHAR TrimLeftWideString(IN PWCHAR String);
STATIC XTAPI PWCHAR TrimRightWideString(IN PWCHAR String);
STATIC XTAPI PWCHAR TrimWideString(IN PWCHAR String);
STATIC XTAPI SIZE_T WideStringLength(IN PCWSTR String,
IN SIZE_T MaxLength);
private:
STATIC XTAPI XTSTATUS FormatArgumentSpecifier(IN PRTL_PRINT_CONTEXT Context,
IN PCWSTR Format,
IN PVA_LIST ArgumentList,
IN OUT PULONG Index);
STATIC XTAPI ULONGLONG GetArgument(IN PVA_LIST ArgumentList,
IN ULONG ArgumentNumber,
IN LONG ArgumentSize);
STATIC XTAPI ULONGLONG GetSpecifierValue(IN PWCHAR *Format);
STATIC XTAPI XTSTATUS WriteWideCharacter(IN PRTL_PRINT_CONTEXT Context,
IN WCHAR Character);
STATIC XTCDECL XTSTATUS WriteCustomValue(IN PRTL_PRINT_CONTEXT Context,
IN PCWSTR Format,
IN ...);
STATIC XTAPI XTSTATUS WriteDoubleValue(IN PRTL_PRINT_CONTEXT Context,
IN PRTL_PRINT_FORMAT_PROPERTIES FormatProperties,
IN DOUBLE Value);
STATIC XTAPI XTSTATUS WriteHexDoubleValue(IN PRTL_PRINT_CONTEXT Context,
IN PRTL_PRINT_FORMAT_PROPERTIES FormatProperties,
IN DOUBLE Double);
STATIC XTAPI XTSTATUS WriteIntegerValue(IN PRTL_PRINT_CONTEXT Context,
IN PRTL_PRINT_FORMAT_PROPERTIES FormatProperties,
IN ULONGLONG Integer);
STATIC XTAPI XTSTATUS WriteStringValue(PRTL_PRINT_CONTEXT Context,
PRTL_PRINT_FORMAT_PROPERTIES FormatProperties,
PCSTR String,
SIZE_T StringLength);
STATIC XTAPI XTSTATUS WriteValue(PRTL_PRINT_CONTEXT Context,
PRTL_PRINT_FORMAT_PROPERTIES FormatProperties,
PCWSTR String,
SIZE_T StringLength);
};
}
#endif /* __XTOSKRNL_RTL_WIDESTR_HH */

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@@ -15,123 +15,123 @@
/* Runtime Library routines forward references */
XTFASTCALL
CHAR
RtlAtomicAnd8(IN VOLATILE PCHAR Address,
RtlAtomicAnd8(IN PCHAR Address,
IN CHAR Mask);
XTFASTCALL
SHORT
RtlAtomicAnd16(IN VOLATILE PSHORT Address,
RtlAtomicAnd16(IN PSHORT Address,
IN SHORT Mask);
XTFASTCALL
LONG
RtlAtomicAnd32(IN VOLATILE PLONG Address,
RtlAtomicAnd32(IN PLONG Address,
IN LONG Mask);
XTFASTCALL
LONG_PTR
RtlAtomicAnd64(IN VOLATILE PLONG_PTR Address,
RtlAtomicAnd64(IN PLONG_PTR Address,
IN LONG_PTR Mask);
XTFASTCALL
UCHAR
RtlAtomicBitTestAndSet(IN VOLATILE PLONG Base,
RtlAtomicBitTestAndSet(IN PLONG Base,
IN LONG Offset);
XTFASTCALL
UCHAR
RtlAtomicBitTestAndSet64(IN VOLATILE PLONGLONG Base,
RtlAtomicBitTestAndSet64(IN PLONGLONG Base,
IN LONGLONG Offset);
XTFASTCALL
CHAR
RtlAtomicCompareExchange8(IN VOLATILE PCHAR Address,
RtlAtomicCompareExchange8(IN PCHAR Address,
IN CHAR Comperand,
IN CHAR Exchange);
XTFASTCALL
SHORT
RtlAtomicCompareExchange16(IN VOLATILE PSHORT Address,
RtlAtomicCompareExchange16(IN PSHORT Address,
IN SHORT Comperand,
IN SHORT Exchange);
XTFASTCALL
LONG
RtlAtomicCompareExchange32(IN VOLATILE PLONG Address,
RtlAtomicCompareExchange32(IN PLONG Address,
IN LONG Comperand,
IN LONG Exchange);
XTFASTCALL
LONG_PTR
RtlAtomicCompareExchange64(IN VOLATILE PLONG_PTR Address,
RtlAtomicCompareExchange64(IN PLONG_PTR Address,
IN LONG_PTR Comperand,
IN LONG_PTR Exchange);
XTFASTCALL
PVOID
RtlAtomicCompareExchangePointer(IN VOLATILE PVOID *Address,
RtlAtomicCompareExchangePointer(IN PVOID *Address,
IN PVOID Comperand,
IN PVOID Exchange);
XTFASTCALL
CHAR
RtlAtomicDecrement8(IN VOLATILE PCHAR Address);
RtlAtomicDecrement8(IN PCHAR Address);
XTFASTCALL
SHORT
RtlAtomicDecrement16(IN VOLATILE PSHORT Address);
RtlAtomicDecrement16(IN PSHORT Address);
XTFASTCALL
LONG
RtlAtomicDecrement32(IN VOLATILE PLONG Address);
RtlAtomicDecrement32(IN PLONG Address);
XTFASTCALL
LONG_PTR
RtlAtomicDecrement64(IN VOLATILE PLONG_PTR Address);
RtlAtomicDecrement64(IN PLONG_PTR Address);
XTFASTCALL
CHAR
RtlAtomicExchange8(IN VOLATILE PCHAR Address,
RtlAtomicExchange8(IN PCHAR Address,
IN CHAR Exchange);
XTFASTCALL
SHORT
RtlAtomicExchange16(IN VOLATILE PSHORT Address,
RtlAtomicExchange16(IN PSHORT Address,
IN SHORT Exchange);
XTFASTCALL
LONG
RtlAtomicExchange32(IN VOLATILE PLONG Address,
RtlAtomicExchange32(IN PLONG Address,
IN LONG Exchange);
XTFASTCALL
LONG_PTR
RtlAtomicExchange64(IN VOLATILE PLONG_PTR Address,
RtlAtomicExchange64(IN PLONG_PTR Address,
IN LONG_PTR Exchange);
XTFASTCALL
CHAR
RtlAtomicExchangeAdd8(IN VOLATILE PCHAR Address,
RtlAtomicExchangeAdd8(IN PCHAR Address,
IN CHAR Value);
XTFASTCALL
SHORT
RtlAtomicExchangeAdd16(IN VOLATILE PSHORT Address,
RtlAtomicExchangeAdd16(IN PSHORT Address,
IN SHORT Value);
XTFASTCALL
LONG
RtlAtomicExchangeAdd32(IN VOLATILE PLONG Address,
RtlAtomicExchangeAdd32(IN PLONG Address,
IN LONG Value);
XTFASTCALL
LONG_PTR
RtlAtomicExchangeAdd64(IN VOLATILE PLONG_PTR Address,
RtlAtomicExchangeAdd64(IN PLONG_PTR Address,
IN LONG_PTR Value);
XTFASTCALL
PVOID
RtlAtomicExchangePointer(IN VOLATILE PVOID *Address,
RtlAtomicExchangePointer(IN PVOID *Address,
IN PVOID Exchange);
XTFASTCALL
@@ -140,38 +140,38 @@ RtlAtomicFlushSingleList(IN PSINGLE_LIST_HEADER Header);
XTFASTCALL
CHAR
RtlAtomicIncrement8(IN VOLATILE PCHAR Address);
RtlAtomicIncrement8(IN PCHAR Address);
XTFASTCALL
SHORT
RtlAtomicIncrement16(IN VOLATILE PSHORT Address);
RtlAtomicIncrement16(IN PSHORT Address);
XTFASTCALL
LONG
RtlAtomicIncrement32(IN VOLATILE PLONG Address);
RtlAtomicIncrement32(IN PLONG Address);
XTFASTCALL
LONG_PTR
RtlAtomicIncrement64(IN VOLATILE PLONG_PTR Address);
RtlAtomicIncrement64(IN PLONG_PTR Address);
XTFASTCALL
CHAR
RtlAtomicOr8(IN VOLATILE PCHAR Address,
RtlAtomicOr8(IN PCHAR Address,
IN CHAR Mask);
XTFASTCALL
SHORT
RtlAtomicOr16(IN VOLATILE PSHORT Address,
RtlAtomicOr16(IN PSHORT Address,
IN SHORT Mask);
XTFASTCALL
LONG
RtlAtomicOr32(IN VOLATILE PLONG Address,
RtlAtomicOr32(IN PLONG Address,
IN LONG Mask);
XTFASTCALL
LONG_PTR
RtlAtomicOr64(IN VOLATILE PLONG_PTR Address,
RtlAtomicOr64(IN PLONG_PTR Address,
IN LONG_PTR Mask);
XTFASTCALL
@@ -185,22 +185,22 @@ RtlAtomicPushEntrySingleList(IN PSINGLE_LIST_HEADER Header,
XTFASTCALL
CHAR
RtlAtomicXor8(IN VOLATILE PCHAR Address,
RtlAtomicXor8(IN PCHAR Address,
IN CHAR Mask);
XTFASTCALL
SHORT
RtlAtomicXor16(IN VOLATILE PSHORT Address,
RtlAtomicXor16(IN PSHORT Address,
IN SHORT Mask);
XTFASTCALL
LONG
RtlAtomicXor32(IN VOLATILE PLONG Address,
RtlAtomicXor32(IN PLONG Address,
IN LONG Mask);
XTFASTCALL
LONG_PTR
RtlAtomicXor64(IN VOLATILE PLONG_PTR Address,
RtlAtomicXor64(IN PLONG_PTR Address,
IN LONG_PTR Mask);
XTFASTCALL

34
xtoskrnl/includes/xtos.hh Normal file
View File

@@ -0,0 +1,34 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/includes/xtos.hh
* DESCRIPTION: Top level header for the XT kernel
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
/* Preprocessor macro for including arch-specific headers */
#define XTOS_ARCH_HEADER(subsystem, header) STRINGIFY(subsystem/_ARCH/header)
/* Temporary includes for C code compatibility */
extern "C" {
/* XT Development Kit */
#include <xtkmapi.h>
/* XT OS version */
#include <xtver.h>
/* Kernel specific headers */
#include <xtos.h>
}
#include <ar.hh>
#include <ex.hh>
#include <hl.hh>
#include <ke.hh>
#include <po.hh>
#include <rtl.hh>

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/amd64/irqs.c
* FILE: xtoskrnl/ke/amd64/irq.cc
* DESCRIPTION: Kernel interrupts support for amd64 architecture
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -24,16 +24,28 @@
*/
XTAPI
VOID
KeSetInterruptHandler(IN ULONG Vector,
IN PVOID Handler)
KE::Irq::SetInterruptHandler(IN ULONG Vector,
IN PVOID Handler)
{
PKPROCESSOR_BLOCK ProcessorBlock;
/* Get current processor block */
ProcessorBlock = KeGetCurrentProcessorBlock();
ProcessorBlock = KE::Processor::GetCurrentProcessorBlock();
/* Update interrupt handler */
ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF);
ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetMiddle = (((ULONG_PTR)Handler >> 16) & 0xFFFF);
ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetHigh = (ULONG_PTR)Handler >> 32;
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTAPI
VOID
KeSetInterruptHandler(IN ULONG Vector,
IN PVOID Handler)
{
KE::Irq::SetInterruptHandler(Vector, Handler);
}

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/amd64/krnlinit.c
* FILE: xtoskrnl/ke/amd64/krnlinit.cc
* DESCRIPTION: CPU architecture specific kernel initialization
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -18,7 +18,7 @@
*/
XTAPI
VOID
KepInitializeKernel(VOID)
KE::KernelInit::InitializeKernel(VOID)
{
XTSTATUS Status;
@@ -28,7 +28,7 @@ KepInitializeKernel(VOID)
{
/* Hardware layer initialization failed, kernel panic */
DebugPrint(L"Failed to initialize hardware layer subsystem!\n");
KePanic(0);
Crash::Panic(0);
}
}
@@ -41,7 +41,7 @@ KepInitializeKernel(VOID)
*/
XTAPI
VOID
KepInitializeMachine(VOID)
KE::KernelInit::InitializeMachine(VOID)
{
/* Re-enable IDE interrupts */
HlIoPortOutByte(0x376, 0);
@@ -66,7 +66,7 @@ KepInitializeMachine(VOID)
*/
XTAPI
VOID
KepStartKernel(VOID)
KE::KernelInit::StartKernel(VOID)
{
PKPROCESSOR_CONTROL_BLOCK Prcb;
ULONG_PTR PageDirectory[2];
@@ -74,33 +74,32 @@ KepStartKernel(VOID)
PKTHREAD CurrentThread;
/* Get processor control block and current thread */
Prcb = KeGetCurrentProcessorControlBlock();
CurrentThread = KeGetCurrentThread();
Prcb = Processor::GetCurrentProcessorControlBlock();
CurrentThread = Processor::GetCurrentThread();
/* Get current process */
CurrentProcess = CurrentThread->ApcState.Process;
/* Initialize CPU power state structures */
PoInitializeProcessorControlBlock(Prcb);
PO::Idle::InitializeProcessorIdleState(Prcb);
/* Save processor state */
KepSaveProcessorState(&Prcb->ProcessorState);
Processor::SaveProcessorState(&Prcb->ProcessorState);
/* Lower to APC runlevel */
KeLowerRunLevel(APC_LEVEL);
RunLevel::LowerRunLevel(APC_LEVEL);
/* Initialize XTOS kernel */
KepInitializeKernel();
InitializeKernel();
/* Initialize Idle process */
RtlInitializeListHead(&KepProcessListHead);
PageDirectory[0] = 0;
PageDirectory[1] = 0;
KeInitializeProcess(CurrentProcess, 0, MAXULONG_PTR, PageDirectory, FALSE);
KProcess::InitializeProcess(CurrentProcess, 0, MAXULONG_PTR, PageDirectory, FALSE);
CurrentProcess->Quantum = MAXCHAR;
/* Initialize Idle thread */
KeInitializeThread(CurrentProcess, CurrentThread, NULL, NULL, NULL, NULL, NULL, ArKernelBootStack, TRUE);
KThread::InitializeThread(CurrentProcess, CurrentThread, nullptr, nullptr, nullptr, nullptr, nullptr, AR::ProcSup::GetBootStack(), TRUE);
CurrentThread->NextProcessor = Prcb->CpuNumber;
CurrentThread->Priority = THREAD_HIGH_PRIORITY;
CurrentThread->State = Running;
@@ -109,29 +108,39 @@ KepStartKernel(VOID)
CurrentProcess->ActiveProcessors |= (ULONG_PTR)1 << Prcb->CpuNumber;
/* Enter infinite loop */
DebugPrint(L"KepStartKernel() finished. Entering infinite loop.\n");
for(;;);
DebugPrint(L"KernelInit::StartKernel() finished. Entering infinite loop.\n");
Crash::HaltSystem();
}
/**
* Switches to a new kernel boot stack.
* Switches execution to a new boot stack and transfers control to the KernelInit::StartKernel() routine.
*
* @return This routine does not return any value
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
KepSwitchBootStack(IN ULONG_PTR Stack)
KE::KernelInit::SwitchBootStack(VOID)
{
/* Discard old stack frame, switch stack and jump to KepStartKernel() */
ULONG_PTR Stack;
PVOID StartKernel;
/* Calculate the stack pointer at the top of the buffer, ensuring it is properly aligned as required by the ABI */
Stack = ((ULONG_PTR)AR::ProcSup::GetBootStack() + KERNEL_STACK_SIZE) & ~(STACK_ALIGNMENT - 1);
/* Get address of KernelInit::StartKernel() */
StartKernel = (PVOID)KernelInit::StartKernel;
/* Discard old stack frame, switch stack and jump to KernelInit::StartKernel() */
__asm__ volatile("mov %0, %%rdx\n"
"xor %%rbp, %%rbp\n"
"mov %%rdx, %%rsp\n"
"sub %1, %%rsp\n"
"jmp KepStartKernel\n"
"jmp *%2\n"
:
: "m" (Stack),
"i" (FLOATING_SAVE_AREA_SIZE | KEXCEPTION_FRAME_SIZE | KSWITCH_FRAME_SIZE | KRETURN_ADDRESS_SIZE),
"p" (KepStartKernel));
"r" (StartKernel)
: "rdx", "rbp", "rsp", "memory");
}

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/amd64/kthread.c
* FILE: xtoskrnl/ke/amd64/kthread.cc
* DESCRIPTION: AMD64 thread manipulation support
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -33,11 +33,11 @@
*/
XTAPI
VOID
KepInitializeThreadContext(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextRecord)
KE::KThread::InitializeThreadContext(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextRecord)
{
PKTHREAD_INIT_FRAME ThreadFrame;
@@ -45,7 +45,7 @@ KepInitializeThreadContext(IN PKTHREAD Thread,
ThreadFrame = ((PKTHREAD_INIT_FRAME)Thread->InitialStack) - 1;
/* Fill floating point save area with zeroes */
RtlZeroMemory(&ThreadFrame->NpxFrame, sizeof(FLOATING_SAVE_AREA));
RTL::Memory::ZeroMemory(&ThreadFrame->NpxFrame, sizeof(FLOATING_SAVE_AREA));
/* Check if context provided for this thread */
if(ContextRecord)
@@ -54,8 +54,8 @@ KepInitializeThreadContext(IN PKTHREAD Thread,
UNIMPLEMENTED;
/* Fill exception and trap frames with zeroes */
RtlZeroMemory(&ThreadFrame->ExceptionFrame, sizeof(KEXCEPTION_FRAME));
RtlZeroMemory(&ThreadFrame->TrapFrame, sizeof(KTRAP_FRAME));
RTL::Memory::ZeroMemory(&ThreadFrame->ExceptionFrame, sizeof(KEXCEPTION_FRAME));
RTL::Memory::ZeroMemory(&ThreadFrame->TrapFrame, sizeof(KTRAP_FRAME));
/* Disable debug registers and enable context registers */
ContextRecord->ContextFlags &= ~CONTEXT_DEBUG_REGISTERS | CONTEXT_CONTROL;

View File

@@ -1,114 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/amd64/proc.c
* DESCRIPTION: AMD64 processor-related functionality for the kernel
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
/**
* Gets the processor block for the currently executing processor.
*
* @return This routine returns the current processor block read from the GS register.
*
* @since XT 1.0
*/
XTAPI
PKPROCESSOR_BLOCK
KeGetCurrentProcessorBlock(VOID)
{
/* Get processor block from GS register */
return (PKPROCESSOR_BLOCK)ArReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, Self));
}
/**
* Gets the processor control block for the currently executing processor.
*
* @return This routine returns the current processor control block read from the GS register.
*
* @since XT 1.0
*/
XTAPI
PKPROCESSOR_CONTROL_BLOCK
KeGetCurrentProcessorControlBlock(VOID)
{
return (PKPROCESSOR_CONTROL_BLOCK)ArReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CurrentPrcb));
}
/**
* Gets the number of the currently executing processor.
*
* @return This routine returns the zero-indexed processor number.
*
* @since XT 1.0
*/
XTAPI
ULONG
KeGetCurrentProcessorNumber(VOID)
{
return (ULONG)ArReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CpuNumber));
}
/**
* Gets the current thread running on the currently executing processor.
*
* @return This routine returns the address of the current thread object.
*
* @since NT 3.5
*/
XTAPI
PKTHREAD
KeGetCurrentThread(VOID)
{
return (PKTHREAD)ArReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, Prcb.CurrentThread));
}
/**
* Saves the current processor state.
*
* @param State
* Supplies a pointer to the processor state structure.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
KepSaveProcessorState(OUT PKPROCESSOR_STATE CpuState)
{
/* Save CR registers */
CpuState->SpecialRegisters.Cr0 = ArReadControlRegister(0);
CpuState->SpecialRegisters.Cr2 = ArReadControlRegister(2);
CpuState->SpecialRegisters.Cr3 = ArReadControlRegister(3);
CpuState->SpecialRegisters.Cr4 = ArReadControlRegister(4);
CpuState->SpecialRegisters.Cr8 = ArReadControlRegister(8);
/* Save DR registers */
CpuState->SpecialRegisters.KernelDr0 = ArReadDebugRegister(0);
CpuState->SpecialRegisters.KernelDr1 = ArReadDebugRegister(1);
CpuState->SpecialRegisters.KernelDr2 = ArReadDebugRegister(2);
CpuState->SpecialRegisters.KernelDr3 = ArReadDebugRegister(3);
CpuState->SpecialRegisters.KernelDr6 = ArReadDebugRegister(6);
CpuState->SpecialRegisters.KernelDr7 = ArReadDebugRegister(7);
/* Save MSR registers */
CpuState->SpecialRegisters.MsrGsBase = ArReadModelSpecificRegister(X86_MSR_GSBASE);
CpuState->SpecialRegisters.MsrGsSwap = ArReadModelSpecificRegister(X86_MSR_KERNEL_GSBASE);
CpuState->SpecialRegisters.MsrCStar = ArReadModelSpecificRegister(X86_MSR_CSTAR);
CpuState->SpecialRegisters.MsrLStar = ArReadModelSpecificRegister(X86_MSR_LSTAR);
CpuState->SpecialRegisters.MsrStar = ArReadModelSpecificRegister(X86_MSR_STAR);
CpuState->SpecialRegisters.MsrSyscallMask = ArReadModelSpecificRegister(X86_MSR_FMASK);
/* Save XMM control/status register */
CpuState->SpecialRegisters.MxCsr = ArReadMxCsrRegister();
/* Save GDT, IDT, LDT and TaskRegister */
ArStoreGlobalDescriptorTable(&CpuState->SpecialRegisters.Gdtr.Limit);
ArStoreInterruptDescriptorTable(&CpuState->SpecialRegisters.Idtr.Limit);
ArStoreLocalDescriptorTable(&CpuState->SpecialRegisters.Ldtr);
ArStoreTaskRegister(&CpuState->SpecialRegisters.Tr);
}

157
xtoskrnl/ke/amd64/proc.cc Normal file
View File

@@ -0,0 +1,157 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/amd64/proc.cc
* DESCRIPTION: AMD64 processor-related functionality for the kernel
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.hh>
/**
* Gets the processor block for the currently executing processor.
*
* @return This routine returns the current processor block read from the GS register.
*
* @since XT 1.0
*/
XTAPI
PKPROCESSOR_BLOCK
KE::Processor::GetCurrentProcessorBlock(VOID)
{
/* Get processor block from GS register */
return (PKPROCESSOR_BLOCK)AR::CpuFunc::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, Self));
}
/**
* Gets the processor control block for the currently executing processor.
*
* @return This routine returns the current processor control block read from the GS register.
*
* @since XT 1.0
*/
XTAPI
PKPROCESSOR_CONTROL_BLOCK
KE::Processor::GetCurrentProcessorControlBlock(VOID)
{
return (PKPROCESSOR_CONTROL_BLOCK)AR::CpuFunc::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CurrentPrcb));
}
/**
* Gets the number of the currently executing processor.
*
* @return This routine returns the zero-indexed processor number.
*
* @since XT 1.0
*/
XTAPI
ULONG
KE::Processor::GetCurrentProcessorNumber(VOID)
{
return (ULONG)AR::CpuFunc::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CpuNumber));
}
/**
* Gets the current thread running on the currently executing processor.
*
* @return This routine returns the address of the current thread object.
*
* @since NT 3.5
*/
XTAPI
PKTHREAD
KE::Processor::GetCurrentThread(VOID)
{
return (PKTHREAD)AR::CpuFunc::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, Prcb.CurrentThread));
}
/**
* Saves the current processor state.
*
* @param State
* Supplies a pointer to the processor state structure.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
KE::Processor::SaveProcessorState(OUT PKPROCESSOR_STATE CpuState)
{
/* Save CR registers */
CpuState->SpecialRegisters.Cr0 = AR::CpuFunc::ReadControlRegister(0);
CpuState->SpecialRegisters.Cr2 = AR::CpuFunc::ReadControlRegister(2);
CpuState->SpecialRegisters.Cr3 = AR::CpuFunc::ReadControlRegister(3);
CpuState->SpecialRegisters.Cr4 = AR::CpuFunc::ReadControlRegister(4);
CpuState->SpecialRegisters.Cr8 = AR::CpuFunc::ReadControlRegister(8);
/* Save DR registers */
CpuState->SpecialRegisters.KernelDr0 = AR::CpuFunc::ReadDebugRegister(0);
CpuState->SpecialRegisters.KernelDr1 = AR::CpuFunc::ReadDebugRegister(1);
CpuState->SpecialRegisters.KernelDr2 = AR::CpuFunc::ReadDebugRegister(2);
CpuState->SpecialRegisters.KernelDr3 = AR::CpuFunc::ReadDebugRegister(3);
CpuState->SpecialRegisters.KernelDr6 = AR::CpuFunc::ReadDebugRegister(6);
CpuState->SpecialRegisters.KernelDr7 = AR::CpuFunc::ReadDebugRegister(7);
/* Save MSR registers */
CpuState->SpecialRegisters.MsrGsBase = AR::CpuFunc::ReadModelSpecificRegister(X86_MSR_GSBASE);
CpuState->SpecialRegisters.MsrGsSwap = AR::CpuFunc::ReadModelSpecificRegister(X86_MSR_KERNEL_GSBASE);
CpuState->SpecialRegisters.MsrCStar = AR::CpuFunc::ReadModelSpecificRegister(X86_MSR_CSTAR);
CpuState->SpecialRegisters.MsrLStar = AR::CpuFunc::ReadModelSpecificRegister(X86_MSR_LSTAR);
CpuState->SpecialRegisters.MsrStar = AR::CpuFunc::ReadModelSpecificRegister(X86_MSR_STAR);
CpuState->SpecialRegisters.MsrSyscallMask = AR::CpuFunc::ReadModelSpecificRegister(X86_MSR_FMASK);
/* Save XMM control/status register */
CpuState->SpecialRegisters.MxCsr = AR::CpuFunc::ReadMxCsrRegister();
/* Save GDT, IDT, LDT and TaskRegister */
AR::CpuFunc::StoreGlobalDescriptorTable(&CpuState->SpecialRegisters.Gdtr.Limit);
AR::CpuFunc::StoreInterruptDescriptorTable(&CpuState->SpecialRegisters.Idtr.Limit);
AR::CpuFunc::StoreLocalDescriptorTable(&CpuState->SpecialRegisters.Ldtr);
AR::CpuFunc::StoreTaskRegister(&CpuState->SpecialRegisters.Tr);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTAPI
PKPROCESSOR_BLOCK
KeGetCurrentProcessorBlock(VOID)
{
return KE::Processor::GetCurrentProcessorBlock();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTAPI
PKPROCESSOR_CONTROL_BLOCK
KeGetCurrentProcessorControlBlock(VOID)
{
return KE::Processor::GetCurrentProcessorControlBlock();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTAPI
ULONG
KeGetCurrentProcessorNumber(VOID)
{
return KE::Processor::GetCurrentProcessorNumber();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTAPI
PKTHREAD
KeGetCurrentThread(VOID)
{
return KE::Processor::GetCurrentThread();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTAPI
VOID
KepSaveProcessorState(OUT PKPROCESSOR_STATE CpuState)
{
KE::Processor::SaveProcessorState(CpuState);
}

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/apc.c
* FILE: xtoskrnl/ke/apc.cc
* DESCRIPTION: Kernel APC objects support
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -42,14 +42,14 @@
*/
XTAPI
VOID
KeInitializeApc(IN PKAPC Apc,
IN PKTHREAD Thread,
IN KAPC_ENVIRONMENT Environment,
IN PKKERNEL_ROUTINE KernelRoutine,
IN PKRUNDOWN_ROUTINE RundownRoutine,
IN PKNORMAL_ROUTINE NormalRoutine,
IN KPROCESSOR_MODE ApcMode,
IN PVOID Context)
KE::Apc::InitializeApc(IN PKAPC Apc,
IN PKTHREAD Thread,
IN KAPC_ENVIRONMENT Environment,
IN PKKERNEL_ROUTINE KernelRoutine,
IN PKRUNDOWN_ROUTINE RundownRoutine,
IN PKNORMAL_ROUTINE NormalRoutine,
IN KPROCESSOR_MODE ApcMode,
IN PVOID Context)
{
/* Set APC type and thread */
Apc->Type = ApcObject;

View File

@@ -1,14 +1,21 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/info.c
* DESCRIPTION: Generic kernel information support
* FILE: xtoskrnl/ke/bootinfo.cc
* DESCRIPTION: Bootloader-provided system information handling support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.h>
#include <xtos.hh>
XTAPI
PVOID
KE::BootInformation::GetDebugPrint(VOID)
{
return InitializationBlock->LoaderInformation.DbgPrint;
}
/**
* Retrieves the system firmware type (BIOS or UEFI).
*
@@ -18,9 +25,9 @@
*/
XTAPI
SYSTEM_FIRMWARE_TYPE
KeGetFirmwareType(VOID)
KE::BootInformation::GetFirmwareType(VOID)
{
return KeInitializationBlock->FirmwareInformation.FirmwareType;
return InitializationBlock->FirmwareInformation.FirmwareType;
}
/**
@@ -38,24 +45,21 @@ KeGetFirmwareType(VOID)
*/
XTAPI
XTSTATUS
KeGetKernelParameter(IN PCWSTR ParameterName,
OUT PCWSTR *Parameter)
KE::BootInformation::GetKernelParameter(IN PCWSTR ParameterName,
OUT PCWSTR *Parameter)
{
PCWSTR KernelParameters,Match, SearchStart;
PCWSTR Match, SearchStart;
SIZE_T ParameterNameLength;
/* Get the kernel parameters */
KernelParameters = KeInitializationBlock->KernelParameters;
/* Validate input parameters */
if(!KernelParameters || !ParameterName || !Parameter)
if(!ParameterName || !Parameter)
{
/* Invalid input parameters, return error */
return STATUS_INVALID_PARAMETER;
}
/* Get the length of the parameter name we are looking for */
ParameterNameLength = RtlWideStringLength(ParameterName, 0);
ParameterNameLength = RTL::WideString::WideStringLength(ParameterName, 0);
if(ParameterNameLength == 0)
{
/* Do not allow empty parameter names */
@@ -63,16 +67,16 @@ KeGetKernelParameter(IN PCWSTR ParameterName,
}
/* Assume the requested parameter is not present in the kernel parameters */
*Parameter = NULL;
*Parameter = nullptr;
/* Start searching from the beginning of the list */
SearchStart = KernelParameters;
SearchStart = InitializationBlock->KernelParameters;
/* Search for the parameter name */
while((Match = RtlFindWideStringInsensitive(SearchStart, ParameterName)))
while((Match = RTL::WideString::FindWideStringInsensitive(SearchStart, ParameterName)))
{
/* Check if the match is at the start of the string or preceded by a space */
if(Match == KernelParameters || *(Match - 1) == L' ')
if(Match == InitializationBlock->KernelParameters || *(Match - 1) == L' ')
{
/* Check the character after the match to avoid matching prefixes */
if(Match[ParameterNameLength] == L'\0' ||
@@ -92,3 +96,56 @@ KeGetKernelParameter(IN PCWSTR ParameterName,
/* Parameter not found */
return STATUS_NOT_FOUND;
}
/**
* Retrieves a pointer to the list of system resources.
*
* @return This routine returns a pointer to the list of system resources.
*
* @since XT 1.0
*/
XTAPI
PLIST_ENTRY
KE::BootInformation::GetSystemResources(VOID)
{
return &InitializationBlock->SystemResourcesListHead;
}
/**
* Initializes the bootloader-provided system information.
*
* @param Block
* Supplies a pointer to the kernel initialization block.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
KE::BootInformation::InitializeInitializationBlock(IN PKERNEL_INITIALIZATION_BLOCK Block)
{
InitializationBlock = Block;
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTAPI
XTSTATUS
KeGetKernelParameter(IN PCWSTR ParameterName,
OUT PCWSTR *Parameter)
{
return KE::BootInformation::GetKernelParameter(ParameterName, Parameter);
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTAPI
PKERNEL_INITIALIZATION_BLOCK
KeGetInitializationBlock(VOID)
{
return KE::BootInformation::GetInitializationBlock();
}

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/panic.c
* FILE: xtoskrnl/ke/panic.cc
* DESCRIPTION: System shutdown and kernel panic mechanism
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -18,14 +18,14 @@
*/
XTAPI
VOID
KeHaltSystem(VOID)
KE::Crash::HaltSystem(VOID)
{
/* Enter infinite loop */
for(;;)
{
/* Halt system */
ArClearInterruptFlag();
ArHalt();
AR::CpuFunc::ClearInterruptFlag();
AR::CpuFunc::Halt();
}
}
@@ -41,9 +41,9 @@ KeHaltSystem(VOID)
*/
XTAPI
VOID
KePanic(IN ULONG Code)
KE::Crash::Panic(IN ULONG Code)
{
KePanicEx(Code, 0, 0, 0, 0);
PanicEx(Code, 0, 0, 0, 0);
}
/**
@@ -70,12 +70,32 @@ KePanic(IN ULONG Code)
*/
XTAPI
VOID
KePanicEx(IN ULONG Code,
IN ULONG_PTR Parameter1,
IN ULONG_PTR Parameter2,
IN ULONG_PTR Parameter3,
IN ULONG_PTR Parameter4)
KE::Crash::PanicEx(IN ULONG Code,
IN ULONG_PTR Parameter1,
IN ULONG_PTR Parameter2,
IN ULONG_PTR Parameter3,
IN ULONG_PTR Parameter4)
{
KdPrint(L"Fatal System Error: 0x%08lx\nKernel Panic!\n\n", Code);
KeHaltSystem();
HaltSystem();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTAPI
VOID
KeHaltSystem(VOID)
{
KE::Crash::HaltSystem();
}
/* TEMPORARY FOR COMPATIBILITY WITH C CODE */
XTCLINK
XTAPI
VOID
KePanic(ULONG Code)
{
KE::Crash::Panic(Code);
}

28
xtoskrnl/ke/data.cc Normal file
View File

@@ -0,0 +1,28 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/data.cc
* DESCRIPTION:
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.hh>
/* Kernel initialization block passed by boot loader */
PKERNEL_INITIALIZATION_BLOCK KE::BootInformation::InitializationBlock = {};
/* Kernel boot resources list */
LIST_ENTRY KE::SystemResources::ResourcesListHead;
/* Kernel boot resources lock */
KSPIN_LOCK KE::SystemResources::ResourcesLock;
/* Kernel initial process */
EPROCESS KE::KProcess::InitialProcess;
/* Kernel initial thread */
ETHREAD KE::KThread::InitialThread = {};
/* Kernel UBSAN active frame flag */
BOOLEAN KE::KUbsan::ActiveFrame = FALSE;

View File

@@ -1,12 +1,12 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/dpc.c
* FILE: xtoskrnl/ke/dpc.cc
* DESCRIPTION: Deferred Procedure Call (DPC) support
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
#include <xtos.hh>
/**
@@ -27,9 +27,9 @@
*/
XTAPI
VOID
KeInitializeDpc(IN PKDPC Dpc,
IN PKDEFERRED_ROUTINE DpcRoutine,
IN PVOID DpcContext)
KE::Dpc::InitializeDpc(IN PKDPC Dpc,
IN PKDEFERRED_ROUTINE DpcRoutine,
IN PVOID DpcContext)
{
/* Initialize DPC */
Dpc->Type = DpcObject;
@@ -60,9 +60,9 @@ KeInitializeDpc(IN PKDPC Dpc,
*/
XTAPI
VOID
KeInitializeThreadedDpc(IN PKDPC Dpc,
IN PKDEFERRED_ROUTINE DpcRoutine,
IN PVOID DpcContext)
KE::Dpc::InitializeThreadedDpc(IN PKDPC Dpc,
IN PKDEFERRED_ROUTINE DpcRoutine,
IN PVOID DpcContext)
{
/* Initialize threaded DPC */
Dpc->Type = ThreadedDpcObject;
@@ -90,8 +90,8 @@ KeInitializeThreadedDpc(IN PKDPC Dpc,
*/
XTAPI
VOID
KeSetTargetProcessorDpc(IN PKDPC Dpc,
IN CCHAR Number)
KE::Dpc::SetTargetProcessor(IN PKDPC Dpc,
IN CCHAR Number)
{
Dpc->Number = MAXIMUM_PROCESSORS + Number;
}
@@ -108,9 +108,9 @@ KeSetTargetProcessorDpc(IN PKDPC Dpc,
*/
XTAPI
VOID
KeSignalCallDpcDone(IN PVOID SystemArgument)
KE::Dpc::SignalCallDone(IN PVOID SystemArgument)
{
RtlAtomicDecrement32(SystemArgument);
RTL::Atomic::Decrement32((PLONG)SystemArgument);
}
/**
@@ -125,7 +125,7 @@ KeSignalCallDpcDone(IN PVOID SystemArgument)
*/
XTAPI
BOOLEAN
KeSignalCallDpcSynchronize(IN PVOID SystemArgument)
KE::Dpc::SignalCallSynchronize(IN PVOID SystemArgument)
{
UNIMPLEMENTED;
@@ -145,7 +145,7 @@ KeSignalCallDpcSynchronize(IN PVOID SystemArgument)
*/
XTFASTCALL
VOID
KepRetireDpcList(IN PKPROCESSOR_CONTROL_BLOCK Prcb)
KE::Dpc::RetireList(IN PKPROCESSOR_CONTROL_BLOCK Prcb)
{
UNIMPLEMENTED;
}

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