Currently, hardware interrupts configured via the I/O APIC are statically routed to the Bootstrap Processor (CPU 0). The function HL::Pic::AllocateSystemInterrupt hardcodes the destination to the executing processor's APIC ID. Furthermore, interrupt handlers are registered using static vectors directly into the processor's interrupt dispatch table.
To support true SMP load balancing, interrupt affinity, and dynamic device driver loading, we need to transition from this static routing model to a dynamic, object-oriented interrupt dispatching.
TODO:
Refactor I/O APIC Routing: Modify HL::Pic::AllocateSystemInterrupt to accept a TargetApicId (or an affinity mask) as a parameter. This will allow the system to program the I/O APIC Redirection Table to route specific hardware interrupts to designated Application Processors instead of forcing everything onto the BSP.
Dynamic Vector Allocation: Implement a mechanism to dynamically find and allocate free vectors for a specific CPU, removing the reliance on hardcoded vector constants for PnP hardware.
Introduce Interrupt Objects: This object will encapsulate the driver's Interrupt Service Routine (ISR), the ISR context (device extension), the assigned spinlock, and the affinity mask.
Implement IoConnectInterrupt: Create the API for device drivers to register their ISRs.
Implement IoDisconnectInterrupt: Create the corresponding teardown routine to safely unregister ISRs, unmask the I/O APIC, and free the vectors when a driver is unloaded.
Central Dispatcher: Implement the core kernel routine that takes the interrupt object, acquires the necessary spinlock and safely executes the connected driver's ISR.
Currently, hardware interrupts configured via the I/O APIC are statically routed to the Bootstrap Processor (CPU 0). The function HL::Pic::AllocateSystemInterrupt hardcodes the destination to the executing processor's APIC ID. Furthermore, interrupt handlers are registered using static vectors directly into the processor's interrupt dispatch table.
To support true SMP load balancing, interrupt affinity, and dynamic device driver loading, we need to transition from this static routing model to a dynamic, object-oriented interrupt dispatching.
TODO:
- [ ] **Refactor I/O APIC Routing**: Modify HL::Pic::AllocateSystemInterrupt to accept a TargetApicId (or an affinity mask) as a parameter. This will allow the system to program the I/O APIC Redirection Table to route specific hardware interrupts to designated Application Processors instead of forcing everything onto the BSP.
- [ ] **Dynamic Vector Allocation**: Implement a mechanism to dynamically find and allocate free vectors for a specific CPU, removing the reliance on hardcoded vector constants for PnP hardware.
- [ ] **Introduce Interrupt Objects**: This object will encapsulate the driver's Interrupt Service Routine (ISR), the ISR context (device extension), the assigned spinlock, and the affinity mask.
- [ ] **Implement IoConnectInterrupt**: Create the API for device drivers to register their ISRs.
- [ ] **Implement IoDisconnectInterrupt**: Create the corresponding teardown routine to safely unregister ISRs, unmask the I/O APIC, and free the vectors when a driver is unloaded.
- [ ] **Central Dispatcher**: Implement the core kernel routine that takes the interrupt object, acquires the necessary spinlock and safely executes the connected driver's ISR.
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Currently, hardware interrupts configured via the I/O APIC are statically routed to the Bootstrap Processor (CPU 0). The function HL::Pic::AllocateSystemInterrupt hardcodes the destination to the executing processor's APIC ID. Furthermore, interrupt handlers are registered using static vectors directly into the processor's interrupt dispatch table.
To support true SMP load balancing, interrupt affinity, and dynamic device driver loading, we need to transition from this static routing model to a dynamic, object-oriented interrupt dispatching.
TODO: