From 1c031e8be9678bbe3b88a8993acd4c17041c3f39 Mon Sep 17 00:00:00 2001 From: Jozef Nagy Date: Sun, 26 Nov 2023 10:31:31 +0100 Subject: [PATCH 1/5] Added 8259 PIC support --- sdk/xtdk/amd64/hlfuncs.h | 4 ++ sdk/xtdk/hltypes.h | 19 ++++++ sdk/xtdk/i686/hlfuncs.h | 4 ++ xtoskrnl/hl/amd64/ioport.c | 16 +++++ xtoskrnl/hl/i686/ioport.c | 16 +++++ xtoskrnl/hl/pic.c | 114 +++++++++++++++++++++++++++++++++++ xtoskrnl/includes/hl.h | 20 ++++++ xtoskrnl/ke/amd64/krnlinit.c | 4 ++ 8 files changed, 197 insertions(+) diff --git a/sdk/xtdk/amd64/hlfuncs.h b/sdk/xtdk/amd64/hlfuncs.h index d5d6bff..e615724 100644 --- a/sdk/xtdk/amd64/hlfuncs.h +++ b/sdk/xtdk/amd64/hlfuncs.h @@ -43,4 +43,8 @@ VOID HlIoPortOutShort(IN USHORT Port, IN USHORT Value); +XTCDECL +VOID +HlIoPortWait(VOID); + #endif /* __XTDK_AMD64_HLFUNCS_H */ diff --git a/sdk/xtdk/hltypes.h b/sdk/xtdk/hltypes.h index 8eec8f2..b5bca03 100644 --- a/sdk/xtdk/hltypes.h +++ b/sdk/xtdk/hltypes.h @@ -90,6 +90,25 @@ #define COMPORT_REG_MSR 0x06 /* Modem Status Register */ #define COMPORT_REG_SR 0x07 /* Scratch Register */ +/* 8259 PIC ports */ +#define PIC_MASTER_COMMAND 0xA0 +#define PIC_MASTER_DATA 0xA1 +#define PIC_SLAVE_COMMAND 0x20 +#define PIC_SLAVE_DATA 0x21 + +/* 8259 PIC commands */ +#define PIC_ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */ +#define PIC_ICW1_SINGLE 0x02 /* Single (cascade) mode */ +#define PIC_ICW1_INTERVAL4 0x04 /* Call address interva l 4 (8) */ +#define PIC_ICW1_LEVEL 0x08 /* Level triggered (edge) mode */ +#define PIC_ICW1_INIT 0x10 /* Initialization - required! */ + +#define PIC_ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */ +#define PIC_ICW4_AUTO 0x02 /* Auto (normal) EOI */ +#define PIC_ICW4_BUF_MASTER 0x0C /* Buffered mode/master */ +#define PIC_ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */ +#define PIC_ICW4_SFNM 0x10 /* Special fully nested (not) */ + /* APIC Register Address Map */ typedef enum _APIC_REGISTER { diff --git a/sdk/xtdk/i686/hlfuncs.h b/sdk/xtdk/i686/hlfuncs.h index dfc35ac..24c6746 100644 --- a/sdk/xtdk/i686/hlfuncs.h +++ b/sdk/xtdk/i686/hlfuncs.h @@ -43,4 +43,8 @@ VOID HlIoPortOutShort(IN USHORT Port, IN USHORT Value); +XTCDECL +VOID +HlIoPortWait(VOID); + #endif /* __XTDK_I686_HLFUNCS_H */ diff --git a/xtoskrnl/hl/amd64/ioport.c b/xtoskrnl/hl/amd64/ioport.c index 6ba8609..4e5fa81 100644 --- a/xtoskrnl/hl/amd64/ioport.c +++ b/xtoskrnl/hl/amd64/ioport.c @@ -143,3 +143,19 @@ HlIoPortOutShort(IN USHORT Port, : "a" (Value), "Nd" (Port)); } + +/** + * Sends a 0x00 byte to an unused IO port. + * This operation takes 1 - 4 microseconds and functions as an + * imprecise wait function. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTCDECL +VOID +HlIoPortWait(VOID) +{ + HlIoPortOutByte(0x80, 0x00); +} \ No newline at end of file diff --git a/xtoskrnl/hl/i686/ioport.c b/xtoskrnl/hl/i686/ioport.c index 7f6b5d7..c15712c 100644 --- a/xtoskrnl/hl/i686/ioport.c +++ b/xtoskrnl/hl/i686/ioport.c @@ -143,3 +143,19 @@ HlIoPortOutShort(IN USHORT Port, : "a" (Value), "Nd" (Port)); } + +/** + * Sends a 0x00 byte to an unused IO port. + * This operation takes 1 - 4 microseconds and functions as an + * imprecise wait function. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTCDECL +VOID +HlIoPortWait(VOID) +{ + HlIoPortOutByte(0x80, 0x00); +} \ No newline at end of file diff --git a/xtoskrnl/hl/pic.c b/xtoskrnl/hl/pic.c index c0d33ff..571a4b9 100644 --- a/xtoskrnl/hl/pic.c +++ b/xtoskrnl/hl/pic.c @@ -4,10 +4,124 @@ * FILE: xtoskrnl/hl/pic.c * DESCRIPTION: Programmable Interrupt Controller (PIC) support * DEVELOPERS: Rafal Kupiec + * Jozef Nagy */ #include +/** + * Initializes the 8259 PIC. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTCDECL +VOID +HlInitializePic(VOID) +{ + /* Start in cascade mode */ + HlWritePic(PIC_MASTER_COMMAND, PIC_ICW1_INIT | PIC_ICW1_ICW4); + HlWritePic(PIC_SLAVE_COMMAND, PIC_ICW1_INIT | PIC_ICW1_ICW4); + + /* Master PIC Vector offset */ + HlWritePic(PIC_MASTER_DATA, 0x20); + /* Slave PIC Vector offset */ + HlWritePic(PIC_SLAVE_DATA, 0x28); + + /* Tell Master PIC that there is a Slave PIC */ + HlWritePic(PIC_MASTER_DATA, 4); + /* Tell Slave PIC its cascade identity */ + HlWritePic(PIC_SLAVE_DATA, 2); + + /* Tell Master PIC to use 8086 mode */ + HlWritePic(PIC_MASTER_DATA, PIC_ICW4_8086); + /* Tell Slave PIC to use 8086 mode */ + HlWritePic(PIC_SLAVE_DATA, PIC_ICW4_8086); + + /* Mask all IRQs by default */ + for (UCHAR Irq = 0; Irq < 16; Irq++) + { + HlSetMaskIrqPic(Irq); + } +} + +/** + * Masks an IRQ in the 8259 PIC. + * + * @param Irq + * Supplies the IRQ number to be masked. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTCDECL +VOID +HlSetMaskIrqPic(UINT Irq) +{ + UINT Port; + + if(Irq < 8) { + Port = PIC_MASTER_DATA; + } else { + Port = PIC_SLAVE_DATA; + Irq -= 8; + } + + HlWritePic(Port, HlIoPortInByte(Port) | (1 << Irq)); +} + +/** + * Clears an IRQ mask in the 8259 PIC. + * + * @param Irq + * Supplies the IRQ number to be unmasked. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTCDECL +VOID +HlClearMaskIrqPic(UINT Irq) +{ + UINT Port; + + if(Irq < 8) { + Port = PIC_MASTER_DATA; + } else { + Port = PIC_SLAVE_DATA; + Irq -= 8; + } + + HlWritePic(Port, HlIoPortInByte(Port) & ~(1 << Irq)); +} + +/** + * Disables the 8259 PIC. + * + * @return This routine does not return any value. + * + * @since XT 1.0 + */ +XTCDECL +VOID +HlDisablePic(VOID) +{ + HlIoPortOutByte(PIC_MASTER_DATA, 0xFF); + HlIoPortOutByte(PIC_SLAVE_DATA, 0xFF); +} + +XTFASTCALL +VOID +HlWritePic(IN UCHAR Register, IN UCHAR Value) +{ + /* Send data */ + HlIoPortOutByte(Register, Value); + /* Wait for some time to make sure PIC has processed the data */ + HlIoPortWait(); +} /** * Reads from the local APIC register. diff --git a/xtoskrnl/includes/hl.h b/xtoskrnl/includes/hl.h index 6ff39d1..42d0c5b 100644 --- a/xtoskrnl/includes/hl.h +++ b/xtoskrnl/includes/hl.h @@ -13,6 +13,26 @@ /* HAL library routines forward references */ +XTCDECL +VOID +HlInitializePic(VOID); + +XTCDECL +VOID +HlSetMaskIrqPic(UINT Irq); + +XTCDECL +VOID +HlClearMaskIrqPic(UINT Irq); + +XTCDECL +VOID +HlDisablePic(VOID); + +XTFASTCALL +VOID +HlWritePic(IN UCHAR Register, IN UCHAR Value); + XTAPI VOID HlClearScreen(VOID); diff --git a/xtoskrnl/ke/amd64/krnlinit.c b/xtoskrnl/ke/amd64/krnlinit.c index e09923b..b3022be 100644 --- a/xtoskrnl/ke/amd64/krnlinit.c +++ b/xtoskrnl/ke/amd64/krnlinit.c @@ -69,6 +69,10 @@ KepInitializeMachine(VOID) /* Re-enable IDE interrupts */ HlIoPortOutByte(0x376, 0); HlIoPortOutByte(0x3F6, 0); + + /* Disable the legacy PIC */ + HlInitializePic(); + HlDisablePic(); } /** -- 2.45.1 From 56a73132f8839394f6fe2b971aa3161836fcb3f8 Mon Sep 17 00:00:00 2001 From: Jozef Nagy Date: Sun, 26 Nov 2023 13:11:09 +0100 Subject: [PATCH 2/5] Removed HlIoPortWait() routine declaration from XTDK --- sdk/xtdk/amd64/hlfuncs.h | 4 ---- sdk/xtdk/i686/hlfuncs.h | 4 ---- xtoskrnl/includes/amd64/hl.h | 18 ++++++++++++++++++ xtoskrnl/includes/i686/hl.h | 18 ++++++++++++++++++ xtoskrnl/includes/xtos.h | 1 + 5 files changed, 37 insertions(+), 8 deletions(-) create mode 100644 xtoskrnl/includes/amd64/hl.h create mode 100644 xtoskrnl/includes/i686/hl.h diff --git a/sdk/xtdk/amd64/hlfuncs.h b/sdk/xtdk/amd64/hlfuncs.h index e615724..d5d6bff 100644 --- a/sdk/xtdk/amd64/hlfuncs.h +++ b/sdk/xtdk/amd64/hlfuncs.h @@ -43,8 +43,4 @@ VOID HlIoPortOutShort(IN USHORT Port, IN USHORT Value); -XTCDECL -VOID -HlIoPortWait(VOID); - #endif /* __XTDK_AMD64_HLFUNCS_H */ diff --git a/sdk/xtdk/i686/hlfuncs.h b/sdk/xtdk/i686/hlfuncs.h index 24c6746..dfc35ac 100644 --- a/sdk/xtdk/i686/hlfuncs.h +++ b/sdk/xtdk/i686/hlfuncs.h @@ -43,8 +43,4 @@ VOID HlIoPortOutShort(IN USHORT Port, IN USHORT Value); -XTCDECL -VOID -HlIoPortWait(VOID); - #endif /* __XTDK_I686_HLFUNCS_H */ diff --git a/xtoskrnl/includes/amd64/hl.h b/xtoskrnl/includes/amd64/hl.h new file mode 100644 index 0000000..71ed2d4 --- /dev/null +++ b/xtoskrnl/includes/amd64/hl.h @@ -0,0 +1,18 @@ +/** + * PROJECT: ExectOS + * COPYRIGHT: See COPYING.md in the top level directory + * FILE: xtoskrnl/includes/amd64/hl.h + * DESCRIPTION: AMD64 hardware abstraction layer routines + * DEVELOPERS: Jozef Nagy + */ + +#ifndef __XTOSKRNL_AMD64_HL_H +#define __XTOSKRNL_AMD64_HL_H + +#include + +XTCDECL +VOID +HlIoPortWait(VOID); + +#endif /* __XTOSKRNL_AMD64_HL_H */ diff --git a/xtoskrnl/includes/i686/hl.h b/xtoskrnl/includes/i686/hl.h new file mode 100644 index 0000000..600e620 --- /dev/null +++ b/xtoskrnl/includes/i686/hl.h @@ -0,0 +1,18 @@ +/** + * PROJECT: ExectOS + * COPYRIGHT: See COPYING.md in the top level directory + * FILE: xtoskrnl/includes/i686/hl.h + * DESCRIPTION: I686 hardware abstraction layer routines + * DEVELOPERS: Jozef Nagy + */ + +#ifndef __XTOSKRNL_I686_HL_H +#define __XTOSKRNL_I686_HL_H + +#include + +XTCDECL +VOID +HlIoPortWait(VOID); + +#endif /* __XTOSKRNL_I686_HL_H */ diff --git a/xtoskrnl/includes/xtos.h b/xtoskrnl/includes/xtos.h index ee2a309..df42c82 100644 --- a/xtoskrnl/includes/xtos.h +++ b/xtoskrnl/includes/xtos.h @@ -22,6 +22,7 @@ #include ARCH_HEADER(globals.h) #include ARCH_HEADER(ar.h) +#include ARCH_HEADER(hl.h) #include ARCH_HEADER(ke.h) #include ARCH_HEADER(mm.h) #include ARCH_HEADER(rtl.h) -- 2.45.1 From 0efd9ade593dba100f7b4968a98e8821d137e5aa Mon Sep 17 00:00:00 2001 From: Jozef Nagy Date: Tue, 28 Nov 2023 17:00:14 +0100 Subject: [PATCH 3/5] Removed HlIoPortWait(), fixed PIC port addresses, improved formatting --- sdk/xtdk/amd64/hltypes.h | 13 +++++++++++ sdk/xtdk/hltypes.h | 19 ---------------- sdk/xtdk/i686/hltypes.h | 13 +++++++++++ xtoskrnl/hl/amd64/ioport.c | 16 -------------- xtoskrnl/hl/i686/ioport.c | 16 -------------- xtoskrnl/hl/pic.c | 43 ++++++++++++++++++------------------ xtoskrnl/includes/amd64/hl.h | 18 --------------- xtoskrnl/includes/hl.h | 4 ++-- xtoskrnl/includes/i686/hl.h | 18 --------------- xtoskrnl/includes/xtos.h | 1 - 10 files changed, 50 insertions(+), 111 deletions(-) delete mode 100644 xtoskrnl/includes/amd64/hl.h delete mode 100644 xtoskrnl/includes/i686/hl.h diff --git a/sdk/xtdk/amd64/hltypes.h b/sdk/xtdk/amd64/hltypes.h index ab06ce2..f6a4a6f 100644 --- a/sdk/xtdk/amd64/hltypes.h +++ b/sdk/xtdk/amd64/hltypes.h @@ -64,6 +64,19 @@ #define PIC2_DATA_PORT 0xA1 #define PIC2_ELCR_PORT 0x04D1 +/* 8259 PIC commands */ +#define PIC_ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */ +#define PIC_ICW1_SINGLE 0x02 /* Single (cascade) mode */ +#define PIC_ICW1_INTERVAL4 0x04 /* Call address interva l 4 (8) */ +#define PIC_ICW1_LEVEL 0x08 /* Level triggered (edge) mode */ +#define PIC_ICW1_INIT 0x10 /* Initialization - required! */ + +#define PIC_ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */ +#define PIC_ICW4_AUTO 0x02 /* Auto (normal) EOI */ +#define PIC_ICW4_BUF_MASTER 0x0C /* Buffered mode/master */ +#define PIC_ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */ +#define PIC_ICW4_SFNM 0x10 /* Special fully nested (not) */ + /* PIC vector definitions */ #define PIC1_VECTOR_SPURIOUS 0x37 diff --git a/sdk/xtdk/hltypes.h b/sdk/xtdk/hltypes.h index 0951768..bfcee77 100644 --- a/sdk/xtdk/hltypes.h +++ b/sdk/xtdk/hltypes.h @@ -90,25 +90,6 @@ #define COMPORT_REG_MSR 0x06 /* Modem Status Register */ #define COMPORT_REG_SR 0x07 /* Scratch Register */ -/* 8259 PIC ports */ -#define PIC_MASTER_COMMAND 0xA0 -#define PIC_MASTER_DATA 0xA1 -#define PIC_SLAVE_COMMAND 0x20 -#define PIC_SLAVE_DATA 0x21 - -/* 8259 PIC commands */ -#define PIC_ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */ -#define PIC_ICW1_SINGLE 0x02 /* Single (cascade) mode */ -#define PIC_ICW1_INTERVAL4 0x04 /* Call address interva l 4 (8) */ -#define PIC_ICW1_LEVEL 0x08 /* Level triggered (edge) mode */ -#define PIC_ICW1_INIT 0x10 /* Initialization - required! */ - -#define PIC_ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */ -#define PIC_ICW4_AUTO 0x02 /* Auto (normal) EOI */ -#define PIC_ICW4_BUF_MASTER 0x0C /* Buffered mode/master */ -#define PIC_ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */ -#define PIC_ICW4_SFNM 0x10 /* Special fully nested (not) */ - /* APIC Register Address Map */ typedef enum _APIC_REGISTER { diff --git a/sdk/xtdk/i686/hltypes.h b/sdk/xtdk/i686/hltypes.h index 386175c..94de7df 100644 --- a/sdk/xtdk/i686/hltypes.h +++ b/sdk/xtdk/i686/hltypes.h @@ -69,6 +69,19 @@ #define PIC2_DATA_PORT 0xA1 #define PIC2_ELCR_PORT 0x04D1 +/* 8259 PIC commands */ +#define PIC_ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */ +#define PIC_ICW1_SINGLE 0x02 /* Single (cascade) mode */ +#define PIC_ICW1_INTERVAL4 0x04 /* Call address interva l 4 (8) */ +#define PIC_ICW1_LEVEL 0x08 /* Level triggered (edge) mode */ +#define PIC_ICW1_INIT 0x10 /* Initialization - required! */ + +#define PIC_ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */ +#define PIC_ICW4_AUTO 0x02 /* Auto (normal) EOI */ +#define PIC_ICW4_BUF_MASTER 0x0C /* Buffered mode/master */ +#define PIC_ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */ +#define PIC_ICW4_SFNM 0x10 /* Special fully nested (not) */ + /* PIC vector definitions */ #define PIC1_VECTOR_SPURIOUS 0x37 diff --git a/xtoskrnl/hl/amd64/ioport.c b/xtoskrnl/hl/amd64/ioport.c index 4e5fa81..6ba8609 100644 --- a/xtoskrnl/hl/amd64/ioport.c +++ b/xtoskrnl/hl/amd64/ioport.c @@ -143,19 +143,3 @@ HlIoPortOutShort(IN USHORT Port, : "a" (Value), "Nd" (Port)); } - -/** - * Sends a 0x00 byte to an unused IO port. - * This operation takes 1 - 4 microseconds and functions as an - * imprecise wait function. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTCDECL -VOID -HlIoPortWait(VOID) -{ - HlIoPortOutByte(0x80, 0x00); -} \ No newline at end of file diff --git a/xtoskrnl/hl/i686/ioport.c b/xtoskrnl/hl/i686/ioport.c index c15712c..7f6b5d7 100644 --- a/xtoskrnl/hl/i686/ioport.c +++ b/xtoskrnl/hl/i686/ioport.c @@ -143,19 +143,3 @@ HlIoPortOutShort(IN USHORT Port, : "a" (Value), "Nd" (Port)); } - -/** - * Sends a 0x00 byte to an unused IO port. - * This operation takes 1 - 4 microseconds and functions as an - * imprecise wait function. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTCDECL -VOID -HlIoPortWait(VOID) -{ - HlIoPortOutByte(0x80, 0x00); -} \ No newline at end of file diff --git a/xtoskrnl/hl/pic.c b/xtoskrnl/hl/pic.c index 281e47f..37f7ae5 100644 --- a/xtoskrnl/hl/pic.c +++ b/xtoskrnl/hl/pic.c @@ -21,25 +21,25 @@ VOID HlInitializePic(VOID) { /* Start in cascade mode */ - HlWritePic(PIC_MASTER_COMMAND, PIC_ICW1_INIT | PIC_ICW1_ICW4); - HlWritePic(PIC_SLAVE_COMMAND, PIC_ICW1_INIT | PIC_ICW1_ICW4); + HlWritePic(PIC1_CONTROL_PORT, PIC_ICW1_INIT | PIC_ICW1_ICW4); + HlWritePic(PIC2_CONTROL_PORT, PIC_ICW1_INIT | PIC_ICW1_ICW4); - /* Master PIC Vector offset */ - HlWritePic(PIC_MASTER_DATA, 0x20); - /* Slave PIC Vector offset */ - HlWritePic(PIC_SLAVE_DATA, 0x28); + /* PIC Vector offset */ + HlWritePic(PIC1_DATA_PORT, 0x20); + HlWritePic(PIC2_DATA_PORT, 0x28); /* Tell Master PIC that there is a Slave PIC */ - HlWritePic(PIC_MASTER_DATA, 4); + HlWritePic(PIC1_DATA_PORT, 4); + /* Tell Slave PIC its cascade identity */ - HlWritePic(PIC_SLAVE_DATA, 2); + HlWritePic(PIC2_DATA_PORT, 2); - /* Tell Master PIC to use 8086 mode */ - HlWritePic(PIC_MASTER_DATA, PIC_ICW4_8086); - /* Tell Slave PIC to use 8086 mode */ - HlWritePic(PIC_SLAVE_DATA, PIC_ICW4_8086); + /* Tell PIC to use 8086 mode */ + HlWritePic(PIC1_DATA_PORT, PIC_ICW4_8086); + HlWritePic(PIC2_DATA_PORT, PIC_ICW4_8086); /* Mask all IRQs by default */ + /* This makes sure we don't get any interrupts we can't handle yet. */ for (UCHAR Irq = 0; Irq < 16; Irq++) { HlSetMaskIrqPic(Irq); @@ -58,14 +58,14 @@ HlInitializePic(VOID) */ XTCDECL VOID -HlSetMaskIrqPic(UINT Irq) +HlSetMaskIrqPic(UCHAR Irq) { UINT Port; if(Irq < 8) { - Port = PIC_MASTER_DATA; + Port = PIC1_DATA_PORT; } else { - Port = PIC_SLAVE_DATA; + Port = PIC2_DATA_PORT; Irq -= 8; } @@ -84,14 +84,14 @@ HlSetMaskIrqPic(UINT Irq) */ XTCDECL VOID -HlClearMaskIrqPic(UINT Irq) +HlClearMaskIrqPic(UCHAR Irq) { UINT Port; if(Irq < 8) { - Port = PIC_MASTER_DATA; + Port = PIC1_DATA_PORT; } else { - Port = PIC_SLAVE_DATA; + Port = PIC2_DATA_PORT; Irq -= 8; } @@ -109,8 +109,8 @@ XTCDECL VOID HlDisablePic(VOID) { - HlIoPortOutByte(PIC_MASTER_DATA, 0xFF); - HlIoPortOutByte(PIC_SLAVE_DATA, 0xFF); + HlIoPortOutByte(PIC1_DATA_PORT, 0xFF); + HlIoPortOutByte(PIC2_DATA_PORT, 0xFF); } XTFASTCALL @@ -119,8 +119,9 @@ HlWritePic(IN UCHAR Register, IN UCHAR Value) { /* Send data */ HlIoPortOutByte(Register, Value); + /* Wait for some time to make sure PIC has processed the data */ - HlIoPortWait(); + HlIoPortOutByte(0x80, 0x00); } /** diff --git a/xtoskrnl/includes/amd64/hl.h b/xtoskrnl/includes/amd64/hl.h deleted file mode 100644 index 71ed2d4..0000000 --- a/xtoskrnl/includes/amd64/hl.h +++ /dev/null @@ -1,18 +0,0 @@ -/** - * PROJECT: ExectOS - * COPYRIGHT: See COPYING.md in the top level directory - * FILE: xtoskrnl/includes/amd64/hl.h - * DESCRIPTION: AMD64 hardware abstraction layer routines - * DEVELOPERS: Jozef Nagy - */ - -#ifndef __XTOSKRNL_AMD64_HL_H -#define __XTOSKRNL_AMD64_HL_H - -#include - -XTCDECL -VOID -HlIoPortWait(VOID); - -#endif /* __XTOSKRNL_AMD64_HL_H */ diff --git a/xtoskrnl/includes/hl.h b/xtoskrnl/includes/hl.h index 18a1c17..34c671e 100644 --- a/xtoskrnl/includes/hl.h +++ b/xtoskrnl/includes/hl.h @@ -19,11 +19,11 @@ HlInitializePic(VOID); XTCDECL VOID -HlSetMaskIrqPic(UINT Irq); +HlSetMaskIrqPic(UCHAR Irq); XTCDECL VOID -HlClearMaskIrqPic(UINT Irq); +HlClearMaskIrqPic(UCHAR Irq); XTCDECL VOID diff --git a/xtoskrnl/includes/i686/hl.h b/xtoskrnl/includes/i686/hl.h deleted file mode 100644 index 600e620..0000000 --- a/xtoskrnl/includes/i686/hl.h +++ /dev/null @@ -1,18 +0,0 @@ -/** - * PROJECT: ExectOS - * COPYRIGHT: See COPYING.md in the top level directory - * FILE: xtoskrnl/includes/i686/hl.h - * DESCRIPTION: I686 hardware abstraction layer routines - * DEVELOPERS: Jozef Nagy - */ - -#ifndef __XTOSKRNL_I686_HL_H -#define __XTOSKRNL_I686_HL_H - -#include - -XTCDECL -VOID -HlIoPortWait(VOID); - -#endif /* __XTOSKRNL_I686_HL_H */ diff --git a/xtoskrnl/includes/xtos.h b/xtoskrnl/includes/xtos.h index df42c82..ee2a309 100644 --- a/xtoskrnl/includes/xtos.h +++ b/xtoskrnl/includes/xtos.h @@ -22,7 +22,6 @@ #include ARCH_HEADER(globals.h) #include ARCH_HEADER(ar.h) -#include ARCH_HEADER(hl.h) #include ARCH_HEADER(ke.h) #include ARCH_HEADER(mm.h) #include ARCH_HEADER(rtl.h) -- 2.45.1 From 2803a4ec404b1bfb2a843744d4d3a9163cd5b6d5 Mon Sep 17 00:00:00 2001 From: Jozef Nagy Date: Wed, 29 Nov 2023 18:42:16 +0100 Subject: [PATCH 4/5] Remove PIC support; disable it on boot --- xtoskrnl/hl/x86/pic.c | 100 ----------------------------------- xtoskrnl/includes/hl.h | 17 ------ xtoskrnl/ke/amd64/krnlinit.c | 1 - xtoskrnl/ke/i686/krnlinit.c | 3 ++ 4 files changed, 3 insertions(+), 118 deletions(-) diff --git a/xtoskrnl/hl/x86/pic.c b/xtoskrnl/hl/x86/pic.c index f61e158..f3794b0 100644 --- a/xtoskrnl/hl/x86/pic.c +++ b/xtoskrnl/hl/x86/pic.c @@ -9,95 +9,6 @@ #include -/** - * Initializes the 8259 PIC. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTCDECL -VOID -HlInitializePic(VOID) -{ - /* Start in cascade mode */ - HlWritePic(PIC1_CONTROL_PORT, PIC_ICW1_INIT | PIC_ICW1_ICW4); - HlWritePic(PIC2_CONTROL_PORT, PIC_ICW1_INIT | PIC_ICW1_ICW4); - - /* PIC Vector offset */ - HlWritePic(PIC1_DATA_PORT, 0x20); - HlWritePic(PIC2_DATA_PORT, 0x28); - - /* Tell Master PIC that there is a Slave PIC */ - HlWritePic(PIC1_DATA_PORT, 4); - - /* Tell Slave PIC its cascade identity */ - HlWritePic(PIC2_DATA_PORT, 2); - - /* Tell PIC to use 8086 mode */ - HlWritePic(PIC1_DATA_PORT, PIC_ICW4_8086); - HlWritePic(PIC2_DATA_PORT, PIC_ICW4_8086); - - /* Mask all IRQs by default */ - /* This makes sure we don't get any interrupts we can't handle yet. */ - for (UCHAR Irq = 0; Irq < 16; Irq++) - { - HlSetMaskIrqPic(Irq); - } -} - -/** - * Masks an IRQ in the 8259 PIC. - * - * @param Irq - * Supplies the IRQ number to be masked. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTCDECL -VOID -HlSetMaskIrqPic(UCHAR Irq) -{ - UINT Port; - - if(Irq < 8) { - Port = PIC1_DATA_PORT; - } else { - Port = PIC2_DATA_PORT; - Irq -= 8; - } - - HlWritePic(Port, HlIoPortInByte(Port) | (1 << Irq)); -} - -/** - * Clears an IRQ mask in the 8259 PIC. - * - * @param Irq - * Supplies the IRQ number to be unmasked. - * - * @return This routine does not return any value. - * - * @since XT 1.0 - */ -XTCDECL -VOID -HlClearMaskIrqPic(UCHAR Irq) -{ - UINT Port; - - if(Irq < 8) { - Port = PIC1_DATA_PORT; - } else { - Port = PIC2_DATA_PORT; - Irq -= 8; - } - - HlWritePic(Port, HlIoPortInByte(Port) & ~(1 << Irq)); -} - /** * Disables the 8259 PIC. * @@ -113,17 +24,6 @@ HlDisablePic(VOID) HlIoPortOutByte(PIC2_DATA_PORT, 0xFF); } -XTFASTCALL -VOID -HlWritePic(IN UCHAR Register, IN UCHAR Value) -{ - /* Send data */ - HlIoPortOutByte(Register, Value); - - /* Wait for some time to make sure PIC has processed the data */ - HlIoPortOutByte(0x80, 0x00); -} - /** * Reads from the APIC register. * diff --git a/xtoskrnl/includes/hl.h b/xtoskrnl/includes/hl.h index c89aeee..4c680d5 100644 --- a/xtoskrnl/includes/hl.h +++ b/xtoskrnl/includes/hl.h @@ -11,28 +11,11 @@ #include - /* HAL library routines forward references */ -XTCDECL -VOID -HlInitializePic(VOID); - -XTCDECL -VOID -HlSetMaskIrqPic(UCHAR Irq); - -XTCDECL -VOID -HlClearMaskIrqPic(UCHAR Irq); - XTCDECL VOID HlDisablePic(VOID); -XTFASTCALL -VOID -HlWritePic(IN UCHAR Register, IN UCHAR Value); - XTAPI VOID HlClearScreen(VOID); diff --git a/xtoskrnl/ke/amd64/krnlinit.c b/xtoskrnl/ke/amd64/krnlinit.c index b3022be..90bdb66 100644 --- a/xtoskrnl/ke/amd64/krnlinit.c +++ b/xtoskrnl/ke/amd64/krnlinit.c @@ -71,7 +71,6 @@ KepInitializeMachine(VOID) HlIoPortOutByte(0x3F6, 0); /* Disable the legacy PIC */ - HlInitializePic(); HlDisablePic(); } diff --git a/xtoskrnl/ke/i686/krnlinit.c b/xtoskrnl/ke/i686/krnlinit.c index faefae0..f8ec530 100644 --- a/xtoskrnl/ke/i686/krnlinit.c +++ b/xtoskrnl/ke/i686/krnlinit.c @@ -69,6 +69,9 @@ KepInitializeMachine(VOID) /* Re-enable IDE interrupts */ HlIoPortOutByte(0x376, 0); HlIoPortOutByte(0x3F6, 0); + + /* Disable the legacy PIC */ + HlDisablePic(); } /** -- 2.45.1 From c97f1156b76630a04964931fed1c86f83ce067ae Mon Sep 17 00:00:00 2001 From: Jozef Nagy Date: Wed, 29 Nov 2023 19:35:15 +0100 Subject: [PATCH 5/5] Removed PIC command definitions --- sdk/xtdk/amd64/hltypes.h | 13 ------------- sdk/xtdk/i686/hltypes.h | 13 ------------- 2 files changed, 26 deletions(-) diff --git a/sdk/xtdk/amd64/hltypes.h b/sdk/xtdk/amd64/hltypes.h index c87bdbb..e50334b 100644 --- a/sdk/xtdk/amd64/hltypes.h +++ b/sdk/xtdk/amd64/hltypes.h @@ -64,19 +64,6 @@ #define PIC2_DATA_PORT 0xA1 #define PIC2_ELCR_PORT 0x04D1 -/* 8259 PIC commands */ -#define PIC_ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */ -#define PIC_ICW1_SINGLE 0x02 /* Single (cascade) mode */ -#define PIC_ICW1_INTERVAL4 0x04 /* Call address interva l 4 (8) */ -#define PIC_ICW1_LEVEL 0x08 /* Level triggered (edge) mode */ -#define PIC_ICW1_INIT 0x10 /* Initialization - required! */ - -#define PIC_ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */ -#define PIC_ICW4_AUTO 0x02 /* Auto (normal) EOI */ -#define PIC_ICW4_BUF_MASTER 0x0C /* Buffered mode/master */ -#define PIC_ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */ -#define PIC_ICW4_SFNM 0x10 /* Special fully nested (not) */ - /* PIC vector definitions */ #define PIC1_VECTOR_SPURIOUS 0x37 diff --git a/sdk/xtdk/i686/hltypes.h b/sdk/xtdk/i686/hltypes.h index 7f02bdc..322e9c9 100644 --- a/sdk/xtdk/i686/hltypes.h +++ b/sdk/xtdk/i686/hltypes.h @@ -69,19 +69,6 @@ #define PIC2_DATA_PORT 0xA1 #define PIC2_ELCR_PORT 0x04D1 -/* 8259 PIC commands */ -#define PIC_ICW1_ICW4 0x01 /* Indicates that ICW4 will be present */ -#define PIC_ICW1_SINGLE 0x02 /* Single (cascade) mode */ -#define PIC_ICW1_INTERVAL4 0x04 /* Call address interva l 4 (8) */ -#define PIC_ICW1_LEVEL 0x08 /* Level triggered (edge) mode */ -#define PIC_ICW1_INIT 0x10 /* Initialization - required! */ - -#define PIC_ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */ -#define PIC_ICW4_AUTO 0x02 /* Auto (normal) EOI */ -#define PIC_ICW4_BUF_MASTER 0x0C /* Buffered mode/master */ -#define PIC_ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */ -#define PIC_ICW4_SFNM 0x10 /* Special fully nested (not) */ - /* PIC vector definitions */ #define PIC1_VECTOR_SPURIOUS 0x37 -- 2.45.1