76 lines
1.7 KiB
C++
76 lines
1.7 KiB
C++
/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/hl/amd64/runlevel.cc
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* DESCRIPTION: Run Level management support for AMD64 architecture
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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*/
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#include <xtos.hh>
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/**
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* Gets the current run level from APIC for the current processor.
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*
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* @return This routine returns the current run level.
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*
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* @since XT 1.0
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*/
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XTFASTCALL
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KRUNLEVEL
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HL::RunLevel::GetRunLevel(VOID)
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{
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return (KRUNLEVEL)AR::CpuFunc::ReadControlRegister(8);
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}
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/**
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* Sets new run level for the current processor.
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*
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* @param RunLevel
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* Supplies the new run level to store into APIC.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTFASTCALL
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VOID
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HL::RunLevel::SetRunLevel(IN KRUNLEVEL RunLevel)
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{
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AR::CpuFunc::WriteControlRegister(8, RunLevel);
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}
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/**
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* Maps APIC interrupt vector to XT run level.
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*
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* @param Tpr
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* Supplies the interrupt vector rad from APIC Task Priority Register.
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*
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* @return This routine returns the XT run level corresponding to the specified APIC interrupt vector.
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*
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* @since XT 1.0
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*/
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XTFASTCALL
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KRUNLEVEL
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HL::RunLevel::TransformApicTprToRunLevel(IN UCHAR Tpr)
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{
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return (KRUNLEVEL)(Tpr >> 4);
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}
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/**
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* Maps XT run level to interrupt vector suitable for the APIC Task Priority Register.
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*
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* @param RunLevel
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* Supplies the XT run level.
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*
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* @return This routine returns the APIC interrupt vector corresponding to the specified XT run level.
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*
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* @since XT 1.0
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*/
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XTFASTCALL
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UCHAR
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HL::RunLevel::TransformRunLevelToApicTpr(IN KRUNLEVEL RunLevel)
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{
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return (RunLevel << 4);
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}
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