134 lines
3.2 KiB
C++
134 lines
3.2 KiB
C++
/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/hl/i686/runlevel.cc
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* DESCRIPTION: Run Level management support for i686 architecture
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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*/
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#include <xtos.hh>
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/**
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* Gets the current run level from APIC for the current processor.
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*
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* @return This routine returns the current run level.
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*
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* @since XT 1.0
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*/
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XTFASTCALL
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KRUNLEVEL
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HL::RunLevel::GetRunLevel(VOID)
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{
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return TransformApicTprToRunLevel(HL::Pic::ReadApicRegister(APIC_TPR));
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}
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/**
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* Sets new run level for the current processor.
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*
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* @param RunLevel
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* Supplies the new run level to store into APIC.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTFASTCALL
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VOID
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HL::RunLevel::SetRunLevel(IN KRUNLEVEL RunLevel)
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{
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HL::Pic::WriteApicRegister(APIC_TPR, TransformRunLevelToApicTpr(RunLevel));
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}
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/**
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* Maps APIC interrupt vector to XT run level.
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*
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* @param Tpr
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* Supplies the interrupt vector rad from APIC Task Priority Register.
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*
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* @return This routine returns the XT run level corresponding to the specified APIC interrupt vector.
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*
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* @since XT 1.0
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*/
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XTFASTCALL
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KRUNLEVEL
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HL::RunLevel::TransformApicTprToRunLevel(IN UCHAR Tpr)
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{
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STATIC KRUNLEVEL TransformationTable[16] =
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{
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PASSIVE_LEVEL,
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PASSIVE_LEVEL,
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PASSIVE_LEVEL,
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APC_LEVEL,
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DISPATCH_LEVEL,
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DEVICE1_LEVEL,
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DEVICE2_LEVEL,
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DEVICE3_LEVEL,
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DEVICE4_LEVEL,
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DEVICE5_LEVEL,
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DEVICE6_LEVEL,
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DEVICE7_LEVEL,
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PROFILE_LEVEL,
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CLOCK_LEVEL,
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IPI_LEVEL,
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HIGH_LEVEL
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};
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/* Return the run level corresponding to the TPR from the transformation table. */
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return TransformationTable[Tpr / 16];
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}
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/**
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* Maps XT run level to interrupt vector suitable for the APIC Task Priority Register.
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*
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* @param RunLevel
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* Supplies the XT run level.
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*
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* @return This routine returns the APIC interrupt vector corresponding to the specified XT run level.
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*
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* @since XT 1.0
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*/
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XTFASTCALL
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UCHAR
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HL::RunLevel::TransformRunLevelToApicTpr(IN KRUNLEVEL RunLevel)
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{
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STATIC UCHAR TransformationTable[32] =
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{
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APIC_VECTOR_ZERO,
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APIC_VECTOR_APC,
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APIC_VECTOR_DPC,
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APIC_VECTOR_DPC,
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APIC_VECTOR_DEVICE1,
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APIC_VECTOR_DEVICE2,
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APIC_VECTOR_DEVICE3,
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APIC_VECTOR_DEVICE4,
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APIC_VECTOR_DEVICE5,
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APIC_VECTOR_DEVICE6,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_DEVICE7,
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APIC_VECTOR_GENERIC,
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APIC_VECTOR_CLOCK,
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APIC_VECTOR_IPI,
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APIC_VECTOR_POWERFAIL,
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APIC_VECTOR_NMI
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};
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/* Return the TPR corresponding to the run level from the transformation table. */
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return TransformationTable[RunLevel];
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}
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