113 lines
4.0 KiB
C++
113 lines
4.0 KiB
C++
/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/hl/data.cc
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* DESCRIPTION: Hardware Layer global and static data
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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*/
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#include <xtos.hh>
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/* Tracks the total number of currently cached ACPI tables */
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ULONG HL::Acpi::CacheCount = 0;
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/* Array holding the cached ACPI tables */
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ACPI_CACHE_LIST HL::Acpi::CacheEntries[ACPI_MAX_CACHED_TABLES];
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/* Head of the linked list tracking dynamically mapped ACPI tables */
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LIST_ENTRY HL::Acpi::CacheList;
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/* Pointer to the ACPI Root System Description Pointer (RSDP) */
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PACPI_RSDP HL::Acpi::RsdpStructure;
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/* Global architectural system states and hardware feature flags parsed from the ACPI tables */
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ACPI_SYSTEM_INFO HL::Acpi::SystemInfo;
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/* Hardware configuration details and port addresses for the ACPI Power Management Timer */
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ACPI_TIMER_INFO HL::Acpi::TimerInfo;
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/* Represents the number of active processors */
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KAFFINITY HL::Cpu::ActiveProcessors;
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/* Metadata detailing the linear frame buffer geometry */
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HL_FRAMEBUFFER_DATA HL::FrameBuffer::FrameBufferData;
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/* Pointer to the RAM shadow buffer used for double-buffered rendering */
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PVOID HL::FrameBuffer::ScreenShadowBuffer;
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/* Tracks the bounding box, dimensions, and cursor position for the kernel video console */
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HL_SCROLL_REGION_DATA HL::FrameBuffer::ScrollRegionData;
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/* Indicates the active hardware interrupt controller mode */
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APIC_MODE HL::Pic::ApicMode;
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/* Total number of I/O APIC chips discovered and initialized */
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ULONG HL::Pic::ControllerCount;
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/* Array containing MMIO bases, IDs, and line counts for all I/O APICs */
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IOAPIC_DATA HL::Pic::Controllers[IOAPIC_MAX_CONTROLLERS];
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/* Total number of legacy ISA interrupt routing overrides */
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ULONG HL::Pic::IrqOverrideCount;
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/* Hardware routing definitions mapping legacy ISA interrupts to Global System Interrupts (GSI) */
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ACPI_MADT_INTERRUPT_OVERRIDE HL::Pic::IrqOverrides[IOAPIC_MAX_OVERRIDES];
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/* Lookup table mapping allocated hardware APIC vectors to their assigned Run Levels */
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UCHAR HL::Pic::MappedVectors[256];
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/* Accumulated tick value of the ACPI Power Management Timer */
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ULONG HL::Timer::AcpiPmPerformanceCounter = 0;
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/* Primary hardware timer driving the periodic system clock interrupt */
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TIMER_TYPE HL::Timer::ClockType;
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/* Fractional remainder used to maintain long-term system clock accuracy */
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ULONG HL::Timer::FractionalIncrement = 0;
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/* Virtual address mapped to the HPET hardware MMIO registers */
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PVOID HL::Timer::HpetAddress = NULLPTR;
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/* Operating frequency of the High Precision Event Timer in ticks per second */
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ULONGLONG HL::Timer::HpetFrequency = 0;
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/* Spinlock protecting concurrent multiprocessor access to the global performance counters */
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KSPIN_LOCK HL::Timer::PerformanceCounterLock;
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/* The performance counter frequency in ticks per second */
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ULONGLONG HL::Timer::PerformanceFrequency = 0;
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/* Absolute monotonic tick count driven by the legacy Programmable Interval Timer */
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ULONGLONG HL::Timer::PitPerformanceCounter;
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/* Programmed hardware divider interval used to increment the PIT performance counter */
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ULONG HL::Timer::PitRollover;
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/* Flag indicating whether statistical system execution profiling is currently active */
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BOOLEAN HL::Timer::ProfilingEnabled = FALSE;
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/* Tick interval required to trigger a profile interrupt */
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ULONG HL::Timer::ProfilingTicks;
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/* Global accumulator for fractional time drift and precision compensation */
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ULONG HL::Timer::RunningFraction = 0;
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/* System counter driven by the highest precision available hardware */
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ULONGLONG HL::Timer::SystemPerformanceCounter;
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/* Current base clock increment in standard 100-nanosecond intervals */
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ULONG HL::Timer::TimeIncrement = 0;
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/* Timer capabilities */
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TIMER_CAPABILITIES HL::Timer::TimerCapabilities = {0};
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/* APIC timer frequency */
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ULONG HL::Timer::TimerFrequency;
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/* Function dispatch table for the active hardware timer backend */
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TIMER_ROUTINES HL::Timer::TimerRoutines = {0};
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/* Identifies the hardware timer backing */
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TIMER_TYPE HL::Timer::TimerType;
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