256 lines
6.3 KiB
C++
256 lines
6.3 KiB
C++
/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/mm/i686/pagemap.cc
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* DESCRIPTION: Low-level support for i686 page map manipulation
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* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
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*/
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#include <xtos.hh>
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/**
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* Clears the contents of a page table entry (PTE).
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*
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* @param PtePointer
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* Pointer to the page table entry (PTE) to be cleared.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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MM::PageMap::ClearPte(PHARDWARE_PTE PtePointer)
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{
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PtePointer->CacheDisable = 0;
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PtePointer->PageFrameNumber = 0;
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PtePointer->Valid = 0;
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PtePointer->Writable = 0;
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PtePointer->WriteThrough = 0;
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}
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/**
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* Gets the address of the P5E (Page Map Level 5 Entry), that maps given address.
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*
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* @param Address
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* Specifies the virtual address for which to retrieve the corresponding P5E.
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*
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* @return This routine returns the address of the P5E, or NULLPTR if LA57 is not enabled.
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*
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* @since XT 1.0
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*/
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XTAPI
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PMMP5E
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MM::PageMap::GetP5eAddress(PVOID Address)
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{
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ULONGLONG Offset;
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/* Calculate offset and return P5E address */
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Offset = ((((ULONGLONG)Address & (((ULONGLONG)1 << PageMapInfo.VaBits) - 1)) >> MM_P5I_SHIFT) << MM_PTE_SHIFT);
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return (PMMP5E)((PageMapInfo.P5eBase + Offset) * PageMapInfo.Xpa);
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}
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/**
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* Gets the address of the PDE (Page Directory Entry), that maps given address.
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*
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* @param Address
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* Specifies the virtual address for which to retrieve the corresponding PDE.
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*
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* @return This routine returns the address of the PDE.
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*
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* @since XT 1.0
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*/
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XTAPI
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PMMPDE
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MM::PageMap::GetPdeAddress(PVOID Address)
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{
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ULONGLONG Offset;
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/* Calculate offset and return PDE address */
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Offset = ((((ULONGLONG)Address & (((ULONGLONG)1 << PageMapInfo.VaBits) - 1)) >> MM_PDI_SHIFT) << MM_PTE_SHIFT);
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return (PMMPDE)(PageMapInfo.PdeBase + Offset);
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}
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/**
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* Gets the address of the PPE (Page Directory Pointer Table Entry), that maps given address.
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*
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* @param Address
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* Specifies the virtual address for which to retrieve the corresponding PDE.
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*
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* @return This routine returns the address of the PPE.
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*
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* @since XT 1.0
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*/
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XTAPI
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PMMPPE
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MM::PageMap::GetPpeAddress(PVOID Address)
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{
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ULONGLONG Offset;
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/* Calculate offset and return PPE address */
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Offset = ((((ULONGLONG)Address & (((ULONGLONG)1 << PageMapInfo.VaBits) - 1)) >> MM_PPI_SHIFT) << MM_PTE_SHIFT);
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return (PMMPPE)(PageMapInfo.PpeBase + Offset);
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}
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/**
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* Gets the address of the PTE (Page Table Entry), that maps given address.
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*
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* @param Address
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* Specifies the virtual address for which to retrieve the corresponding PTE.
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*
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* @return This routine returns the address of the PTE.
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*
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* @since XT 1.0
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*/
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XTAPI
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PMMPTE
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MM::PageMap::GetPteAddress(PVOID Address)
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{
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ULONGLONG Offset;
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/* Calculate offset and return PTE address */
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Offset = ((((ULONGLONG)Address & (((ULONGLONG)1 << PageMapInfo.VaBits) - 1)) >> MM_PTI_SHIFT) << MM_PTE_SHIFT);
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return (PMMPTE)(PageMapInfo.PteBase + Offset);
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}
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/**
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* Gets the address of the PXE (Extended Page Entry), that maps given address.
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*
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* @param Address
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* Specifies the virtual address for which to retrieve the corresponding PXE.
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*
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* @return This routine returns the address of the PXE.
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*
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* @since XT 1.0
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*/
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XTAPI
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PMMPXE
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MM::PageMap::GetPxeAddress(PVOID Address)
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{
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ULONGLONG Offset;
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Offset = ((((ULONGLONG)Address & (((ULONGLONG)1 << PageMapInfo.VaBits) - 1)) >> MM_PXI_SHIFT) << MM_PTE_SHIFT);
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return (PMMPXE)(PageMapInfo.PxeBase + Offset);
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}
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/**
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* Checks whether the given PML2 page table entry (PTE) is valid.
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*
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* @param PtePointer
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* Pointer to the page table entry (PTE) to check.
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*
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* @return Returns TRUE if the entry is valid, FALSE otherwise.
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*
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* @since XT 1.0
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*/
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XTAPI
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BOOLEAN
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MM::PageMap::PteValid(PHARDWARE_PTE PtePointer)
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{
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return (BOOLEAN)PtePointer->Valid;
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}
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/**
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* Sets a PML2 page table entry (PTE) with the specified physical page and access flags.
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*
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* @param PtePointer
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* Pointer to the page table entry (PTE) to set.
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*
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* @param PageFrameNumber
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* Physical frame number to map.
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*
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* @param Writable
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* Indicates whether the page should be writable.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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MM::PageMap::SetPte(PHARDWARE_PTE PtePointer,
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PFN_NUMBER PageFrameNumber,
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BOOLEAN Writable)
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{
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PtePointer->PageFrameNumber = PageFrameNumber;
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PtePointer->Valid = 1;
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PtePointer->Writable = Writable;
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}
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/**
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* Sets caching attributes for a PML2 page table entry (PTE).
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*
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* @param PtePointer
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* Pointer to the page table entry (PTE) to modify.
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*
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* @param CacheDisable
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* Indicates whether caching should be disabled for this page.
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*
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* @param WriteThrough
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* Indicates whether write-through caching should be enabled.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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MM::PageMap::SetPteCaching(PHARDWARE_PTE PtePointer,
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BOOLEAN CacheDisable,
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BOOLEAN WriteThrough)
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{
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PtePointer->CacheDisable = CacheDisable;
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PtePointer->WriteThrough = WriteThrough;
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}
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/**
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* Initializes page map information for basic paging (PML4).
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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MM::PageMapBasic::InitializePageMapInfo(VOID)
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{
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/* Set PML4 page map information */
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PageMapInfo.Xpa = FALSE;
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/* Set PML4 base addresses */
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PageMapInfo.PteBase = MM_PTE_BASE;
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PageMapInfo.PdeBase = MM_PDE_BASE;
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PageMapInfo.PpeBase = MM_PPE_BASE;
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PageMapInfo.PxeBase = MM_PXE_BASE;
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PageMapInfo.P5eBase = 0x0;
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/* PML use 48-bit virtual addresses */
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PageMapInfo.VaBits = 48;
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}
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/**
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* Initializes page map information for XPA paging (PML5).
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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MM::PageMapXpa::InitializePageMapInfo(VOID)
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{
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/* Set PML5 page map information */
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PageMapInfo.Xpa = TRUE;
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/* Set PML5 base addresses */
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PageMapInfo.PteBase = MM_PTE_LA57_BASE;
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PageMapInfo.PdeBase = MM_PDE_LA57_BASE;
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PageMapInfo.PpeBase = MM_PPE_LA57_BASE;
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PageMapInfo.PxeBase = MM_PXE_LA57_BASE;
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PageMapInfo.P5eBase = MM_P5E_LA57_BASE;
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/* PML5 use 57-bit virtual addresses */
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PageMapInfo.VaBits = 57;
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}
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