503 lines
18 KiB
C++
503 lines
18 KiB
C++
/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/ke/amd64/proc.cc
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* DESCRIPTION: AMD64 processor-related functionality for the kernel
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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*/
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#include <xtos.hh>
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/**
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* Gets the processor block for the currently executing processor.
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*
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* @return This routine returns the current processor block read from the GS register.
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*
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* @since XT 1.0
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*/
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XTAPI
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PKPROCESSOR_BLOCK
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KE::Processor::GetCurrentProcessorBlock(VOID)
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{
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/* Get processor block from GS register */
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return (PKPROCESSOR_BLOCK)AR::CpuFunctions::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, Self));
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}
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/**
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* Gets the processor control block for the currently executing processor.
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*
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* @return This routine returns the current processor control block read from the GS register.
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*
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* @since XT 1.0
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*/
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XTAPI
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PKPROCESSOR_CONTROL_BLOCK
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KE::Processor::GetCurrentProcessorControlBlock(VOID)
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{
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return (PKPROCESSOR_CONTROL_BLOCK)AR::CpuFunctions::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CurrentPrcb));
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}
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/**
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* Gets the number of the currently executing processor.
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*
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* @return This routine returns the zero-indexed processor number.
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*
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* @since XT 1.0
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*/
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XTAPI
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ULONG
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KE::Processor::GetCurrentProcessorNumber(VOID)
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{
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return (ULONG)AR::CpuFunctions::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CpuNumber));
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}
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/**
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* Gets the current thread running on the currently executing processor.
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*
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* @return This routine returns the address of the current thread object.
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*
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* @since NT 3.5
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*/
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XTAPI
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PKTHREAD
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KE::Processor::GetCurrentThread(VOID)
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{
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return (PKTHREAD)AR::CpuFunctions::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, Prcb.CurrentThread));
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}
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/**
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* Retrieves the number of installed and enabled CPUs in the system.
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*
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* @return This routine returns the number of installed CPUs in the system.
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*
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* @since XT 1.0
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*/
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XTAPI
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ULONG
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KE::Processor::GetInstalledCpus(VOID)
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{
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/* Return number of installed CPUs */
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return InstalledCpus;
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}
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/**
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* Gets the processor block for the specified processor number.
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*
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* @param CpuNumber
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* Supplies the zero-indexed processor number.
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*
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* @return This routine returns a pointer to the processor block, or NULLPTR if invalid.
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*
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* @since XT 1.0
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*/
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XTAPI
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PKPROCESSOR_BLOCK
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KE::Processor::GetProcessorBlock(IN ULONG CpuNumber)
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{
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/* Check if the requested CPU number is within dynamic bounds */
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if(CpuNumber >= InstalledCpus || ProcessorBlocks == NULLPTR || ProcessorBlocks[CpuNumber] == NULLPTR)
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{
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/* Invalid CPU number, return NULLPTR */
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return NULLPTR;
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}
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/* Return requested processor block */
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return ProcessorBlocks[CpuNumber];
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}
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/**
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* Initializes the global processor structures by allocating an array of processor block pointers.
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*
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* @return This routine returns a status code indicating the success or failure of the allocation.
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*
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* @since XT 1.0
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*/
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XTAPI
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XTSTATUS
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KE::Processor::InitializeProcessorBlocks()
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{
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PACPI_SYSTEM_INFO SystemInfo;
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XTSTATUS Status;
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/* Save number of CPUs installed */
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HL::Acpi::GetSystemInformation(&SystemInfo);
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InstalledCpus = SystemInfo->CpuCount;
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/* Allocate an array of pointers */
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Status = MM::Allocator::AllocatePool(NonPagedPool,
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InstalledCpus * sizeof(PKPROCESSOR_BLOCK),
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(PVOID*)&ProcessorBlocks);
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if(Status != STATUS_SUCCESS)
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{
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/* Failed to allocate memory, return error */
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return Status;
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}
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/* Zero the array initially */
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RTL::Memory::ZeroMemory(ProcessorBlocks, InstalledCpus * sizeof(PKPROCESSOR_BLOCK));
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/* Register the processor block for the BSP processor */
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KE::Processor::RegisterProcessorBlock(0, KE::Processor::GetCurrentProcessorBlock());
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/* Return success */
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return STATUS_SUCCESS;
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}
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/**
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* Registers the hardware APIC ID for the currently executing processor.
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*
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* @param ApicId
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* Supplies the hardware APIC ID to register in the processor block.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KE::Processor::RegisterHardwareId(IN ULONG HardwareId)
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{
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PKPROCESSOR_BLOCK CurrentBlock;
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/* Retrieve the processor block for the executing core */
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CurrentBlock = GetCurrentProcessorBlock();
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if(CurrentBlock != NULLPTR)
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{
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/* Register the hardware identifier for IPI targeting */
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CurrentBlock->HardwareId = HardwareId;
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}
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}
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/**
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* Registers or deregisters a processor block in the global CPU table.
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*
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* @param CpuNumber
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* Specifies the logical processor number.
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*
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* @param ProcessorBlock
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* Supplies a pointer to the processor block.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KE::Processor::RegisterProcessorBlock(ULONG CpuNumber,
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PKPROCESSOR_BLOCK ProcessorBlock)
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{
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/* Check if the requested CPU number is within dynamic bounds */
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if(ProcessorBlocks != NULLPTR && CpuNumber < InstalledCpus)
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{
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/* Register processor block */
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ProcessorBlocks[CpuNumber] = ProcessorBlock;
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}
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}
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/**
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* Restores the processor's architectural state from the provided context frame back into the hardware trap
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* and exception frames.
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*
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* @param TrapFrame
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* Supplies a pointer to the trap frame that will receive the volatile processor state and control registers.
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*
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* @param ExceptionFrame
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* Supplies a pointer to the exception frame that will receive the non-volatile integer and FP registers.
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*
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* @param ContextFrame
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* Supplies a pointer to the context frame containing the state to be restored.
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*
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* @param ContextFlags
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* Supplies a bitmask indicating which specific register groups should be restored from the ContextFrame.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KE::Processor::RestoreProcessorContext(IN OUT PKTRAP_FRAME TrapFrame,
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IN OUT PKEXCEPTION_FRAME ExceptionFrame,
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IN PCONTEXT ContextFrame,
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IN ULONG ContextFlags)
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{
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UNIMPLEMENTED;
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}
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/**
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* Restores the processor's low-level hardware control state.
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*
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* @param CpuState
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* Supplies a pointer to the processor state block containing the previously saved control data.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KE::Processor::RestoreProcessorControlState(IN PKPROCESSOR_STATE CpuState)
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{
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/* Restore the CR registers */
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AR::CpuFunctions::WriteControlRegister(0, CpuState->SpecialRegisters.Cr0);
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AR::CpuFunctions::WriteControlRegister(2, CpuState->SpecialRegisters.Cr2);
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AR::CpuFunctions::WriteControlRegister(3, CpuState->SpecialRegisters.Cr3);
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AR::CpuFunctions::WriteControlRegister(4, CpuState->SpecialRegisters.Cr4);
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AR::CpuFunctions::WriteControlRegister(8, CpuState->SpecialRegisters.Cr8);
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/* Restore the DR registers */
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AR::CpuFunctions::WriteDebugRegister(0, CpuState->SpecialRegisters.KernelDr0);
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AR::CpuFunctions::WriteDebugRegister(1, CpuState->SpecialRegisters.KernelDr1);
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AR::CpuFunctions::WriteDebugRegister(2, CpuState->SpecialRegisters.KernelDr2);
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AR::CpuFunctions::WriteDebugRegister(3, CpuState->SpecialRegisters.KernelDr3);
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AR::CpuFunctions::WriteDebugRegister(6, CpuState->SpecialRegisters.KernelDr6);
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AR::CpuFunctions::WriteDebugRegister(7, CpuState->SpecialRegisters.KernelDr7);
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/* Restore MSR registers */
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AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_GSBASE, CpuState->SpecialRegisters.MsrGsBase);
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AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_KERNEL_GSBASE, CpuState->SpecialRegisters.MsrGsSwap);
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AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_CSTAR, CpuState->SpecialRegisters.MsrCStar);
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AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_LSTAR, CpuState->SpecialRegisters.MsrLStar);
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AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_STAR, CpuState->SpecialRegisters.MsrStar);
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AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_FMASK, CpuState->SpecialRegisters.MsrSyscallMask);
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/* Restore XMM control/status register */
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AR::CpuFunctions::LoadMxcsrRegister(CpuState->SpecialRegisters.MxCsr);
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/* Restore GDT, IDT and LDT */
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AR::CpuFunctions::LoadGlobalDescriptorTable(&CpuState->SpecialRegisters.Gdtr.Limit);
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AR::CpuFunctions::LoadInterruptDescriptorTable(&CpuState->SpecialRegisters.Idtr.Limit);
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AR::CpuFunctions::LoadLocalDescriptorTable(CpuState->SpecialRegisters.Ldtr);
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/* Force the TSS descriptor into a non-busy state and restore TaskRegister */
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*(VOLATILE PUCHAR)((ULONG_PTR)CpuState->SpecialRegisters.Gdtr.Base + CpuState->SpecialRegisters.Tr + 5) &= ~0x02;
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AR::CpuFunctions::LoadTaskRegister(CpuState->SpecialRegisters.Tr);
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}
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/**
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* Restores the executing processor's state.
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*
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* @param TrapFrame
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* Supplies a pointer to the hardware trap frame that will be populated with the restored volatile state.
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*
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* @param ExceptionFrame
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* Supplies a pointer to the exception frame that will be populated with the restored non-volatile state.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KE::Processor::RestoreProcessorState(OUT PKTRAP_FRAME TrapFrame,
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OUT PKEXCEPTION_FRAME ExceptionFrame)
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{
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PKPROCESSOR_CONTROL_BLOCK Prcb;
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/* Retrieve current processor control block */
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Prcb = GetCurrentProcessorControlBlock();
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/* Restore processor context */
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RestoreProcessorContext(TrapFrame, ExceptionFrame, &Prcb->ProcessorState.ContextFrame, CONTEXT_ALL);
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/* Restore processor control registers */
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RestoreProcessorControlState(&Prcb->ProcessorState);
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}
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/**
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* Constructs a standardized processor context from the hardware trap and exception frames.
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*
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* @param TrapFrame
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* Supplies a pointer to the trap frame containing volatile processor state, control registers and debug
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* registers saved at the time of the interrupt or exception.
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*
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* @param ExceptionFrame
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* Supplies a pointer to the exception frame containing non-volatile integer and floating-point registers.
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*
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* @param ContextFrame
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* Supplies a pointer to the context frame that will receive the processor state.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KE::Processor::SaveProcessorContext(IN PKTRAP_FRAME TrapFrame,
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IN PKEXCEPTION_FRAME ExceptionFrame,
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IN OUT PCONTEXT ContextFrame)
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{
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/* Elevate RunLevel to APC_LEVEL to prevent thread preemption */
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KE::RaiseRunLevel RunLevel(APC_LEVEL);
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/* Check if control registers are requested */
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if(ContextFrame->ContextFlags & CONTEXT_CONTROL)
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{
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/* Copy instruction pointer, stack pointer, and CPU status flags */
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ContextFrame->Flags = TrapFrame->Flags;
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ContextFrame->Rbp = TrapFrame->Rbp;
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ContextFrame->Rip = TrapFrame->Rip;
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ContextFrame->Rsp = TrapFrame->Rsp;
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ContextFrame->SegCs = TrapFrame->SegCs;
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ContextFrame->SegSs = TrapFrame->SegSs;
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}
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/* Check if general-purpose integer registers are requested */
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if(ContextFrame->ContextFlags & CONTEXT_INTEGER)
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{
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/* Copy volatile integer registers directly from the trap frame */
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ContextFrame->Rax = TrapFrame->Rax;
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ContextFrame->Rcx = TrapFrame->Rcx;
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ContextFrame->Rdx = TrapFrame->Rdx;
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ContextFrame->R8 = TrapFrame->R8;
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ContextFrame->R9 = TrapFrame->R9;
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ContextFrame->R10 = TrapFrame->R10;
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ContextFrame->R11 = TrapFrame->R11;
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/* Check if a valid exception frame was provided */
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if(ExceptionFrame)
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{
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/* Copy non-volatile integer registers from the exception frame */
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ContextFrame->Rbx = ExceptionFrame->Rbx;
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ContextFrame->R12 = ExceptionFrame->R12;
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ContextFrame->R13 = ExceptionFrame->R13;
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ContextFrame->R14 = ExceptionFrame->R14;
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ContextFrame->R15 = ExceptionFrame->R15;
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ContextFrame->Rdi = ExceptionFrame->Rdi;
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ContextFrame->Rsi = ExceptionFrame->Rsi;
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}
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}
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/* Check if segment registers are requested */
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if(ContextFrame->ContextFlags & CONTEXT_SEGMENTS)
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{
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/* Populate segment selectors with standard Ring 3 values */
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ContextFrame->SegDs = KGDT_R3_DATA | RPL_MASK;
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ContextFrame->SegEs = KGDT_R3_DATA | RPL_MASK;
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ContextFrame->SegFs = KGDT_R3_CMTEB | RPL_MASK;
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ContextFrame->SegGs = KGDT_R3_DATA | RPL_MASK;
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}
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/* Check if floating-point registers are requested */
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if(ContextFrame->ContextFlags & CONTEXT_FLOATING_POINT)
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{
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/* Copy the SSE control/status register and volatile XMM registers */
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ContextFrame->MxCsr = TrapFrame->MxCsr;
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ContextFrame->Xmm0 = TrapFrame->Xmm0;
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ContextFrame->Xmm1 = TrapFrame->Xmm1;
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ContextFrame->Xmm2 = TrapFrame->Xmm2;
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ContextFrame->Xmm3 = TrapFrame->Xmm3;
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ContextFrame->Xmm4 = TrapFrame->Xmm4;
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ContextFrame->Xmm5 = TrapFrame->Xmm5;
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/* Check if a valid exception frame was provided */
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if(ExceptionFrame)
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{
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/* Copy non-volatile XMM registers from the exception frame */
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ContextFrame->Xmm6 = ExceptionFrame->Xmm6;
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ContextFrame->Xmm7 = ExceptionFrame->Xmm7;
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ContextFrame->Xmm8 = ExceptionFrame->Xmm8;
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ContextFrame->Xmm9 = ExceptionFrame->Xmm9;
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ContextFrame->Xmm10 = ExceptionFrame->Xmm10;
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ContextFrame->Xmm11 = ExceptionFrame->Xmm11;
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ContextFrame->Xmm12 = ExceptionFrame->Xmm12;
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ContextFrame->Xmm13 = ExceptionFrame->Xmm13;
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ContextFrame->Xmm14 = ExceptionFrame->Xmm14;
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ContextFrame->Xmm15 = ExceptionFrame->Xmm15;
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}
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}
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/* Check if debug registers are requested */
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if(ContextFrame->ContextFlags & CONTEXT_DEBUG_REGISTERS)
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{
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/* Copy debug registers */
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ContextFrame->Dr0 = TrapFrame->Dr0;
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ContextFrame->Dr1 = TrapFrame->Dr1;
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ContextFrame->Dr2 = TrapFrame->Dr2;
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ContextFrame->Dr3 = TrapFrame->Dr3;
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ContextFrame->Dr6 = TrapFrame->Dr6;
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ContextFrame->Dr7 = TrapFrame->Dr7;
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}
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}
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/**
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* Saves the current processor's low-level hardware control state.
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*
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* @param State
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* Supplies a pointer to the processor state block that will receive processor's control data.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KE::Processor::SaveProcessorControlState(OUT PKPROCESSOR_STATE CpuState)
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{
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/* Save CR registers */
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CpuState->SpecialRegisters.Cr0 = AR::CpuFunctions::ReadControlRegister(0);
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CpuState->SpecialRegisters.Cr2 = AR::CpuFunctions::ReadControlRegister(2);
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CpuState->SpecialRegisters.Cr3 = AR::CpuFunctions::ReadControlRegister(3);
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CpuState->SpecialRegisters.Cr4 = AR::CpuFunctions::ReadControlRegister(4);
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CpuState->SpecialRegisters.Cr8 = AR::CpuFunctions::ReadControlRegister(8);
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/* Save DR registers */
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CpuState->SpecialRegisters.KernelDr0 = AR::CpuFunctions::ReadDebugRegister(0);
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CpuState->SpecialRegisters.KernelDr1 = AR::CpuFunctions::ReadDebugRegister(1);
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CpuState->SpecialRegisters.KernelDr2 = AR::CpuFunctions::ReadDebugRegister(2);
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CpuState->SpecialRegisters.KernelDr3 = AR::CpuFunctions::ReadDebugRegister(3);
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CpuState->SpecialRegisters.KernelDr6 = AR::CpuFunctions::ReadDebugRegister(6);
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CpuState->SpecialRegisters.KernelDr7 = AR::CpuFunctions::ReadDebugRegister(7);
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/* Save MSR registers */
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CpuState->SpecialRegisters.MsrGsBase = AR::CpuFunctions::ReadModelSpecificRegister(X86_MSR_GSBASE);
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CpuState->SpecialRegisters.MsrGsSwap = AR::CpuFunctions::ReadModelSpecificRegister(X86_MSR_KERNEL_GSBASE);
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CpuState->SpecialRegisters.MsrCStar = AR::CpuFunctions::ReadModelSpecificRegister(X86_MSR_CSTAR);
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CpuState->SpecialRegisters.MsrLStar = AR::CpuFunctions::ReadModelSpecificRegister(X86_MSR_LSTAR);
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CpuState->SpecialRegisters.MsrStar = AR::CpuFunctions::ReadModelSpecificRegister(X86_MSR_STAR);
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CpuState->SpecialRegisters.MsrSyscallMask = AR::CpuFunctions::ReadModelSpecificRegister(X86_MSR_FMASK);
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/* Save XMM control/status register */
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CpuState->SpecialRegisters.MxCsr = AR::CpuFunctions::ReadMxCsrRegister();
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/* Save GDT, IDT, LDT and TaskRegister */
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AR::CpuFunctions::StoreGlobalDescriptorTable(&CpuState->SpecialRegisters.Gdtr.Limit);
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AR::CpuFunctions::StoreInterruptDescriptorTable(&CpuState->SpecialRegisters.Idtr.Limit);
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AR::CpuFunctions::StoreLocalDescriptorTable(&CpuState->SpecialRegisters.Ldtr);
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AR::CpuFunctions::StoreTaskRegister(&CpuState->SpecialRegisters.Tr);
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}
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/**
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* Captures the executing processor's state.
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*
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* @param TrapFrame
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* Supplies a pointer to the hardware trap frame containing the processor's volatile state.
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*
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* @param ExceptionFrame
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* Supplies a pointer to the exception frame containing the processor's non-volatile state.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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KE::Processor::SaveProcessorState(IN PKTRAP_FRAME TrapFrame,
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IN PKEXCEPTION_FRAME ExceptionFrame)
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{
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PKPROCESSOR_CONTROL_BLOCK Prcb;
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|
|
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/* Retrieve current processor control block */
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Prcb = GetCurrentProcessorControlBlock();
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|
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/* Set context flags to save whole all context */
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Prcb->ProcessorState.ContextFrame.ContextFlags = CONTEXT_ALL;
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|
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/* Save processor context */
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SaveProcessorContext(TrapFrame, ExceptionFrame, &Prcb->ProcessorState.ContextFrame);
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|
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/* Save processor control registers */
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SaveProcessorControlState(&Prcb->ProcessorState);
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}
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