462 lines
15 KiB
C++
462 lines
15 KiB
C++
/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtldr/arch/i686/memory.cc
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* DESCRIPTION: XT Boot Loader i686 specific memory management
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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* Aiken Harris <harraiken91@gmail.com>
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*/
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#include <xtldr.hh>
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/**
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* Maps boot loader related code and builds page map.
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*
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* @param PageMap
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* Supplies a pointer to the page mapping structure.
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*
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* @return This routine returns a status code.
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*
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* @since XT 1.0
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*/
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XTCDECL
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EFI_STATUS
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Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
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IN ULONG_PTR SelfMapAddress)
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{
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PLIST_ENTRY ListEntry, ModulesList, ModulesListEntry;
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EFI_PHYSICAL_ADDRESS Address, DirectoryAddress;
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PXTBL_MODULE_INFO ModuleInfo;
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PXTBL_MEMORY_MAPPING Mapping;
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PVOID LoaderBase;
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ULONGLONG LoaderSize;
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EFI_STATUS Status;
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ULONG Index;
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/* Check the page map level to determine which paging structure to create */
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if(PageMap->PageMapLevel == 3)
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{
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/* Allocate a page for the 3-level page map structure (PAE enabled) */
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Status = AllocatePages(AllocateAnyPages, 1, &Address);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Memory allocation failed, cannot proceed with page map creation */
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return Status;
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}
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/* Assign the allocated page to the page map and zero it out */
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PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
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RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
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/* Allocate 4 pages for the Page Directories (PDs) */
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Status = AllocatePages(AllocateAnyPages, 4, &DirectoryAddress);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Memory allocation failed, cannot proceed with page map creation */
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return Status;
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}
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/* Zero-fill the allocated memory for the Page Directories */
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RTL::Memory::ZeroMemory((PVOID)DirectoryAddress, EFI_PAGE_SIZE * 4);
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/* Fill the PDPT with pointers to the Page Directories */
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for(Index = 0; Index < 4; Index++)
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{
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RTL::Memory::ZeroMemory(&((PHARDWARE_MODERN_PTE)PageMap->PtePointer)[Index], sizeof(HARDWARE_MODERN_PTE));
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((PHARDWARE_MODERN_PTE)PageMap->PtePointer)[Index].PageFrameNumber = DirectoryAddress / EFI_PAGE_SIZE;
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((PHARDWARE_MODERN_PTE)PageMap->PtePointer)[Index].Valid = 1;
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DirectoryAddress += EFI_PAGE_SIZE;
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}
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}
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else
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{
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/* Allocate a page for the 2-level page map structure (PAE disabled) */
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Status = AllocatePages(AllocateAnyPages, 1, &Address);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Memory allocation failed, cannot proceed with page map creation */
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return Status;
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}
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/* Assign the allocated page to the page map and zero it out */
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PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
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RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
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}
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/* Add page mapping itself to memory mapping */
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Status = SelfMapPml(PageMap, SelfMapAddress);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* PML mapping failed */
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return Status;
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}
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/* Map the trampoline code area */
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Status = MapVirtualMemory(PageMap, (PVOID)MM_TRAMPOLINE_ADDRESS,(PVOID)MM_TRAMPOLINE_ADDRESS,
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1, LoaderFirmwareTemporary);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Mapping trampoline code failed */
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return Status;
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}
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/* Get list of XTLDR modules */
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ModulesList = Protocol::GetModulesList();
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ModulesListEntry = ModulesList->Flink;
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while(ModulesListEntry != ModulesList)
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{
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/* Get module info */
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ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink);
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/* Map module code */
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Status = MapVirtualMemory(PageMap, ModuleInfo->ModuleBase, ModuleInfo->ModuleBase,
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EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary);
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/* Check if mapping succeeded */
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Mapping module code failed */
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return Status;
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}
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/* Get next module */
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ModulesListEntry = ModulesListEntry->Flink;
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}
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/* Get boot loader image information */
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XtLoader::GetLoaderImageInformation(&LoaderBase, &LoaderSize);
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/* Make sure boot loader image base and size are set */
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if(LoaderBase && LoaderSize)
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{
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/* Map boot loader code as well */
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Status = MapVirtualMemory(PageMap, LoaderBase, LoaderBase,
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EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Mapping boot loader code failed */
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return Status;
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}
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}
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else
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{
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/* Boot loader image information re not available */
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return STATUS_EFI_PROTOCOL_ERROR;
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}
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/* Iterate through and map all the mappings*/
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Debug::Print(L"Mapping and dumping EFI memory:\n");
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ListEntry = PageMap->MemoryMap.Flink;
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while(ListEntry != &PageMap->MemoryMap)
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{
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/* Take mapping from the list */
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Mapping = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
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/* Check if virtual address is set */
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if(Mapping->VirtualAddress)
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{
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/* Dump memory mapping */
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Debug::Print(L" Type=%02lu, PhysicalBase=%.8P, VirtualBase=%.8P, Pages=%llu\n", Mapping->MemoryType,
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Mapping->PhysicalAddress, Mapping->VirtualAddress, Mapping->NumberOfPages);
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/* Map memory */
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Status = MapPage(PageMap, (UINT_PTR)Mapping->VirtualAddress,
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(UINT_PTR)Mapping->PhysicalAddress, Mapping->NumberOfPages);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Memory mapping failed */
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return Status;
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}
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}
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/* Take next element */
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ListEntry = ListEntry->Flink;
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}
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/* Return success */
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return STATUS_EFI_SUCCESS;
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}
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/**
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* Returns next level of the Page Table.
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*
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* @param PageMap
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* Supplies a pointer to the page mapping structure.
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*
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* @param PageTable
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* Supplies a pointer to the current Page Table.
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*
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* @param Entry
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* Supplies an index of the current Page Table entry.
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*
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* @param NextPageTable
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* Supplies a pointer to the memory area where the next Page Table level is returned.
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*
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* @return This routine returns a status code.
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*
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* @since XT 1.0
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*/
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XTCDECL
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EFI_STATUS
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Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
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IN PVOID PageTable,
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IN SIZE_T Entry,
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OUT PVOID *NextPageTable)
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{
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EFI_PHYSICAL_ADDRESS Address;
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ULONGLONG PmlPointer = 0;
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EFI_STATUS Status;
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PHARDWARE_LEGACY_PTE LegacyPmlTable;
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PHARDWARE_MODERN_PTE PmlTable;
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BOOLEAN ValidPte = FALSE;
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/* Check page map level to determine PTE size */
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if(PageMap->PageMapLevel >= 3)
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{
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/* 64-bit PTE for PML3 (PAE enabled) */
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PmlTable = (PHARDWARE_MODERN_PTE)PageTable;
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if(PmlTable[Entry].Valid)
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{
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/* Get page frame number from page table entry */
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PmlPointer = PmlTable[Entry].PageFrameNumber;
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ValidPte = TRUE;
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}
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}
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else
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{
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/* 32-bit PTE for PML2 (PAE disabled) */
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LegacyPmlTable = (PHARDWARE_LEGACY_PTE)PageTable;
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if(LegacyPmlTable[Entry].Valid)
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{
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/* Get page frame number from page table entry */
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PmlPointer = LegacyPmlTable[Entry].PageFrameNumber;
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ValidPte = TRUE;
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}
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}
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/* Check if page table entry is valid */
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if(ValidPte)
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{
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/* Calculate the base address of the next page table */
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PmlPointer <<= EFI_PAGE_SHIFT;
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}
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else
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{
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/* Allocate pages for new PML entry */
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Status = AllocatePages(AllocateAnyPages, 1, &Address);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Memory allocation failure */
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return Status;
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}
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/* Add new memory mapping */
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Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)(UINT_PTR)Address, 1, LoaderMemoryData);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Memory mapping failure */
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return Status;
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}
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/* Fill allocated memory with zeros */
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RTL::Memory::ZeroMemory((PVOID)(ULONGLONG)Address, EFI_PAGE_SIZE);
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/* Set paging entry settings based on level */
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if(PageMap->PageMapLevel >= 3)
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{
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/* 64-bit PTE for PML3 (PAE enabled) */
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PmlTable = (PHARDWARE_MODERN_PTE)PageTable;
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PmlTable[Entry].PageFrameNumber = Address / EFI_PAGE_SIZE;
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PmlTable[Entry].Valid = 1;
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PmlTable[Entry].Writable = 1;
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}
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else
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{
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/* 32-bit PTE for PML2 (PAE disabled) */
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LegacyPmlTable = (PHARDWARE_LEGACY_PTE)PageTable;
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LegacyPmlTable[Entry].PageFrameNumber = (UINT32)(Address / EFI_PAGE_SIZE);
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LegacyPmlTable[Entry].Valid = 1;
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LegacyPmlTable[Entry].Writable = 1;
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}
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/* Return the address of the new page table */
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PmlPointer = (ULONGLONG)Address;
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}
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/* Set next Page Map Level (PML) */
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*NextPageTable = (PVOID)(ULONGLONG)PmlPointer;
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/* Return success */
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return STATUS_EFI_SUCCESS;
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}
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/**
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* Does the actual virtual memory mapping.
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*
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* @param PageMap
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* Supplies a pointer to the page mapping structure.
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*
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* @param VirtualAddress
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* Supplies a virtual address of the mapping.
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*
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* @param PhysicalAddress
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* Supplies a physical address of the mapping.
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*
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* @param NumberOfPages
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* Supplies a number of the pages of the mapping.
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*
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* @return This routine returns a status code.
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*
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* @since XT 1.0
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*/
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XTCDECL
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EFI_STATUS
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Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap,
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IN ULONG_PTR VirtualAddress,
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IN ULONG_PTR PhysicalAddress,
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IN ULONG NumberOfPages)
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{
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SIZE_T PageFrameNumber;
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PVOID Pml1, Pml2, Pml3;
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SIZE_T Pml1Entry, Pml2Entry, Pml3Entry;
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PHARDWARE_LEGACY_PTE LegacyPmlTable;
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PHARDWARE_MODERN_PTE PmlTable;
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EFI_STATUS Status;
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/* Set the Page Frame Number (PFN) */
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PageFrameNumber = PhysicalAddress >> EFI_PAGE_SHIFT;
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/* Map all requested pages */
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while(NumberOfPages > 0)
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{
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/* Check the paging mode to use the correct page table structure */
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if(PageMap->PageMapLevel == 3)
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{
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/* Calculate the indices for PAE page tables */
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Pml3Entry = (VirtualAddress >> 30) & 0x3;
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Pml2Entry = (VirtualAddress >> 21) & 0x1FF;
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Pml1Entry = (VirtualAddress >> 12) & 0x1FF;
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/* Get Page Directory Pointer Table (PML3) */
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Pml3 = PageMap->PtePointer;
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/* Get Page Directory (PML2) */
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Status = GetNextPageTable(PageMap, Pml3, Pml3Entry, &Pml2);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Failed to get the Page Table, abort mapping */
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return Status;
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}
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/* Get Page Table (PML1) */
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Status = GetNextPageTable(PageMap, Pml2, Pml2Entry, &Pml1);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Failed to get the Page Table, abort mapping */
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return Status;
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}
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/* Set the 64-bit PTE entry */
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PmlTable = (PHARDWARE_MODERN_PTE)Pml1;
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RTL::Memory::ZeroMemory(&PmlTable[Pml1Entry], sizeof(HARDWARE_MODERN_PTE));
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PmlTable[Pml1Entry].PageFrameNumber = PageFrameNumber;
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PmlTable[Pml1Entry].Valid = 1;
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PmlTable[Pml1Entry].Writable = 1;
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}
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else
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{
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/* Calculate the indices for non-PAE page tables */
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Pml2Entry = (VirtualAddress >> 22) & 0x3FF;
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Pml1Entry = (VirtualAddress >> 12) & 0x3FF;
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/* Get Page Directory (PML2) */
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Pml2 = PageMap->PtePointer;
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/* Get Page Table (PML1) */
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Status = GetNextPageTable(PageMap, Pml2, Pml2Entry, &Pml1);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Failed to get the Page Table, abort mapping */
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return Status;
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}
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/* Set the 32-bit PTE entry */
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LegacyPmlTable = (PHARDWARE_LEGACY_PTE)Pml1;
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RTL::Memory::ZeroMemory(&LegacyPmlTable[Pml1Entry], sizeof(HARDWARE_LEGACY_PTE));
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LegacyPmlTable[Pml1Entry].PageFrameNumber = (UINT32)PageFrameNumber;
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LegacyPmlTable[Pml1Entry].Valid = 1;
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LegacyPmlTable[Pml1Entry].Writable = 1;
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}
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/* Take next virtual address and PFN */
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VirtualAddress += EFI_PAGE_SIZE;
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PageFrameNumber++;
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/* Decrease number of pages left */
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NumberOfPages--;
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}
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/* Return success */
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return STATUS_EFI_SUCCESS;
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}
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/**
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* Creates a recursive self mapping for all PML levels.
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*
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* @param PageMap
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* Supplies a pointer to the page mapping structure.
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*
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* @param SelfMapAddress
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* Supplies a virtual address of the page tables.
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*
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* @return This routine returns a status code.
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*
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* @since XT 1.0
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*/
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XTCDECL
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EFI_STATUS
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Memory::SelfMapPml(IN PXTBL_PAGE_MAPPING PageMap,
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IN ULONG_PTR SelfMapAddress)
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{
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PHARDWARE_LEGACY_PTE LegacyPml;
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PHARDWARE_MODERN_PTE Pml;
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ULONGLONG PmlIndex;
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ULONG Index;
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/* Check page map level */
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if(PageMap->PageMapLevel == 3)
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{
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/* Calculate PML index based on provided self map address */
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PmlIndex = (SelfMapAddress >> MM_PDI_SHIFT) & 0x1FF;
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/* Get Page Directory */
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Pml = (PHARDWARE_MODERN_PTE)(((PHARDWARE_MODERN_PTE)PageMap->PtePointer)[SelfMapAddress >> MM_PPI_SHIFT].PageFrameNumber * EFI_PAGE_SIZE);
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/* Add self-mapping for PML3 (PAE enabled) */
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for(Index = 0; Index < 4; Index++)
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{
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RTL::Memory::ZeroMemory(&Pml[PmlIndex + Index], sizeof(HARDWARE_MODERN_PTE));
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Pml[PmlIndex + Index].PageFrameNumber = ((PHARDWARE_MODERN_PTE)PageMap->PtePointer)[Index].PageFrameNumber;
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Pml[PmlIndex + Index].Valid = 1;
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Pml[PmlIndex + Index].Writable = 1;
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}
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}
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else
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{
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LegacyPml = (PHARDWARE_LEGACY_PTE)PageMap->PtePointer;
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/* Calculate PML index based on provided self map address */
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PmlIndex = (SelfMapAddress >> MM_PDI_LEGACY_SHIFT);
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/* Add self-mapping for PML2 (PAE disabled) */
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RTL::Memory::ZeroMemory(&LegacyPml[PmlIndex], sizeof(HARDWARE_LEGACY_PTE));
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LegacyPml[PmlIndex].PageFrameNumber = (UINT_PTR)PageMap->PtePointer / EFI_PAGE_SIZE;
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LegacyPml[PmlIndex].Valid = 1;
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LegacyPml[PmlIndex].Writable = 1;
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}
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/* Return success */
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return STATUS_EFI_SUCCESS;
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}
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