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Implement MmpGetPdeAddress() and MmpGetPteAddress() routines for i686 architecture as well as MmpMemoryExtensionEnabled() for checking PAE/LA57 support

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This commit is contained in:
Rafal Kupiec 2024-05-22 22:47:28 +02:00
parent 4db5425238
commit 609538b9be
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
10 changed files with 154 additions and 3 deletions
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9
sdk/xtdk/amd64/mmtypes.h
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@ -18,18 +18,23 @@
#define MM_PAGE_SHIFT 12L
#define MM_PAGE_SIZE 4096
/* Page directory and page base addresses */
#define MM_PTE_BASE 0xFFFFF68000000000UI64
#define MM_PDE_BASE 0xFFFFF6FB40000000UI64
#define MM_PPE_BASE 0xFFFFF6FB7DA00000UI64
#define MM_PXE_BASE 0xFFFFF6FB7DBED000UI64
/* PTE shift values */
#define MM_PTE_SHIFT 3
#define MM_PTI_SHIFT 12
#define MM_PDI_SHIFT 21
#define MM_PPI_SHIFT 30
#define MM_PXI_SHIFT 39
#define MM_PTE_SHIFT 3
/* Number of PTEs per page */
#define MM_PTE_PER_PAGE 512
#define MM_PDE_PER_PAGE 512
#define MM_PPE_PER_PAGE 512
#define MM_PXE_PER_PAGE 512
/* Minimum number of physical pages needed by the system */

14
sdk/xtdk/i686/mmtypes.h
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@ -18,6 +18,20 @@
#define MM_PAGE_SHIFT 12
#define MM_PAGE_SIZE 4096
/* Page directory and page base addresses */
#define MM_PTE_BASE 0xC0000000
#define MM_PDE_BASE 0xC0300000
#define MM_PDE_PAE_BASE 0xC0600000
/* PTE shift values */
#define MM_PTE_SHIFT 2
#define MM_PTI_SHIFT 12
#define MM_PDI_SHIFT 22
#define MM_PPI_SHIFT 0
#define MM_PTE_PAE_SHIFT 3
#define MM_PDI_PAE_SHIFT 21
#define MM_PPI_PAE_SHIFT 30
/* Minimum number of physical pages needed by the system */
#define MM_MINIMUM_PHYSICAL_PAGES 1100

4
xtoskrnl/includes/amd64/mmi.h
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@ -38,4 +38,8 @@ XTAPI
VOID
MmpInitializeArchitecture(VOID);
XTAPI
BOOLEAN
MmpMemoryExtensionEnabled(VOID);
#endif /* __XTOSKRNL_AMD64_MMI_H */

3
xtoskrnl/includes/globals.h
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@ -75,6 +75,9 @@ EXTERN LOADER_MEMORY_MAPPING MmpHalAllocationDescriptors[MM_HAL_ALLOCATION_DESCR
/* Live address of kernel HAL heap */
EXTERN PVOID MmpHalHeapStart;
/* Architecture-specific memory extension */
EXTERN BOOLEAN MmpMemoryExtension;
/* Number of used HAL allocation descriptors */
EXTERN ULONG MmpUsedHalAllocationDescriptors;

14
xtoskrnl/includes/i686/mmi.h
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@ -12,14 +12,26 @@
#include <xtos.h>
/* I686 Memory Manager routines forward references */
/* i686 Memory Manager routines forward references */
XTFASTCALL
VOID
MmZeroPages(IN PVOID Address,
IN ULONG Size);
XTAPI
PMMPTE
MmpGetPdeAddress(PVOID Address);
XTAPI
PMMPTE
MmpGetPteAddress(PVOID Address);
XTAPI
VOID
MmpInitializeArchitecture(VOID);
XTAPI
BOOLEAN
MmpMemoryExtensionEnabled(VOID);
#endif /* __XTOSKRNL_I686_MMI_H */

4
xtoskrnl/includes/mmi.h
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@ -43,6 +43,10 @@ XTAPI
VOID
MmFreeProcessorStructures(IN PVOID StructuresData);
XTAPI
VOID
MmInitializeHardware(VOID);
XTAPI
VOID
MmInitializeMemoryManager(VOID);

15
xtoskrnl/mm/amd64/init.c
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@ -102,3 +102,18 @@ MmpInitializeArchitecture(VOID)
{
UNIMPLEMENTED;
}
/**
* Checks if LA57 (PML5) is enabled.
*
* @return This routine returns TRUE if LA57 is enabled, or FALSE otherwise.
*
* @since XT 1.0
*/
XTAPI
BOOLEAN
MmpMemoryExtensionEnabled(VOID)
{
/* Check if LA57 (PML5) is enabled */
return ((ArReadControlRegister(4) & CR4_LA57) != 0) ? TRUE : FALSE;
}

3
xtoskrnl/mm/globals.c
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@ -36,5 +36,8 @@ LOADER_MEMORY_MAPPING MmpHalAllocationDescriptors[MM_HAL_ALLOCATION_DESCRIPTORS]
/* Live address of kernel HAL heap */
PVOID MmpHalHeapStart = MM_HAL_HEAP_START_ADDRESS;
/* Architecture-specific memory extension */
BOOLEAN MmpMemoryExtension;
/* Number of used HAL allocation descriptors */
ULONG MmpUsedHalAllocationDescriptors = 0;

76
xtoskrnl/mm/i686/init.c
View File

@ -9,6 +9,67 @@
#include <xtos.h>
/**
* Gets the address of the PDE (Page Directory Entry), that maps given address.
*
* @param Address
* Specifies the address to find the PDE for.
*
* @return This routine returns the address of the PDE.
*
* @since XT 1.0
*/
XTAPI
PMMPTE
MmpGetPdeAddress(PVOID Address)
{
ULONG Offset, PdeBase, PdiShift, PteShift;
/* Get PDI and PTE shifts based on memory extension flag */
if(MmpMemoryExtension)
{
/* Get bit shifts for PAE system */
PdeBase = MM_PDE_PAE_BASE;
PdiShift = MM_PDI_PAE_SHIFT;
PteShift = MM_PTE_PAE_SHIFT;
}
else
{
/* Get bit shifts for non-PAE system */
PdeBase = MM_PDE_BASE;
PdiShift = MM_PDI_SHIFT;
PteShift = MM_PTE_SHIFT;
}
/* Calculate offset and return PTE address */
Offset = ((((ULONG)(Address)) >> PdiShift) << PteShift);
return (PMMPTE)(PdeBase + Offset);
}
/**
* Gets the address of the PTE (Page Table Entry), that maps given address.
*
* @param Address
* Specifies the address to find the PTE for.
*
* @return This routine returns the address of the PTE.
*
* @since XT 1.0
*/
XTAPI
PMMPTE
MmpGetPteAddress(PVOID Address)
{
ULONG Offset, PteShift;
/* Get PTE shift based on memory extension flag */
PteShift = MmpMemoryExtension ? MM_PTE_PAE_SHIFT : MM_PTE_SHIFT;
/* Calculate offset and return PTE address */
Offset = ((((ULONG)(Address)) >> MM_PTI_SHIFT) << PteShift);
return (PMMPTE)(MM_PTE_BASE + Offset);
}
/**
* Performs architecture specific initialization of the XTOS Memory Manager.
*
@ -22,3 +83,18 @@ MmpInitializeArchitecture(VOID)
{
UNIMPLEMENTED;
}
/**
* Checks if PAE (Physical Address Extension) is enabled.
*
* @return This routine returns TRUE if PAE is enabled, or FALSE otherwise.
*
* @since XT 1.0
*/
XTAPI
BOOLEAN
MmpMemoryExtensionEnabled(VOID)
{
/* Check if PAE is enabled */
return ((ArReadControlRegister(4) & CR4_PAE) != 0) ? TRUE : FALSE;
}

15
xtoskrnl/mm/init.c
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@ -9,6 +9,21 @@
#include <xtos.h>
/**
* Performs an early pre-initialization of hardware-related structures.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
MmInitializeHardware(VOID)
{
/* Check for architecture-specific memory extensions enabled by the firmware or boot loader */
MmpMemoryExtension = MmpMemoryExtensionEnabled();
}
/**
* Performs an early initialization of the XTOS Memory Manager.
*