123 Commits

Author	SHA1	Message	Date
Aiken Harris	6ee7243e04	Refactor APIC delivery mode handling and unify naming	2025-09-01 19:54:12 +02:00
Aiken Harris	d45cc5ffe5	Fix incorrect APIC delivery mode definitions	2025-09-01 19:32:29 +02:00
Aiken Harris	a84ef21571	Adjust LA57 base addresses to prevent overflow	2025-08-21 01:42:36 +02:00
Aiken Harris	9f6121e9b2	Map the physical page for trampoline code	2025-08-20 20:37:55 +02:00
Aiken Harris	4a7ea6009d	Expose ArEnableExtendedPhysicalAddressing function in XTDK	2025-08-20 20:23:44 +02:00
Aiken Harris	ebae8c655c	Expand CR4, MSR, and EFER register definitions	2025-08-19 23:59:58 +02:00
Aiken Harris	1a0bc7f65f	Update and correct CR4 bit definitions	2025-08-19 21:45:13 +02:00
Aiken Harris	c409400cbf	Correct VA masking in AMD64 page mapping functions	2025-08-18 01:07:28 +02:00
Aiken Harris	0ed59f223c	Relocate page mapping helpers and add PML5 support	2025-08-16 21:07:54 +02:00
Aiken Harris	1dcd3fceed	Define page map information structure for both supported architectures	2025-08-16 20:08:12 +02:00
Aiken Harris	3ca6d04f6b	Add definitions for 5-level paging and refactor constants	2025-08-16 00:22:21 +02:00
Aiken Harris	e57985da8d	Rename MM_LA57_SHIFT to MM_P5I_SHIFT for consistency	2025-08-15 20:49:25 +02:00
Aiken Harris	a431816243	Update CPUID requests	2025-08-10 16:52:59 +02:00
Aiken Harris	23f022965a	Add forward declarations for CPUID feature enums	2025-08-10 16:35:40 +02:00
Aiken Harris	aef81760d0	Rename enumeration lists	2025-08-10 16:33:36 +02:00
Aiken Harris	69d4e0cd84	Add enums for CPU feature flags used in CPUID detection	2025-08-10 16:27:14 +02:00
Rafal Kupiec	7b8f4f15cc	Add APIC Logical Destination Register (LDR) shifts and correct APIC delivery mode values	2024-07-23 20:14:06 +02:00
Rafal Kupiec	906e09fd9f	Refactor COM port support, to get rid of global variables in library	2024-06-12 18:02:29 +02:00
Rafal Kupiec	86bc2042e5	Cleanup XTDK headers	2024-06-06 23:09:03 +02:00
Rafal Kupiec	92e861ebae	Cleanup APIC related headers	2024-06-06 21:50:20 +02:00
Rafal Kupiec	4212453cf5	Fix APIC initialization code	2024-06-06 16:49:08 +02:00
Rafal Kupiec	ef65bceccd	Initialize legacy PIC and mask all interrupts	2024-06-05 16:08:54 +02:00
Rafal Kupiec	6176ca38a8	Cleanup hardware allocation memory pool related code	2024-06-02 17:29:31 +02:00
Rafal Kupiec	6b1ccc4ce5	Do not hardcode PML shift values	2024-05-27 22:26:05 +02:00
Rafal Kupiec	03ba3b5583	Add missing forward references for APIC related structures	2024-05-24 23:41:27 +02:00
Rafal Kupiec	94a40501d4	Mask APIC ICR0 and disable APIC interrupts for initialization time by raising APIC TPR	2024-05-24 23:39:06 +02:00
Rafal Kupiec	609538b9be	Implement MmpGetPdeAddress() and MmpGetPteAddress() routines for i686 architecture as well as MmpMemoryExtensionEnabled() for checking PAE/LA57 support	2024-05-22 22:47:28 +02:00
Rafal Kupiec	03727a61d3	Implement hardware layer pool memory management	2024-05-22 18:51:09 +02:00
Rafal Kupiec	500498508e	Rename PACK definition	2024-05-20 15:34:15 +02:00
Rafal Kupiec	efef3cb80d	Cleanup EFLAGS related definitions	2024-05-14 16:22:10 +02:00
Rafal Kupiec	38b0b2ac7d	Use correct stack when using preallocated processor structures	2024-05-08 15:57:24 +02:00
Rafal Kupiec	b65ff2a767	Implement MmAllocateProcessorStructures() routine as a temporary hack to get a buffer for AP initialization	2024-05-07 23:30:11 +02:00
Rafal Kupiec	276eb77862	Update KPROCESSOR_BLOCK structure	2024-05-07 16:20:40 +02:00
Rafal Kupiec	22693a48d3	Rework trap handling assembly code	2024-04-23 15:07:08 +02:00
Rafal Kupiec	a36c02fde8	Use common name for EFLAGS and RFLAGS, regardless the CPU architecture	2024-04-21 22:35:06 +02:00
Rafal Kupiec	92ee74b494	Rework trap handling to access registers	2024-04-19 16:52:37 +02:00
Rafal Kupiec	befa211aa7	Add PFN related structures and definitions	2024-04-08 19:03:58 +02:00
Rafal Kupiec	04e22c127e	Initial memory manager initialization code	2024-04-07 10:26:12 +02:00
Rafal Kupiec	d7b103f85d	Add forward references for PTE related structures	2024-04-03 16:03:17 +02:00
Rafal Kupiec	c6f3422c49	Update PTE related structures	2024-04-03 16:00:26 +02:00
Rafal Kupiec	4b2d8ded72	No parameters are expected, explicitly	2024-02-20 16:55:12 +01:00
Rafal Kupiec	badb16e37d	Add lock queue to processor control block	2024-02-05 19:21:19 +01:00
Rafal Kupiec	af687603d0	Add kernel stack guard pages definition	2024-02-04 19:21:42 +01:00
Rafal Kupiec	5acf8b4abd	Add page size enumeration list	2024-01-18 14:22:51 +01:00
Rafal Kupiec	e64cf4d0aa	Add CR4_LA57 definition	2024-01-14 21:06:02 +01:00
Rafal Kupiec	0d1fcde3a5	Add missing StallScaleFactor to KPROCESSOR_BLOCK	2023-11-28 23:08:35 +01:00
Rafal Kupiec	f6c621c2a6	Basic processor initialization code	2023-11-28 22:31:39 +01:00
Rafal Kupiec	e5adc31af7	Implement basic APIC support, including X2APIC	2023-11-27 22:38:15 +01:00
Rafal Kupiec	4ca4e298f0	Add more PIC/APIC related definitions	2023-11-26 23:35:14 +01:00
Rafal Kupiec	4701351bd7	Add missing SYNC_LEVEL definition	2023-11-25 22:14:45 +01:00