Register interrupt handlers once the APIC initialization is done

This commit is contained in:
Rafal Kupiec 2023-11-28 14:20:23 +01:00
parent c4ccf52782
commit d17b06a180
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
6 changed files with 90 additions and 3 deletions

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@ -31,6 +31,7 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ke/semphore.c
${XTOSKRNL_SOURCE_DIR}/ke/spinlock.c
${XTOSKRNL_SOURCE_DIR}/ke/timer.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/irqs.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.c

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@ -539,8 +539,8 @@ ArpSetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Access)
{
/* Setup the gate */
Idt[Vector].OffsetLow = (ULONG_PTR)Handler;
Idt[Vector].OffsetMiddle = ((ULONG_PTR)Handler >> 16);
Idt[Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF);
Idt[Vector].OffsetMiddle = (((ULONG_PTR)Handler >> 16) & 0xFFFF);
Idt[Vector].OffsetHigh = (ULONG_PTR)Handler >> 32;
Idt[Vector].Dpl = Access;
Idt[Vector].IstIndex = Ist;

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@ -176,7 +176,7 @@ HlpInitializeApic()
HlWriteApicRegister(APIC_LDR, (1UL << CpuNumber) << 24);
}
/* Set the spurious interrupt vector and register interrupt handlers */
/* Set the spurious interrupt vector */
SpuriousRegister.Long = HlReadApicRegister(APIC_SIVR);
SpuriousRegister.Vector = APIC_VECTOR_SPURIOUS;
SpuriousRegister.SoftwareEnable = 1;
@ -217,4 +217,8 @@ HlpInitializeApic()
/* Clear errors after enabling vectors */
HlWriteApicRegister(APIC_ESR, 0);
/* Register interrupt handlers once the APIC initialization is done */
KeSetInterruptHandler(APIC_VECTOR_SPURIOUS, HlpHandleApicSpuriousService);
KeSetInterruptHandler(PIC1_VECTOR_SPURIOUS, HlpHandlePicSpuriousService);
}

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@ -77,6 +77,11 @@ KeSetEvent(IN PKEVENT Event,
IN KPRIORITY Increment,
IN BOOLEAN Wait);
XTAPI
VOID
KeSetInterruptHandler(IN ULONG Vector,
IN PVOID Handler);
XTAPI
VOID
KeStartThread(IN PKTHREAD Thread);

39
xtoskrnl/ke/amd64/irqs.c Normal file
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@ -0,0 +1,39 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/amd64/irqs.c
* DESCRIPTION: Kernel interrupts support for amd64 architecture
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
/**
* Sets new interrupt handler for the existing IDT entry.
*
* @param HalVector
* Supplies the HAL vector number.
*
* @param Handler
* Supplies the new interrupt handler.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
KeSetInterruptHandler(IN ULONG Vector,
IN PVOID Handler)
{
PKPROCESSOR_BLOCK ProcessorBlock;
/* Get current processor block */
ProcessorBlock = KeGetCurrentProcessorBlock();
/* Update interrupt handler */
ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF);
ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetMiddle = (((ULONG_PTR)Handler >> 16) & 0xFFFF);
ProcessorBlock->IdtBase[(UCHAR) Vector].OffsetHigh = (ULONG_PTR)Handler >> 32;
}

38
xtoskrnl/ke/i686/irqs.c Normal file
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@ -0,0 +1,38 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ke/i686/irqs.c
* DESCRIPTION: Kernel interrupts support for i686 architecture
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include <xtos.h>
/**
* Sets new interrupt handler for the existing IDT entry.
*
* @param HalVector
* Supplies the HAL vector number.
*
* @param Handler
* Supplies the new interrupt handler.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
KeSetInterruptHandler(IN ULONG Vector,
IN PVOID Handler)
{
PKPROCESSOR_BLOCK ProcessorBlock;
/* Get current processor block */
ProcessorBlock = KeGetCurrentProcessorBlock();
/* Update interrupt handler */
ProcessorBlock->IdtBase[(UCHAR) Vector].Offset = (USHORT)((ULONG)Handler & 0xFFFF);
ProcessorBlock->IdtBase[(UCHAR) Vector].ExtendedOffset = (USHORT)((ULONG)Handler >> 16);
}