Commit Graph

1449 Commits

Author SHA1 Message Date
1fa6e90439 Hook up profile interrupt handler 2026-04-08 23:16:03 +02:00
f15790e25b Initialize unhandled interrupt routine in early boot phase 2026-04-08 20:49:05 +02:00
53c5946c04 Clean up APIC timer initialization 2026-04-08 20:23:37 +02:00
9ffb03217a Implement software interrupt dispatch table and secondary handler lookup 2026-04-08 20:13:35 +02:00
4f65773aa9 Unify trap handler naming and remove unused kernel mode stack setup 2026-04-08 19:52:55 +02:00
f1476912f3 Add definitions for PIT ports and APIC timer divisor configuration 2026-04-08 07:21:40 +02:00
adb591f8c7 Implement APIC timer initialization and calibration 2026-04-08 00:15:03 +02:00
4ef068dadc Add documentation for the ROM BIOS image 2026-04-07 23:10:14 +02:00
a0d5ee17c2 Replace trap dispatch wrappers with direct symbol mapping 2026-04-07 12:56:33 +02:00
9935d2d26b Update CPU identification code 2026-04-06 21:17:58 +02:00
9eff9874c5 Synchronize headers with merged assembly code 2026-04-02 15:16:21 +02:00
09516835d0 Consolidate boot and architecture support code into a single assembly file 2026-04-02 15:08:12 +02:00
2a24ce9a35 Refactor spurious interrupt handling to use assembly routine 2026-04-02 13:14:49 +02:00
9ea79c92a6 Refactor assembly includes and delete manual offset definitions 2026-04-02 10:50:00 +02:00
c30df8e5b5 Ensure correct argument parsing when passing source file to compiler 2026-04-02 10:07:06 +02:00
397d0a9f29 Fix invalid member access in i686 ADK generation 2026-04-02 09:18:45 +02:00
0fa23ccf40 Automate generation of assembly offsets from C structures via XTADK 2026-04-02 09:07:01 +02:00
87a91bfeb1 Make XTDK headers assembly-safe 2026-04-01 16:05:34 +02:00
232b92fd7e Implement spurious interrupt handler 2026-04-01 13:03:46 +02:00
d88f9f0a15 Remove erroneous swapgs and implement proper segment setting 2026-04-01 11:18:28 +02:00
154b2062ba Unify GDT selector naming convention 2026-04-01 11:02:05 +02:00
38d49eece4 Add definition for the kernel compatibility mode code selector 2026-04-01 10:48:24 +02:00
d00577ac8d Fix previous mode detection by reading CS from the trap frame 2026-03-31 23:10:45 +02:00
620fc24cd2 Fix previous mode detection by reading CS from the trap frame and sanitize segment restoration 2026-03-31 20:38:21 +02:00
494b615dc2 Fix x64 ABI compliance by aligning stack and reserving shadow space 2026-03-31 20:06:25 +02:00
d834b7e0c8 Correct kernel stack base calculation for downward growing stacks 2026-03-31 18:59:59 +02:00
987b8f45d7 Unify trap handler macro name 2026-03-31 15:53:11 +02:00
52ecbdeaff Add missing TrapVector constant 2026-03-31 13:02:53 +02:00
121f461491 Refactor trap handling to support task gates 2026-03-31 12:58:46 +02:00
f4b189adef Fix incorrect descriptor type used for NMI TSS 2026-03-30 22:20:09 +02:00
40c4860548 Refine LDT setup and restore critical TSS fields for hardware exceptions 2026-03-30 20:29:43 +02:00
d2a7ae46ac Fix hardware task gate configuration 2026-03-30 20:16:44 +02:00
8a02a5aca3 Explicitly load GS and SS registers during segment initialization 2026-03-30 18:43:52 +02:00
96df5a80b8 Set CR3 field in TSS to ensure correct page table context on task switches 2026-03-30 14:56:41 +02:00
489ef8a514 Update IDT gate types for i686 exception handlers 2026-03-30 13:31:20 +02:00
8c6c63465f Use dedicated NMI stack on i686 2026-03-30 11:43:09 +02:00
e9aaeab982 Replace hardcoded stack count with architecture specific constant 2026-03-28 20:53:50 +01:00
a608b26fde Implement NMI stack handling via IST 2026-03-28 20:49:18 +01:00
3ce009db41 Merge branch 'master' into memmgr 2026-03-28 13:59:34 +01:00
a0b0938099 Remove unused header 2026-03-27 22:07:20 +01:00
32d3672a51 Generate distinct handlers for CPU traps and hardware interrupts 2026-03-27 20:42:41 +01:00
0c17337388 Fix symbol naming convention for i686 trap handlers 2026-03-27 19:23:37 +01:00
9c449bed43 Initialize IDT with specific trap handlers for each vector 2026-03-27 19:16:16 +01:00
a64aa83eb8 Provide implementation for HL::Irq 2026-03-27 13:00:13 +01:00
64b5de98c8 Move IRQ handling from kernel executive to hardware layer 2026-03-27 12:00:09 +01:00
4e02664977 Merge branch 'master' into memmgr 2026-03-26 23:48:49 +01:00
bad3aaf6e0 Export memory manager pool allocation and free functions 2026-03-26 23:46:50 +01:00
9b19bc94b3 Replace manual IDT manipulation with SetIdtGate function call 2026-03-26 23:10:00 +01:00
9479f3d364 Implement APIC presence check and panic if unsupported 2026-03-25 22:52:58 +01:00
8d97ea4112 Merge branch 'master' into memmgr 2026-03-25 15:06:14 +01:00