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755a167f2c84c77b2b0f8aed163e49a54b7f83d2
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Author SHA1 Message Date
harraiken 755a167f2c Respect architecture-specific PTE layouts and write PTEs via PML-aware helpers 2025-12-22 00:07:48 +01:00
harraiken 24dccf4bed Make PPE mapping architecture-specific 2025-12-19 20:25:43 +01:00
harraiken 7b93c39348 Add early spin lock initialization 2025-12-19 19:12:50 +01:00
harraiken 570301bb35 Clarify page table entry offset semantics 2025-12-18 22:38:59 +01:00
harraiken b183d52806 Fix paging abstraction for PDE/PTE virtual address calculation 2025-12-18 22:26:31 +01:00
harraiken 687c58d923 Implement initial virtual memory layout setup 2025-12-17 22:28:08 +01:00
harraiken 049c9c6bbd Update SelfMapAddress 2025-12-17 20:35:28 +01:00
harraiken f1a76bc01a Call page table initialization 2025-12-16 22:34:41 +01:00
harraiken cb4d113e31 Add virtual address validation and system PTE helpers 2025-12-16 22:31:15 +01:00
harraiken 728241f998 Move memory layout initialization to architecture-specific code 2025-12-16 20:36:16 +01:00
harraiken 00d428d8de Architecture-specific system PTE limits 2025-12-16 20:05:51 +01:00
harraiken 020b7c7676 Extend memory layout 2025-12-16 18:37:28 +01:00
harraiken 2265a4a522 Remove unsupported PML4/PML5 PTE interfaces 2025-12-16 14:13:55 +01:00
harraiken dc23f91110 Split PTE implementation per architecture 2025-12-16 14:08:32 +01:00
harraiken 7f0ca6a948 Compute PTE count per page from entry size 2025-12-15 13:56:39 +01:00
harraiken 36c273ea13 Implement early page table mapping routines 2025-12-15 13:24:02 +01:00
harraiken 5cf3dfa844 Add bootstrap physical page allocator 2025-12-15 12:38:08 +01:00
harraiken 070c508e42 Introduce kernel virtual memory layout 2025-12-14 15:35:24 +01:00
harraiken 5224dc315f Compute PFN database size during MM initialization 2025-12-13 22:50:27 +01:00
harraiken b7bbf9ffa8 Tidy up memory type verification helpers 2025-12-13 21:04:55 +01:00
harraiken eae48320f3 Harden PFN initialization and expose page count 2025-12-13 21:01:13 +01:00
harraiken 17b5649362 Make memory type verification helpers accessible to PFN 2025-12-13 20:50:32 +01:00
harraiken 783a9eea3a Extract PFN management into separate module 2025-12-13 20:42:48 +01:00
harraiken 237f6a2974 Refactor memory manager initialization into MM::Manager 2025-12-13 20:21:08 +01:00
harraiken ee9514fd5c Fix GetP5eAddress return type 2025-12-13 19:58:49 +01:00
harraiken 63c27a149a Add missing virtual GetPteDistance to pagemap interface 2025-12-06 00:29:51 +01:00
harraiken 7694df7744 Add architecture-specific GetPteDistance 2025-12-06 00:19:24 +01:00
harraiken c710ec4688 Refactor XPA detection API 2025-12-04 23:07:59 +01:00
harraiken 8054bb915a Fix incorrect pointer types 2025-11-30 20:06:51 +01:00
harraiken 86aa22e5f8 Fix incorrect pointer types 2025-11-30 20:03:12 +01:00
harraiken 4a7494ad3f Split paging interface into arch-specific code 2025-11-30 19:19:32 +01:00
harraiken d4287198b0 Implement virtual address resolvers for all page map levels and add XPA status accessor 2025-11-30 18:23:51 +01:00
harraiken 4265ae92d0 Add MM::PageMap::GetXpaStatus() for querying PML level 2025-11-29 23:45:00 +01:00
harraiken 931586eebd Refactor PageMap to enable architecture-specific VA translation 2025-11-29 23:37:08 +01:00
harraiken c099882866 Add PFN_COUNT typedef 2025-11-29 23:14:30 +01:00
harraiken 0097cb88d7 Correct LA57 paging base addresses, add self-map constants and extend PTE structures 2025-11-29 23:11:54 +01:00
harraiken 20b0bfdfad Add kernel parameters section and fix minor formatting issues 2025-11-17 23:19:16 +01:00
harraiken 35523a230a Prevent duplicate object generation by linking xtoskrnl with libxtos 2025-11-17 23:15:22 +01:00
harraiken 7b11a8feb1 Add page list and PTE pool type enums 2025-11-06 06:55:31 +01:00
harraiken 0cf178a648 Fix class name 2025-11-04 23:10:02 +01:00
harraiken 66f27e4b9a Add GetPageFrameNumber() to PTE interfaces 2025-11-04 23:03:47 +01:00
harraiken 10b8ab347a Make MM::Paging::GetExtendedPhysicalAddressingStatus public 2025-11-04 22:51:34 +01:00
harraiken 071c840ca8 Replace writable flag with AttributesMask in PTE setup 2025-11-04 17:34:49 +01:00
harraiken dda8f88830 Add PTE attribute definitions 2025-11-04 17:26:47 +01:00
harraiken cb2da54956 Unify PTE pointer types across MM subsystem 2025-11-03 22:13:32 +01:00
harraiken fd13091476 Unify MMPML2_PTE field naming convention 2025-11-03 22:02:59 +01:00
harraiken c28c3f8344 Add input qualifiers to page map interface definitions 2025-11-03 20:04:21 +01:00
harraiken dfb0284427 Add input qualifiers to paging interface definitions 2025-11-03 16:00:46 +01:00
harraiken 1150b9ecdb Add PTE management routines 2025-10-30 22:03:25 +01:00
harraiken f6dac12057 Add missing EmptyPteList field to MMPAGEMAP_INFO 2025-10-30 20:19:35 +01:00
harraiken ffa480d69a Implement unified PTE accessors and management helpers 2025-10-30 20:14:02 +01:00
harraiken 0120ba167f Introduce RAII helpers for runlevel transitions 2025-10-29 23:07:27 +01:00
harraiken 4e9dc15501 Define VIRTUAL macro 2025-10-29 22:32:07 +01:00
harraiken 164ff0c135 Expand spinlock queue levels 2025-10-28 08:35:34 +01:00
harraiken f538d035e2 Introduce global spinlock initialization and RAII guard classes 2025-10-27 20:48:44 +01:00
harraiken 72b92f853e Use PTE base from PageMapInfo 2025-10-23 08:54:57 +02:00
harraiken 00b04f5405 Refactor IDT gate setup to use explicit DPL and type fields 2025-10-18 18:29:49 +02:00
harraiken 52afd31e77 Implement Stage2 loading in VBR code 2025-10-17 20:44:57 +02:00
harraiken 7f06abf236 New message for unsupported CPUs 2025-10-17 09:18:49 +02:00
harraiken 4f4df52d3d Include architecture-specific code in VBR 2025-10-17 09:12:54 +02:00
harraiken 764fec4d75 Implement low-level CPU initialization support for i686 and AMD64 boot sectors 2025-10-17 09:05:24 +02:00
harraiken ca8a539c0e Change message labels naming convention 2025-10-17 08:58:41 +02:00
harraiken c206b443ed Move XTLDR image base definition to arch-specific config 2025-10-16 12:22:30 +02:00
harraiken b19b27a621 Build relocatable image to allow proper UEFI loading 2025-10-16 12:10:00 +02:00
harraiken 56b81f5d73 Set fixed image base 2025-10-15 23:06:12 +02:00
harraiken 1e99a3f4a9 Set fixed alignment and base address to allow execution under BIOS 2025-10-15 21:03:03 +02:00
harraiken 0a71bc3995 Print fallback message in non-EFI environment 2025-10-15 20:55:16 +02:00
harraiken 13a9d4c522 Introduce legacy VGA text mode support 2025-10-15 20:49:17 +02:00
harraiken 9bf867af95 Propagate compile definitions to bootsector sources 2025-10-11 23:18:14 +02:00
harraiken fdbe157c18 Fix CHS sector-by-sector read loop 2025-10-10 19:05:23 +02:00
harraiken 56a1a811b9 Fix multi-sector read using CHS mode 2025-10-10 15:10:42 +02:00
harraiken 32bacdd228 Unify OVMF firmware and add WHPX targets 2025-10-10 11:00:11 +02:00
harraiken e52977fb63 Point contributors to gitea 2025-10-09 09:59:32 +02:00
harraiken 11f096d9f3 Remove IDEAS and KNOWN_ISSUES migrated to Gitea 2025-10-09 09:57:30 +02:00
harraiken 6e507be5e9 Add source directory include path for bootsector assembly 2025-10-09 09:25:50 +02:00
harraiken 6a8a561484 Implement disk read and error handling in VBR 2025-10-07 20:09:36 +02:00
harraiken c5f522be4c Move XTLDR under boot directory 2025-10-06 12:08:36 +02:00
harraiken ce8041754b Document sdk/firmware directory 2025-10-05 22:41:32 +02:00
harraiken c4af89946b Restructure bootdata under boot directory 2025-10-05 22:37:03 +02:00
harraiken 95fecfc095 Increase disk image size for FAT32 support 2025-10-05 22:01:12 +02:00
harraiken ec4e8c416c Switch disk image to FAT32 and install VBR 2025-10-05 18:48:42 +02:00
harraiken 64733914f2 Add VBR stub 2025-10-05 17:24:25 +02:00
harraiken 4e7baf302c Simplify and fix Print function 2025-10-02 12:24:05 +02:00
harraiken 2f9a6b5548 Fix stack pointer setup 2025-10-02 11:52:27 +02:00
harraiken 370a635ee2 Correctly handle CRLF line endings in config parser 2025-09-26 17:36:12 +02:00
harraiken 332e57f305 Add register dump to trap handler 2025-09-25 08:28:02 +02:00
harraiken 4ee3daa8f8 Prune outdated ideas 2025-09-24 20:30:18 +02:00
harraiken ee82475aa3 Remove unused header 2025-09-24 20:27:27 +02:00
harraiken 20fd950ef4 Update readme to reflect C++ namespaces and class-based naming 2025-09-23 22:54:41 +02:00
harraiken 6e10089280 Drop unnecessary boolean casts after type refactor 2025-09-23 19:17:33 +02:00
harraiken 9298aef87e Separate boolean definition for C and C++ 2025-09-23 19:06:18 +02:00
harraiken 6c66028800 Document XTLDR methods 2025-09-22 14:54:27 +02:00
harraiken ed293c7e61 Finish moving global variables into classes 2025-09-22 09:56:58 +02:00
harraiken 7791ca13e2 Partially move global variables into classes 2025-09-20 20:16:55 +02:00
harraiken d0aeaf1109 Unify XTLDR naming 2025-09-20 18:55:08 +02:00
harraiken c041457799 Refactor bootloader code into C++ classes 2025-09-20 18:47:36 +02:00
harraiken 08a9a0273f Move trampoline handling code 2025-09-19 19:32:04 +02:00
harraiken ae4b95380a Fix AP startup symbol name 2025-09-19 19:23:39 +02:00
harraiken 2b49b23d41 Add trampoline support and move assembler prototypes 2025-09-19 19:07:27 +02:00
harraiken 38f1af025c Add missing calling convention 2025-09-19 17:21:20 +02:00