perikiyoxd/exectos
1
0
Fork 0
forked from xt-sys/exectos
Code Pull Requests Activity
1,257 Commits 5 Branches 0 Tags
9f359c10edfb06fb5bb36f342116f488c9e46c21
Commit Graph
100 Commits
This Branch
This Branch
All Branches
Author SHA1 Message Date
harraiken 9f359c10ed Clean up paging code 2026-01-03 23:39:02 +01:00
harraiken 455349f2d7 Remove dead code from paging and PTE management 2026-01-03 23:27:24 +01:00
harraiken 5e5b4a8392 Initialize system PTEs with arch-specific list terminator 2026-01-03 21:11:29 +01:00
harraiken 329143b4f6 Abstract PTE list terminator into paging layer 2026-01-03 21:03:14 +01:00
harraiken cc76ea40ee Add support for transitioning PTE to invalid state 2026-01-03 00:41:56 +01:00
harraiken 0159262ee0 Add explicit default initialization for MM::Colors::ModifiedPages list 2026-01-01 20:59:31 +01:00
harraiken f653b9f79c Properly handle bad physical pages 2026-01-01 20:51:30 +01:00
harraiken 7bcd78fdf3 Implement generic PFN list linking function 2026-01-01 20:40:45 +01:00
harraiken c080f74714 Introduce helper functions for querying the software prototype and transition bits of PTE 2026-01-01 19:40:23 +01:00
harraiken 5ff0cad094 Introduce per-page-color modified page lists 2026-01-01 16:54:26 +01:00
harraiken 00702bfb23 Remove redundant check for invisible memory regions 2025-12-30 13:10:32 +01:00
harraiken dbda6bbb29 Initialize PTE template dynamically to resolve build warnings 2025-12-29 23:49:29 +01:00
harraiken aced62e790 Prevent initialization of invisible memory ranges 2025-12-29 19:27:30 +01:00
harraiken 53116b86a3 Improve formatting 2025-12-29 19:19:45 +01:00
harraiken d8fc223140 Adjust thread initialization to match new stack allocator signature 2025-12-29 19:16:13 +01:00
harraiken f4c49e2f25 Simplify stack page count calculation 2025-12-29 19:14:49 +01:00
harraiken 4c7c914a1c Implement kernel stack allocation logic 2025-12-29 19:10:25 +01:00
harraiken 4a00179af2 Implement logic to link physical pages to PTEs 2025-12-29 18:31:16 +01:00
harraiken 0d2d41dcda Introduce page fault handling infrastructure 2025-12-29 14:53:43 +01:00
harraiken c1514557f6 Merge branch 'master' into memmgr 2025-12-29 14:35:10 +01:00
harraiken 49e97fb8b4 Reserve space for color tables to fix invalid memory access 2025-12-29 13:17:41 +01:00
harraiken 28f49dd545 Ensure page map structures are self-mapped 2025-12-29 10:56:43 +01:00
harraiken 7cb3d1764b Initialize paged pool sizing logic 2025-12-29 10:28:12 +01:00
harraiken 200e9132b1 Minor style fixes in MM includes 2025-12-28 23:51:34 +01:00
harraiken d891088b1a Update PTE support to use safe write accessors 2025-12-28 23:39:08 +01:00
harraiken 04599161da Refactor memory clearing calls and cleanup code style 2025-12-28 23:36:20 +01:00
harraiken 0880a0f344 Implement PFN database initialization and memory descriptor processing 2025-12-28 23:25:07 +01:00
harraiken 4593a89a9b Expose PFN database lookup via GetPfnEntry 2025-12-28 21:18:17 +01:00
harraiken b7c004528a Implement tracking of available physical pages 2025-12-23 22:13:09 +01:00
harraiken 5012c8dc37 Initialize system PTE pools and implement reservation routines 2025-12-23 20:16:08 +01:00
harraiken 1e3917882c Initialize system page tables and configure kernel mappings 2025-12-23 18:03:02 +01:00
harraiken b3b874d3ce Include mm/colors.cc in kernel build configuration 2025-12-23 14:29:26 +01:00
harraiken 288b2f8b24 Introduce page coloring support to memory manager 2025-12-23 14:27:12 +01:00
harraiken c7cc536685 Add storage for PFN database size 2025-12-23 14:13:33 +01:00
harraiken b8e81e2223 Initialize memory manager during kernel startup 2025-12-23 14:05:07 +01:00
harraiken 0fd2b8b729 Update modified page list enum terminology 2025-12-23 13:55:42 +01:00
harraiken 560cd43b34 Update memory manager type definitions and constants 2025-12-23 12:04:43 +01:00
harraiken f0a06db7d2 Bring up i686 page table initialization 2025-12-22 23:48:04 +01:00
harraiken 7575526f07 Fix physical page count overflow by using 64-bit type 2025-12-22 23:32:54 +01:00
harraiken 643fd0d1e8 Fix PTE free list sentinel handling 2025-12-22 15:00:14 +01:00
harraiken 6aa148784b Select correct self-map base for PAE and non-PAE paging 2025-12-22 10:14:11 +01:00
harraiken e237a944cc Extend PTE helpers with raw read and write support 2025-12-22 08:21:43 +01:00
harraiken 755a167f2c Respect architecture-specific PTE layouts and write PTEs via PML-aware helpers 2025-12-22 00:07:48 +01:00
harraiken 24dccf4bed Make PPE mapping architecture-specific 2025-12-19 20:25:43 +01:00
harraiken 7b93c39348 Add early spin lock initialization 2025-12-19 19:12:50 +01:00
harraiken 570301bb35 Clarify page table entry offset semantics 2025-12-18 22:38:59 +01:00
harraiken b183d52806 Fix paging abstraction for PDE/PTE virtual address calculation 2025-12-18 22:26:31 +01:00
harraiken 687c58d923 Implement initial virtual memory layout setup 2025-12-17 22:28:08 +01:00
harraiken 049c9c6bbd Update SelfMapAddress 2025-12-17 20:35:28 +01:00
harraiken f1a76bc01a Call page table initialization 2025-12-16 22:34:41 +01:00
harraiken cb4d113e31 Add virtual address validation and system PTE helpers 2025-12-16 22:31:15 +01:00
harraiken 728241f998 Move memory layout initialization to architecture-specific code 2025-12-16 20:36:16 +01:00
harraiken 00d428d8de Architecture-specific system PTE limits 2025-12-16 20:05:51 +01:00
harraiken 020b7c7676 Extend memory layout 2025-12-16 18:37:28 +01:00
harraiken 2265a4a522 Remove unsupported PML4/PML5 PTE interfaces 2025-12-16 14:13:55 +01:00
harraiken dc23f91110 Split PTE implementation per architecture 2025-12-16 14:08:32 +01:00
harraiken 7f0ca6a948 Compute PTE count per page from entry size 2025-12-15 13:56:39 +01:00
harraiken 36c273ea13 Implement early page table mapping routines 2025-12-15 13:24:02 +01:00
harraiken 5cf3dfa844 Add bootstrap physical page allocator 2025-12-15 12:38:08 +01:00
harraiken 070c508e42 Introduce kernel virtual memory layout 2025-12-14 15:35:24 +01:00
harraiken 5224dc315f Compute PFN database size during MM initialization 2025-12-13 22:50:27 +01:00
harraiken b7bbf9ffa8 Tidy up memory type verification helpers 2025-12-13 21:04:55 +01:00
harraiken eae48320f3 Harden PFN initialization and expose page count 2025-12-13 21:01:13 +01:00
harraiken 17b5649362 Make memory type verification helpers accessible to PFN 2025-12-13 20:50:32 +01:00
harraiken 783a9eea3a Extract PFN management into separate module 2025-12-13 20:42:48 +01:00
harraiken 237f6a2974 Refactor memory manager initialization into MM::Manager 2025-12-13 20:21:08 +01:00
harraiken ee9514fd5c Fix GetP5eAddress return type 2025-12-13 19:58:49 +01:00
harraiken 63c27a149a Add missing virtual GetPteDistance to pagemap interface 2025-12-06 00:29:51 +01:00
harraiken 7694df7744 Add architecture-specific GetPteDistance 2025-12-06 00:19:24 +01:00
harraiken c710ec4688 Refactor XPA detection API 2025-12-04 23:07:59 +01:00
harraiken 8054bb915a Fix incorrect pointer types 2025-11-30 20:06:51 +01:00
harraiken 86aa22e5f8 Fix incorrect pointer types 2025-11-30 20:03:12 +01:00
harraiken 4a7494ad3f Split paging interface into arch-specific code 2025-11-30 19:19:32 +01:00
harraiken d4287198b0 Implement virtual address resolvers for all page map levels and add XPA status accessor 2025-11-30 18:23:51 +01:00
harraiken 4265ae92d0 Add MM::PageMap::GetXpaStatus() for querying PML level 2025-11-29 23:45:00 +01:00
harraiken 931586eebd Refactor PageMap to enable architecture-specific VA translation 2025-11-29 23:37:08 +01:00
harraiken c099882866 Add PFN_COUNT typedef 2025-11-29 23:14:30 +01:00
harraiken 0097cb88d7 Correct LA57 paging base addresses, add self-map constants and extend PTE structures 2025-11-29 23:11:54 +01:00
harraiken 20b0bfdfad Add kernel parameters section and fix minor formatting issues 2025-11-17 23:19:16 +01:00
harraiken 35523a230a Prevent duplicate object generation by linking xtoskrnl with libxtos 2025-11-17 23:15:22 +01:00
harraiken 7b11a8feb1 Add page list and PTE pool type enums 2025-11-06 06:55:31 +01:00
harraiken 0cf178a648 Fix class name 2025-11-04 23:10:02 +01:00
harraiken 66f27e4b9a Add GetPageFrameNumber() to PTE interfaces 2025-11-04 23:03:47 +01:00
harraiken 10b8ab347a Make MM::Paging::GetExtendedPhysicalAddressingStatus public 2025-11-04 22:51:34 +01:00
harraiken 071c840ca8 Replace writable flag with AttributesMask in PTE setup 2025-11-04 17:34:49 +01:00
harraiken dda8f88830 Add PTE attribute definitions 2025-11-04 17:26:47 +01:00
harraiken cb2da54956 Unify PTE pointer types across MM subsystem 2025-11-03 22:13:32 +01:00
harraiken fd13091476 Unify MMPML2_PTE field naming convention 2025-11-03 22:02:59 +01:00
harraiken c28c3f8344 Add input qualifiers to page map interface definitions 2025-11-03 20:04:21 +01:00
harraiken dfb0284427 Add input qualifiers to paging interface definitions 2025-11-03 16:00:46 +01:00
harraiken 1150b9ecdb Add PTE management routines 2025-10-30 22:03:25 +01:00
harraiken f6dac12057 Add missing EmptyPteList field to MMPAGEMAP_INFO 2025-10-30 20:19:35 +01:00
harraiken ffa480d69a Implement unified PTE accessors and management helpers 2025-10-30 20:14:02 +01:00
harraiken 0120ba167f Introduce RAII helpers for runlevel transitions 2025-10-29 23:07:27 +01:00
harraiken 4e9dc15501 Define VIRTUAL macro 2025-10-29 22:32:07 +01:00
harraiken 164ff0c135 Expand spinlock queue levels 2025-10-28 08:35:34 +01:00
harraiken f538d035e2 Introduce global spinlock initialization and RAII guard classes 2025-10-27 20:48:44 +01:00
harraiken 72b92f853e Use PTE base from PageMapInfo 2025-10-23 08:54:57 +02:00
harraiken 00b04f5405 Refactor IDT gate setup to use explicit DPL and type fields 2025-10-18 18:29:49 +02:00
harraiken 52afd31e77 Implement Stage2 loading in VBR code 2025-10-17 20:44:57 +02:00