464 Commits

Author	SHA1	Message	Date
belliash	18a39f95bc	Add floating save area structure definitions	2023-02-15 20:07:17 +01:00
belliash	28b760b089	Add stubs for allocating and freeing kernel stacks	2023-02-14 22:35:16 +01:00
belliash	2e790bd9b2	Add pages related macros and definitions	2023-02-13 23:01:20 +01:00
belliash	050f24f877	Implement routines for atomically work with linked lists	2023-02-13 22:36:03 +01:00
belliash	9e5fb84412	More routines for performing atomic bitwise AND/OR/XOR operations	2023-02-12 23:11:23 +01:00
belliash	5a86d61b78	Implement routines for performing atomic operations	2023-02-12 22:46:58 +01:00
belliash	6411fc3ae9	Simplify single linked list header	2023-02-11 12:41:00 +01:00
belliash	4cae0447c1	Add single linked list definitions	2023-02-11 00:27:36 +01:00
belliash	e94cb2d3a7	Processor identification structures	2023-02-10 17:14:12 +01:00
belliash	e645cf664c	Set process and thread information in processor control block	2023-02-09 17:30:24 +01:00
belliash	e3a900088c	Initial process and thread related structures	2023-02-08 23:56:29 +01:00
belliash	9132c47cd9	Initial process and thread related structures	2023-02-08 23:40:58 +01:00
belliash	d8c68ed003	Add endian conversion routines	2023-02-08 16:33:57 +01:00
belliash	a32e18b237	Implement ArReadFSDualWord() routine	2023-02-07 23:19:22 +01:00
belliash	75c519a70c	Use more generic name for this macro use pointer used behind it will point to kernel debugger after it gets initialized	2023-02-07 19:37:44 +01:00
belliash	f8d2ccc0d0	Add more debugging macros	2023-02-06 16:10:32 +01:00
belliash	707c92e08a	Boot loader no longer needs to do anything related to the stack	2023-02-05 10:03:21 +01:00
belliash	c6cadbd655	Initialize MXCSR register	2023-02-05 00:30:12 +01:00
belliash	5eaf7d63a3	Initialize Page Attribute Table	2023-02-05 00:14:34 +01:00
belliash	55cdae7c83	Initialize AMD64 processor registers	2023-02-04 23:40:03 +01:00
belliash	f37722b6e6	Distinguish ProcessorBlock and ProcessorControlBlock	2023-02-03 19:28:03 +01:00
belliash	269214ed34	Another improvements to GDT	2023-02-03 18:00:37 +01:00
belliash	19f34d4b17	Cleanup the code	2023-02-02 19:42:57 +01:00
belliash	715f875c4f	Set alignment and packing properly	2023-02-02 17:01:18 +01:00
belliash	2e2b01742a	Definitions for setting structures alignment and packing	2023-02-02 15:47:21 +01:00
belliash	73fc7607cd	There is no need to specify alignment of the structure in the forward reference	2023-02-02 15:37:57 +01:00
belliash	dc1a94b982	This is 'Processor Block'	2023-02-01 22:02:07 +01:00
belliash	21fbe6febe	Add IDT related definitions	2023-02-01 20:14:10 +01:00
belliash	5bbda188c6	IDT access levels and gate types	2023-02-01 00:51:13 +01:00
belliash	9a1e9b1084	Define TSS offsets	2023-01-30 23:43:10 +01:00
belliash	a761d3125a	Architecture specific initialization prior to processor structures initialization	2023-01-30 20:34:05 +01:00
belliash	6f068513cd	Initial processor block initialization	2023-01-30 19:07:05 +01:00
belliash	ebe6792f2b	Add MSR (Model Specific Registers) values	2023-01-30 17:59:00 +01:00
belliash	ce4e590347	Add missing forward declaration of ArInitializeProcessor() routine	2023-01-29 00:57:06 +01:00
belliash	900e71459a	Add missing x86 descriptor sizes	2023-01-29 00:54:36 +01:00
belliash	7bf4a9ab8d	Initialize boot CPU structures inside kernel on AMD64	2023-01-29 00:45:17 +01:00
belliash	27e2fdf4f2	Introduce architecture library as new kernel subsystem and move selected routines into new subsystem	2023-01-28 10:34:55 +01:00
belliash	e94e50b5d9	Implement HlLoadInterruptDescriptorTable() intrinsics for loading IDT	2023-01-26 20:08:57 +01:00
belliash	3ad3149f80	Add descriptor structure definition	2023-01-25 17:42:35 +01:00
belliash	bfc9db8b6d	Unify KGDTENTRY and KIDTENTRY between architectures as much as possible	2023-01-25 17:35:03 +01:00
belliash	3ee759cc27	i686 Interrupt request levels definitions	2023-01-25 17:18:27 +01:00
belliash	7bd67d6210	Add GDT and Segments related definitions for i686	2023-01-25 17:13:24 +01:00
belliash	a366de618f	AMD64 Interrupt request levels definitions	2023-01-25 17:08:42 +01:00
belliash	8f348c3954	Add GDT and Segments related definitions for AMD64	2023-01-25 17:05:15 +01:00
belliash	707dc37868	Fix type of Source parameter in HlLoadSegment() routine	2023-01-24 23:08:48 +01:00
belliash	35aa514f95	Implement HlLoadSegment() intrinsics routine	2023-01-24 19:27:18 +01:00
belliash	d3d8d144a0	Implement HlLoadGlobalDescriptorTable() intrinsic	2023-01-23 20:13:51 +01:00
belliash	c81b858757	Implement HlReadGSQuadWord() intrinsic	2023-01-23 19:59:54 +01:00
belliash	f20ab3e52e	Implement HlLoadTaskRegister() for loading TSS segment selector into task register	2023-01-23 15:26:35 +01:00
belliash	9cbe2d458c	Initial support for EFI framebuffer	2023-01-23 15:26:35 +01:00