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Author SHA1 Message Date
harraiken d6f925ebfd Update APC initialization comment 2026-06-26 10:31:20 +02:00
harraiken 53a8b57a96 Register APC interrupt handler 2026-06-26 10:22:18 +02:00
harraiken 77c1138f7d Add CheckApcDelivery to evaluate APC interrupt request or direct delivery 2026-06-26 09:54:38 +02:00
harraiken 03f97d94ae Add executive resource synchronization functions 2026-06-25 23:33:09 +02:00
harraiken 8c6e06c973 Introduce RAII wrapper for in-stack queued spinlock acquisition 2026-06-25 21:32:16 +02:00
harraiken f2168e8c55 Update queued spinlock guard naming 2026-06-25 18:54:44 +02:00
harraiken 6184e9e73d Implement in-stack queued spinlock 2026-06-25 16:22:37 +02:00
harraiken 3d42ecf3d3 Fix incorrect namespace description 2026-06-25 14:52:00 +02:00
harraiken c309bd769d Export Unicode string support functions 2026-06-24 09:48:39 +02:00
harraiken 79c9b2abef Add STATUS_NAME_TOO_LONG definition 2026-06-24 09:43:24 +02:00
harraiken d9a4217f8b Add missing MAXUSHORT definition 2026-06-24 09:41:13 +02:00
harraiken 7b27b09748 Add basic unicode string support 2026-06-24 09:37:42 +02:00
harraiken 195c4a34ad Refactor singly linked list into arch-specific modules 2026-06-23 21:39:04 +02:00
harraiken e266b30e24 Refactor SINGLE_LIST_HEADER into a union 2026-06-23 19:52:46 +02:00
harraiken 28daa1718c Move SINGLE_LIST_HEADER definition to architecture-specific headers 2026-06-23 19:29:11 +02:00
harraiken b016ffd0d7 Add lookaside list pointers to processor control block 2026-06-23 19:13:00 +02:00
harraiken 8479c95e82 Implement kernel lookaside lists 2026-06-23 19:05:04 +02:00
harraiken f66e27cf83 Fix header dependency issues 2026-06-23 16:38:38 +02:00
harraiken cf846d5abe Move base structural definitions to dedicated headers 2026-06-23 16:30:19 +02:00
harraiken 08f26c6762 Implement arch-specific atomic singly-linked list functions 2026-06-23 16:19:35 +02:00
harraiken 19a1b11236 Delete broken RTL atomic functions 2026-06-23 14:21:50 +02:00
harraiken d10b2cc2a1 Add atomic 128-bit compare-exchange function 2026-06-23 10:40:13 +02:00
harraiken 5475d970c4 Add DOUBLE_ULONG_PTR structure definition 2026-06-22 14:12:49 +02:00
harraiken 18d36b9f23 Replace inline pool tags with definitions 2026-06-22 12:50:35 +02:00
harraiken fe02bb9214 Define pool allocation tags 2026-06-22 12:44:41 +02:00
harraiken 76b1807eee Reduce code duplication in rundown protection 2026-06-22 11:27:31 +02:00
harraiken e431bccd44 Extend rundown protection with counted acquire and release functions 2026-06-22 11:22:09 +02:00
harraiken 7526f90759 Implement pool quota accounting and stub raise functionality 2026-06-21 01:45:37 +02:00
harraiken c45b81d345 Add atomic addition functions 2026-06-21 01:36:02 +02:00
harraiken 95ec18a1de Add helper to get currently executing process 2026-06-18 20:34:28 +02:00
harraiken 9faf19b57e Enforce volatile semantics on inline assembly 2026-06-18 11:33:54 +02:00
harraiken bae43034a6 Implement thread preemption and context switching in dispatch interrupt handler 2026-06-18 11:18:36 +02:00
harraiken 156ae3efab Refactor thread ready state transitions into Scheduler class 2026-06-17 20:56:05 +02:00
harraiken 854a8c8eef Document the backlinking 2026-06-17 20:40:23 +02:00
harraiken 1fca2400a4 Add functions to transition threads to deferred ready or transition states 2026-06-17 16:30:28 +02:00
harraiken ea1ad3c6b1 Implement deferred ready thread insertion 2026-06-17 16:13:02 +02:00
harraiken cea860b008 Implement LIFO queue 2026-06-17 15:42:08 +02:00
harraiken 6560ca9b96 Refactor thread initialization to attach to process 2026-06-17 12:15:32 +02:00
harraiken ffcb2dbeda Correct initial StackCount value to reflect underlying type width 2026-06-17 11:12:11 +02:00
harraiken 780bf92b40 Annotate POWER_PERFORMANCE_SCALE definition 2026-06-16 12:59:18 +02:00
harraiken cc288f5417 Remove hardcoded throttle value 2026-06-16 12:53:07 +02:00
harraiken 55eb3047e3 Implement i686 RunThread with inline assembly 2026-06-16 12:25:26 +02:00
harraiken 8597e37650 Implement AMD64 RunThread with inline assembly 2026-06-16 12:00:56 +02:00
harraiken 1c90218042 Move RunThread to architecture-specific implementations 2026-06-16 11:43:42 +02:00
harraiken f6f37494cd Fix stack alignment and shadow space for EntryPoint call 2026-06-16 11:39:31 +02:00
harraiken d1aa3cf481 Trigger INT3 on unexpected system thread termination 2026-06-16 10:49:16 +02:00
harraiken 208684c3b4 Update i686 thread context initialization to match AMD64 2026-06-15 09:15:48 +02:00
harraiken 89681897d7 Wire thread startup frame to return to user-mode switch or system thread exit handler 2026-06-14 01:34:24 +02:00
harraiken e035666f7a Fix i686 thread context setup 2026-06-14 00:53:34 +02:00
harraiken df35bf8601 Add thread startup stub 2026-06-14 00:50:23 +02:00
harraiken 15523e7d71 Fix AMD64 thread context setup 2026-06-14 00:44:02 +02:00
harraiken f79c9023d8 Initialize thread service table 2026-06-12 23:19:05 +02:00
harraiken 97703c7932 Add stub for System Service Descriptor Table accessor routine 2026-06-12 23:16:20 +02:00
harraiken 2f5902119d Update thread initialization code 2026-06-12 20:52:23 +02:00
harraiken 7a10135731 Replace jmp with call to maintain ABI stack alignment 2026-06-12 15:58:42 +02:00
harraiken b0074637f8 Remove hardcoded shift in SIPI vector calculation 2026-06-12 14:21:27 +02:00
harraiken 1a062ca05f Trigger low memory allocation before PFN database initialization 2026-06-12 13:21:22 +02:00
harraiken c702152cca Refactor real-mode memory allocation and identity mapping for AP trampoline 2026-06-12 13:16:48 +02:00
harraiken 81c799e590 Fix TrampolineCodeSize variable type 2026-06-12 12:59:16 +02:00
harraiken cf0d7f0a40 Update trampoline size output parameter to PULONG across bootloader and kernel 2026-06-12 12:54:53 +02:00
harraiken b0d2868f82 Update PTE mapping to allocate from PFN database 2026-06-12 08:54:51 +02:00
harraiken 32f0b747a1 Convert dispatcher context switch functions to naked assembly 2026-06-10 16:48:54 +02:00
harraiken c57aa98923 Free affinity maps on allocation failure and remove redundant idle process affinity loop 2026-06-10 14:08:07 +02:00
harraiken 429e4ef6f1 Add bounds checking to affinity map bit operations and introduce InitializeAffinityMap 2026-06-10 12:51:05 +02:00
harraiken 39928f2ef4 Add documentation for InitializeProcessorAffinity 2026-06-10 12:11:03 +02:00
harraiken 51ec7e3bab Fix build by initializing thread dispatcher header 2026-06-10 11:56:49 +02:00
harraiken f3ae70573c Initialize dispatcher header 2026-06-10 11:46:26 +02:00
harraiken 830f84ab26 Pass initial affinity map to InitializeProcess 2026-06-10 11:27:25 +02:00
harraiken 5a9df7ca86 Add helper to set full system processor affinity mask 2026-06-10 11:13:28 +02:00
harraiken 4bcdcda3a0 Change ActiveProcessors to a pointer for dynamic allocation 2026-06-10 10:31:24 +02:00
harraiken 7a27912dac Dynamically allocate active processors affinity map 2026-06-10 10:22:15 +02:00
harraiken cf4b91ac83 Simplify active processor bit setting 2026-06-09 23:27:24 +02:00
harraiken 36c3d92399 Refactor idle thread initialization 2026-06-09 23:24:40 +02:00
harraiken 6a2a35c008 Refactor idle process initialization 2026-06-09 23:17:03 +02:00
harraiken a9202f5b57 Refactor CalculateAffinityMapSize and add CreateAffinityMap 2026-06-09 22:53:37 +02:00
harraiken 4cbefe3a22 Implement affinity map bit manipulation and memory sizing helpers 2026-06-09 20:17:47 +02:00
harraiken 3841ceaf5b Refactor processor affinity logic 2026-06-09 19:33:20 +02:00
harraiken e2eb784eef Enter idle loop instead of halting system 2026-06-09 09:39:17 +02:00
harraiken 6078a5ba29 Implement idle thread loop 2026-06-09 08:36:39 +02:00
harraiken 663f5cd048 Drop obsolete IPI exception dispatch path 2026-06-08 20:55:17 +02:00
harraiken 5999906bf0 Switch CPU exception IDT entries to interrupt gates to mask interrupts on entry 2026-06-08 20:46:51 +02:00
harraiken 1e0c1490fb Remove redundant IDT gate initialization for vector 0xE1 2026-06-08 20:41:02 +02:00
harraiken 5b0eebdb43 Initialize system interrupt handlers 2026-06-08 20:15:18 +02:00
harraiken 9e64939de4 Add XTCLINK linkage to KeStartXtSystem 2026-06-08 20:06:23 +02:00
harraiken b911670121 Freeze secondary processors during kernel panic 2026-06-08 15:02:55 +02:00
harraiken d175a817a5 Add IPI service routines for APC, DPC, and freeze request handling 2026-06-08 14:49:02 +02:00
harraiken b285bc7312 Implement multi-processor freeze and thaw execution for SMP crash state synchronization 2026-06-08 14:38:17 +02:00
harraiken c8cd198c4e Fix Task Register restoration by clearing busy bit in TSS descriptor 2026-06-08 13:40:20 +02:00
harraiken 95d45f5a0a Do not restore Task Register during AMD64 processor control state restoration 2026-06-08 13:05:24 +02:00
harraiken 766e4d9603 Register BSP in processor block array during initialization 2026-06-08 11:21:53 +02:00
harraiken a601fd0afa Mark BSP processor as started 2026-06-08 10:22:41 +02:00
harraiken cc23e459e0 Move SwitchProcessor to architecture-specific implementations 2026-06-07 22:53:00 +02:00
harraiken d36b678ba1 Add kd/debug.cc to xtoskrnl source list 2026-06-07 22:41:31 +02:00
harraiken 43265bcddb Bypass debug I/O locks during kernel panic or debugger session 2026-06-07 22:37:59 +02:00
harraiken 47d4069d6f Add functions to save and restore processor context and control state 2026-06-07 20:33:02 +02:00
harraiken 904df63198 Remove duplicate context flag definitions 2026-06-07 19:40:29 +02:00
harraiken 1df971a71e Extend CONTEXT and PRCB structures with context flags and IPI state fields 2026-06-07 18:47:48 +02:00
harraiken 2a413d5717 Update processor state save calls 2026-06-07 13:11:04 +02:00
harraiken 9c2357dfe6 Expose installed CPU count and rename state save function 2026-06-07 13:05:31 +02:00
harraiken f82562f450 Rename SwitchCpu to SwitchProcessor 2026-06-07 12:33:56 +02:00