325 Commits

Author SHA1 Message Date
cd4e905054 Add support for I/O APIC controllers and interrupt override handling 2026-04-18 00:04:12 +02:00
715419abe7 Introduce ACPI table structures for HPET and IOAPIC 2026-04-17 23:58:24 +02:00
d37f2e3827 Implement GetKernelParameterValue to parse and extract boot option values 2026-04-13 19:18:04 +02:00
cec5e8b16b Implement detection of timer capabilities 2026-04-12 23:58:48 +02:00
a08e07e515 Refactor ACPI table caching to use a static array 2026-04-12 18:16:33 +02:00
d7f390b236 Harden ACPI initialization and fix MADT traversal for malformed tables 2026-04-12 17:42:15 +02:00
55cb12c978 Ensure APIC idle state before sending self-IPI 2026-04-09 23:51:13 +02:00
7d8bfa8f0a Implement support for APIC Self-InterProcessor Interrupts (SIPI) 2026-04-09 20:25:55 +02:00
d00e96baa4 Invoke APIC timer initialization 2026-04-09 16:17:08 +02:00
17f044cb3f Apply consistent coding style 2026-04-09 11:42:41 +02:00
1fa6e90439 Hook up profile interrupt handler 2026-04-08 23:16:03 +02:00
f15790e25b Initialize unhandled interrupt routine in early boot phase 2026-04-08 20:49:05 +02:00
53c5946c04 Clean up APIC timer initialization 2026-04-08 20:23:37 +02:00
9ffb03217a Implement software interrupt dispatch table and secondary handler lookup 2026-04-08 20:13:35 +02:00
4f65773aa9 Unify trap handler naming and remove unused kernel mode stack setup 2026-04-08 19:52:55 +02:00
f1476912f3 Add definitions for PIT ports and APIC timer divisor configuration 2026-04-08 07:21:40 +02:00
adb591f8c7 Implement APIC timer initialization and calibration 2026-04-08 00:15:03 +02:00
4ef068dadc Add documentation for the ROM BIOS image 2026-04-07 23:10:14 +02:00
a0d5ee17c2 Replace trap dispatch wrappers with direct symbol mapping 2026-04-07 12:56:33 +02:00
9935d2d26b Update CPU identification code 2026-04-06 21:17:58 +02:00
9eff9874c5 Synchronize headers with merged assembly code 2026-04-02 15:16:21 +02:00
09516835d0 Consolidate boot and architecture support code into a single assembly file 2026-04-02 15:08:12 +02:00
2a24ce9a35 Refactor spurious interrupt handling to use assembly routine 2026-04-02 13:14:49 +02:00
9ea79c92a6 Refactor assembly includes and delete manual offset definitions 2026-04-02 10:50:00 +02:00
c30df8e5b5 Ensure correct argument parsing when passing source file to compiler 2026-04-02 10:07:06 +02:00
397d0a9f29 Fix invalid member access in i686 ADK generation 2026-04-02 09:18:45 +02:00
0fa23ccf40 Automate generation of assembly offsets from C structures via XTADK 2026-04-02 09:07:01 +02:00
87a91bfeb1 Make XTDK headers assembly-safe 2026-04-01 16:05:34 +02:00
232b92fd7e Implement spurious interrupt handler 2026-04-01 13:03:46 +02:00
d88f9f0a15 Remove erroneous swapgs and implement proper segment setting 2026-04-01 11:18:28 +02:00
154b2062ba Unify GDT selector naming convention 2026-04-01 11:02:05 +02:00
38d49eece4 Add definition for the kernel compatibility mode code selector 2026-04-01 10:48:24 +02:00
d00577ac8d Fix previous mode detection by reading CS from the trap frame 2026-03-31 23:10:45 +02:00
620fc24cd2 Fix previous mode detection by reading CS from the trap frame and sanitize segment restoration 2026-03-31 20:38:21 +02:00
494b615dc2 Fix x64 ABI compliance by aligning stack and reserving shadow space 2026-03-31 20:06:25 +02:00
d834b7e0c8 Correct kernel stack base calculation for downward growing stacks 2026-03-31 18:59:59 +02:00
987b8f45d7 Unify trap handler macro name 2026-03-31 15:53:11 +02:00
52ecbdeaff Add missing TrapVector constant 2026-03-31 13:02:53 +02:00
121f461491 Refactor trap handling to support task gates 2026-03-31 12:58:46 +02:00
f4b189adef Fix incorrect descriptor type used for NMI TSS 2026-03-30 22:20:09 +02:00
40c4860548 Refine LDT setup and restore critical TSS fields for hardware exceptions 2026-03-30 20:29:43 +02:00
d2a7ae46ac Fix hardware task gate configuration 2026-03-30 20:16:44 +02:00
8a02a5aca3 Explicitly load GS and SS registers during segment initialization 2026-03-30 18:43:52 +02:00
96df5a80b8 Set CR3 field in TSS to ensure correct page table context on task switches 2026-03-30 14:56:41 +02:00
489ef8a514 Update IDT gate types for i686 exception handlers 2026-03-30 13:31:20 +02:00
8c6c63465f Use dedicated NMI stack on i686 2026-03-30 11:43:09 +02:00
e9aaeab982 Replace hardcoded stack count with architecture specific constant 2026-03-28 20:53:50 +01:00
a608b26fde Implement NMI stack handling via IST 2026-03-28 20:49:18 +01:00
3ce009db41 Merge branch 'master' into memmgr 2026-03-28 13:59:34 +01:00
a0b0938099 Remove unused header 2026-03-27 22:07:20 +01:00
32d3672a51 Generate distinct handlers for CPU traps and hardware interrupts 2026-03-27 20:42:41 +01:00
0c17337388 Fix symbol naming convention for i686 trap handlers 2026-03-27 19:23:37 +01:00
9c449bed43 Initialize IDT with specific trap handlers for each vector 2026-03-27 19:16:16 +01:00
a64aa83eb8 Provide implementation for HL::Irq 2026-03-27 13:00:13 +01:00
64b5de98c8 Move IRQ handling from kernel executive to hardware layer 2026-03-27 12:00:09 +01:00
4e02664977 Merge branch 'master' into memmgr 2026-03-26 23:48:49 +01:00
bad3aaf6e0 Export memory manager pool allocation and free functions 2026-03-26 23:46:50 +01:00
9b19bc94b3 Replace manual IDT manipulation with SetIdtGate function call 2026-03-26 23:10:00 +01:00
9479f3d364 Implement APIC presence check and panic if unsupported 2026-03-25 22:52:58 +01:00
8d97ea4112 Merge branch 'master' into memmgr 2026-03-25 15:06:14 +01:00
40d54743e0 Enhance kernel panic output 2026-03-25 15:02:26 +01:00
576a2b7f1b Enhance kernel panic output 2026-03-25 14:59:40 +01:00
3c2ad358ef Implement MM::KernelPool::FreeProcessorStructures 2026-03-25 14:11:24 +01:00
e734ddda65 Implement TLB flushing for cache attribute changes during page removal 2026-03-25 13:24:44 +01:00
a79f26250a Fix check for PTE removal flag 2026-03-25 09:53:57 +01:00
441e4f510b Mark PFN as deleted instead of clearing PteAddress when freeing pages 2026-03-25 09:51:09 +01:00
33665839ad Revert 1e01c52c0c 2026-03-25 08:59:46 +01:00
1e01c52c0c Clear the internal list links to prevent corruption 2026-03-25 07:48:13 +01:00
970902f3f9 Rephrase comments for consistency 2026-03-24 23:07:06 +01:00
adff181f5a Add bounds checking and implement reclamation for large expansion pool allocations 2026-03-24 23:00:28 +01:00
92986e1386 Set PTE frame for non-paged pool allocations 2026-03-24 20:03:23 +01:00
9a34a5f735 Precommit page map to allocate memory 2026-03-24 16:54:17 +01:00
398db4bde1 Fix memory map size tracking and memory leak 2026-03-24 16:12:33 +01:00
719564ba74 Fix memory corruption caused by UEFI memory map size changes during allocation 2026-03-24 16:04:53 +01:00
b95613787a Strip MM_POOL_PROTECTED flag to maintain NT compatibility and ensure correct pool tracking hash lookups 2026-03-24 08:39:47 +01:00
4292d89185 Add expansion table and overflow handling for pool tag tracking 2026-03-24 08:13:05 +01:00
214051e873 Update pool tracking statistics when resizing big allocations table 2026-03-23 20:36:24 +01:00
3c52b88802 Unify naming convention for pool tracking structures 2026-03-23 20:12:18 +01:00
944d5b5c0a Implement pool allocations and frees tracking 2026-03-23 18:54:18 +01:00
597628a644 Refactor big allocation tracker to use Tag 2026-03-23 12:38:31 +01:00
b97babb2bf Remove temporary hack and allocate processor structures from non-paged pool 2026-03-22 23:40:15 +01:00
caacd9e275 Separate synchronization guards from spinlock implementation 2026-03-21 22:46:56 +01:00
916d124c9b Separate synchronization guards from spinlock implementation 2026-03-21 22:44:00 +01:00
d85e313c15 Implement core pool allocation and deallocation logic 2026-03-21 20:35:02 +01:00
b83eaaa820 Add definitions for pool management structures 2026-03-21 19:10:58 +01:00
233440c8be Merge branch 'master' into memmgr 2026-03-21 18:30:45 +01:00
140af4278e Fix uninitialized member in SpinLockGuard 2026-03-21 18:29:19 +01:00
c67372d747 Revert e2eff2b836 2026-03-19 20:13:07 +01:00
e2eff2b836 Fix DebugPrint definition 2026-03-19 20:07:30 +01:00
930c9d3193 Replace NULL with NULLPTR 2026-03-19 20:03:26 +01:00
f862871a1f Implement RAII guard for memory pool synchronization 2026-03-19 19:59:40 +01:00
afb20a1796 Decouple pool initialization and validation from allocation logic 2026-03-18 20:31:06 +01:00
876923e107 Track valid physical memory pages using a PFN bitmap 2026-03-17 00:05:33 +01:00
3d7fe25471 Update panic invocations with detailed error context 2026-03-16 16:00:21 +01:00
184ce5735e Add runlevel verification to memory pool allocations 2026-03-16 15:33:36 +01:00
76d99dc9db Introduce pool allocation and free routines 2026-03-16 13:54:42 +01:00
d401ac4540 Remove redundant comments from panic calls 2026-03-16 09:55:26 +01:00
22f9525e92 Fix critical memory corruption bug caused by overwriting active page tables marked as free memory 2026-03-15 22:34:58 +01:00
80092a299e Ensure correct PTE value assignment via accessors 2026-03-15 20:31:33 +01:00
42525e5993 Unify PTE type definitions across architectures 2026-03-15 20:23:44 +01:00
0fed593147 Ensure SS and RSP are saved in trap frame 2026-03-15 17:32:01 +01:00
6cdb66cbb3 Ensure SS and ESP are saved in trap frame 2026-03-15 00:33:09 +01:00
d263f17831 Refactor panic calls in memory manager 2026-03-13 19:44:29 +01:00
6175413db2 Merge branch 'master' into memmgr 2026-03-13 19:43:01 +01:00
428928c7e1 Simplify panic interface by using C++ overloading 2026-03-13 19:42:03 +01:00
7d2b41a044 Calculate virtual address per page when initializing PFN entries 2026-03-13 19:35:29 +01:00
5fe0740c2e Initialize system PTE pool for non-paged expansion pool 2026-03-10 23:09:40 +01:00
35eac9d34c Make MM::Pte::InitializeSystemPtePool public 2026-03-10 23:01:50 +01:00
5a78512561 Correct PTE mapping logic during multiple page allocation 2026-03-05 17:47:03 +01:00
b7a92ccce4 Implement memory deallocation and coalescing for non-paged pool 2026-03-05 10:08:54 +01:00
8d2dfa6f62 Set up owner pointers for all pages during pool initialization 2026-03-04 22:44:45 +01:00
5a9b7c0258 Implement canonical address validation routine 2026-03-04 14:15:33 +01:00
5368fe2e8d Remove redundant static initialization of LowestPhysicalPage 2026-03-03 22:42:55 +01:00
3e1f57f67c Improve type safety of physical page boundaries initialization 2026-03-03 08:51:22 +01:00
44f27fad28 Correct physical memory range detection 2026-03-03 08:22:31 +01:00
ae8ac1eacb Fix uninitialized PTE pages causing memory corruption 2026-03-03 06:44:40 +01:00
a72bfd3902 Add MIN and MAX helper macros 2026-02-26 20:12:28 +01:00
7bdd0dfe2c Implement basic non-paged pool allocator 2026-02-26 20:10:03 +01:00
5778a761b5 Initialize paged pool after PFN database setup 2026-02-26 16:42:18 +01:00
d7d125dd50 Initialize paged pool alongside non-paged pool 2026-02-26 13:54:10 +01:00
511dd15c0c Implement page allocation interface 2026-02-26 13:42:58 +01:00
278def3081 Correct comment phrasing 2026-02-26 10:57:19 +01:00
0658e98436 Expose the number of available physical pages 2026-02-25 20:25:50 +01:00
bfdb7bc476 Refactor PFN linking logic 2026-02-25 19:27:53 +01:00
44fa2ca13a Merge branch 'master' into memmgr 2026-02-25 13:08:48 +01:00
7a44901064 Add definition for guarded PTE flag and remove hardcoded value 2026-02-25 12:14:26 +01:00
7144242613 Maintain sequence counter 2026-02-24 17:40:45 +01:00
7e62919c6b Rework singly linked list API 2026-02-24 14:49:56 +01:00
a136f21f4b Merge branch 'master' into memmgr 2026-02-23 09:31:53 +01:00
2bbc21b667 Implement singly linked list support 2026-02-22 12:25:51 +01:00
70d758ec5b Improve comments 2026-02-22 12:21:43 +01:00
d1553ff84a Add SHA-1 hashing support 2026-02-19 18:49:29 +01:00
94a8917c5c Revert RTL::LinkedList::RemoveEntryList() routine signature and extend RTL::LinkedList API 2026-02-16 15:43:00 +01:00
f7b7b61ea4 Add interface to retrieve page map level (PML) 2026-02-11 20:23:24 +01:00
2af94a1c3b Use RTL::LinkedList::ListEmpty() routine to check if list is empty after removal 2026-02-11 19:15:57 +01:00
4b5188260f Fix build 2026-02-11 17:43:07 +01:00
47ec89a85e Forgotten to change signature in bootloader 2026-02-10 18:26:50 +01:00
edb40dd62b Change RTL::LinkedList::RemoveEntryList() routine signature 2026-02-10 18:24:26 +01:00
e2da6220f2 Fix PFN calculation truncation for memory above 4GB to prevent memory descriptor aliasing on PAE systems 2026-02-09 23:17:58 +01:00
53f7945771 Reorder initialization sequence and flush TLB 2026-02-07 20:37:23 +01:00
9a5ef6fc00 Map PDE and PTE ranges for i686 non-paged pool 2026-02-07 20:01:17 +01:00
fa64507350 Refactor EFI memory mapping to support distinct mapping strategies 2026-02-07 00:42:03 +01:00
80ea0b49d0 Fix boot image size alignment calculation 2026-02-07 00:30:41 +01:00
2e0e085acb Minor style fixes 2026-02-06 20:52:59 +01:00
0ce2741e18 Deduplicate PFN descriptor processing logic across architectures 2026-02-06 09:08:59 +01:00
a46f30045a Fix stale comment 2026-02-06 08:51:23 +01:00
0763a9522b Ensure paging hierarchy exists before processing memory descriptors 2026-02-06 08:40:24 +01:00
b51f21f55c Introduce page directory initialization helper 2026-02-06 00:20:01 +01:00
0590ad3bcd Remove explicit identity mapping for internal page tables 2026-02-04 19:21:23 +01:00
9b8417565b Fix coding style 2026-02-04 19:19:06 +01:00
bc391d6e1e Map and zero entire PFN database upfront 2026-02-03 22:32:10 +01:00
7b6e284d39 Refactor PFN database initialization loop on i686 2026-02-03 22:28:17 +01:00
fae72f5326 Fix missing assignment of PointerPte 2026-02-03 20:17:28 +01:00
eb0957dbd4 Refactor PFN initialization to ensure proper page table setup 2026-02-02 19:06:14 +01:00
3d7f512377 Use 64-bit format specifiers for memory mapping logs 2026-02-01 16:02:27 +01:00
7f0341bb83 Fix physical address limit checks 2026-02-01 11:11:59 +01:00
ba4ac6cec8 Fix PFN truncation on i686 with PAE enabled 2026-02-01 10:18:13 +01:00
b16dbb19f8 Centralize memory layout dumping 2026-01-30 18:47:46 +01:00
19f5307be6 Handle non-paged pool overflow 2026-01-30 18:38:54 +01:00
825de8b471 Remove redundant PFN database alignment 2026-01-30 17:46:20 +01:00
6a7bc64ac7 Overhaul kernel memory layout initialization and pool sizing 2026-01-30 14:47:13 +01:00
726fd84241 Enable non-paged pool setup 2026-01-29 22:34:44 +01:00
54e75c9345 Fix PFN database size calculation call sites 2026-01-29 22:29:02 +01:00
5e3fb7a5a3 Move PFN database size tracking to memory layout 2026-01-29 22:26:31 +01:00
58669d3074 Refactor memory layout structure 2026-01-29 22:10:26 +01:00
72f34c8286 Add private helper declaration 2026-01-29 20:10:48 +01:00
a7820ff568 Calculate aligned boot image size from loader parameters 2026-01-29 20:08:27 +01:00
7f6114f8e5 Add skeleton for memory pool allocator 2026-01-29 20:00:09 +01:00
fd29cf55ef Fix incorrect header guard comment 2026-01-29 19:49:54 +01:00
446ce920ec Limit system PTE space mapping to calculated pool size 2026-01-27 16:56:40 +01:00
a4b9f495e5 Calculate total boot image size and pass it to kernel 2026-01-27 16:50:11 +01:00
2c8eb6d692 Remove unused kernel base address definition 2026-01-23 20:59:10 +01:00
31b0e4f441 Ensure contiguous virtual memory mapping 2026-01-23 20:55:56 +01:00
b5f220a2ae Correctly advance virtual address after mapping non-free regions 2026-01-23 20:52:45 +01:00
0b1b76e9df Rollback bootloader memory management changes 2026-01-20 16:04:07 +01:00
d3edfef53b Fix broken PPE check on i686 2026-01-19 11:16:59 +01:00
46c24e653e Add routine to retrieve installed memory size 2026-01-15 19:09:10 +01:00
c3607ea943 Add missing annotations 2026-01-14 22:48:25 +01:00
7da6bcc75e Standardize ValidPte setup across architectures 2026-01-14 22:42:14 +01:00
0f38d39705 Correctly initialize PFN entries for pre-mapped KSEG0 based memory 2026-01-14 17:44:50 +01:00
587b85d0a4 Annotate input parameters 2026-01-13 15:39:16 +01:00
0766eb4566 Drop obsolete KSEG0_KERNEL_BASE definition 2026-01-12 23:05:01 +01:00
11f7c25713 Abstract base mapping address retrieval 2026-01-12 23:03:13 +01:00
15edd98242 Extract MapDescriptor logic and simplify memory mapping API 2026-01-12 22:46:04 +01:00
34c33a3b53 Clean up unused physical-to-virtual conversion routines 2026-01-12 19:40:27 +01:00
032cab7f2f Update function documentation and remove debug prints 2026-01-12 19:26:07 +01:00
5500192575 Remove manual virtual address tracking from boot sequence 2026-01-11 23:14:10 +01:00
ec94e2341c Relocate kernel and modules to KSEG0 memory space 2026-01-11 13:15:28 +01:00
9ed851ed1f Temporary fix for PAE addressing limits and KSEG0 base mapping 2026-01-09 20:54:13 +01:00
b91c79e090 Prevent adding referenced pages to the free list 2026-01-06 15:01:05 +01:00
bee91d0c71 Correctly setup PFN database for ROM and in-use pages 2026-01-06 14:49:30 +01:00
36e53bfc8c Ensure every page in a bad memory region is marked as bad 2026-01-06 14:05:09 +01:00
9027632c4f Make memory descriptor processing architecture-dependent 2026-01-05 23:39:42 +01:00
bd1a3605d2 Add logic to insert pages at the head of standby list 2026-01-05 23:12:58 +01:00
4b50278ac9 Add temporary fallback for BeginStandbyList insertion 2026-01-05 19:41:46 +01:00
154ca7be35 Allow PFN insertion at the beginning of standby list 2026-01-05 19:36:12 +01:00
3a087766cc Optimize system PTE deallocation by avoiding immediate and expensive TLB flush 2026-01-05 16:59:35 +01:00
410286d012 Replace ULONG with PFN_COUNT in system PTE variables 2026-01-05 16:48:26 +01:00
e66baa0da0 Fix deadlock by reducing lock scope 2026-01-05 01:28:09 +01:00
46576398a2 Add missing semicolon 2026-01-05 01:22:41 +01:00
cb6efc648f Implement kernel stack deallocation and physical page freeing logic 2026-01-05 01:20:21 +01:00
0a43a93f41 Add mechanism to free system PTEs and merge adjacent clusters 2026-01-04 21:11:33 +01:00
9f359c10ed Clean up paging code 2026-01-03 23:39:02 +01:00
455349f2d7 Remove dead code from paging and PTE management 2026-01-03 23:27:24 +01:00
5e5b4a8392 Initialize system PTEs with arch-specific list terminator 2026-01-03 21:11:29 +01:00
329143b4f6 Abstract PTE list terminator into paging layer 2026-01-03 21:03:14 +01:00
cc76ea40ee Add support for transitioning PTE to invalid state 2026-01-03 00:41:56 +01:00
0159262ee0 Add explicit default initialization for MM::Colors::ModifiedPages list 2026-01-01 20:59:31 +01:00
f653b9f79c Properly handle bad physical pages 2026-01-01 20:51:30 +01:00
7bcd78fdf3 Implement generic PFN list linking function 2026-01-01 20:40:45 +01:00
c080f74714 Introduce helper functions for querying the software prototype and transition bits of PTE 2026-01-01 19:40:23 +01:00
5ff0cad094 Introduce per-page-color modified page lists 2026-01-01 16:54:26 +01:00
00702bfb23 Remove redundant check for invisible memory regions 2025-12-30 13:10:32 +01:00
dbda6bbb29 Initialize PTE template dynamically to resolve build warnings 2025-12-29 23:49:29 +01:00
aced62e790 Prevent initialization of invisible memory ranges 2025-12-29 19:27:30 +01:00
53116b86a3 Improve formatting 2025-12-29 19:19:45 +01:00
d8fc223140 Adjust thread initialization to match new stack allocator signature 2025-12-29 19:16:13 +01:00
f4c49e2f25 Simplify stack page count calculation 2025-12-29 19:14:49 +01:00
4c7c914a1c Implement kernel stack allocation logic 2025-12-29 19:10:25 +01:00
4a00179af2 Implement logic to link physical pages to PTEs 2025-12-29 18:31:16 +01:00
0d2d41dcda Introduce page fault handling infrastructure 2025-12-29 14:53:43 +01:00
c1514557f6 Merge branch 'master' into memmgr 2025-12-29 14:35:10 +01:00
49e97fb8b4 Reserve space for color tables to fix invalid memory access 2025-12-29 13:17:41 +01:00
28f49dd545 Ensure page map structures are self-mapped 2025-12-29 10:56:43 +01:00
7cb3d1764b Initialize paged pool sizing logic 2025-12-29 10:28:12 +01:00
200e9132b1 Minor style fixes in MM includes 2025-12-28 23:51:34 +01:00
d891088b1a Update PTE support to use safe write accessors 2025-12-28 23:39:08 +01:00
04599161da Refactor memory clearing calls and cleanup code style 2025-12-28 23:36:20 +01:00
0880a0f344 Implement PFN database initialization and memory descriptor processing 2025-12-28 23:25:07 +01:00
4593a89a9b Expose PFN database lookup via GetPfnEntry 2025-12-28 21:18:17 +01:00
874d303f83 Update requirements 2025-12-26 10:39:55 +01:00
b7c004528a Implement tracking of available physical pages 2025-12-23 22:13:09 +01:00
5012c8dc37 Initialize system PTE pools and implement reservation routines 2025-12-23 20:16:08 +01:00
1e3917882c Initialize system page tables and configure kernel mappings 2025-12-23 18:03:02 +01:00
b3b874d3ce Include mm/colors.cc in kernel build configuration 2025-12-23 14:29:26 +01:00
288b2f8b24 Introduce page coloring support to memory manager 2025-12-23 14:27:12 +01:00
c7cc536685 Add storage for PFN database size 2025-12-23 14:13:33 +01:00
b8e81e2223 Initialize memory manager during kernel startup 2025-12-23 14:05:07 +01:00
0fd2b8b729 Update modified page list enum terminology 2025-12-23 13:55:42 +01:00
560cd43b34 Update memory manager type definitions and constants 2025-12-23 12:04:43 +01:00
f0a06db7d2 Bring up i686 page table initialization 2025-12-22 23:48:04 +01:00
7575526f07 Fix physical page count overflow by using 64-bit type 2025-12-22 23:32:54 +01:00
643fd0d1e8 Fix PTE free list sentinel handling 2025-12-22 15:00:14 +01:00
6aa148784b Select correct self-map base for PAE and non-PAE paging 2025-12-22 10:14:11 +01:00
e237a944cc Extend PTE helpers with raw read and write support 2025-12-22 08:21:43 +01:00
755a167f2c Respect architecture-specific PTE layouts and write PTEs via PML-aware helpers 2025-12-22 00:07:48 +01:00
24dccf4bed Make PPE mapping architecture-specific 2025-12-19 20:25:43 +01:00
7b93c39348 Add early spin lock initialization 2025-12-19 19:12:50 +01:00
570301bb35 Clarify page table entry offset semantics 2025-12-18 22:38:59 +01:00
b183d52806 Fix paging abstraction for PDE/PTE virtual address calculation 2025-12-18 22:26:31 +01:00
687c58d923 Implement initial virtual memory layout setup 2025-12-17 22:28:08 +01:00
049c9c6bbd Update SelfMapAddress 2025-12-17 20:35:28 +01:00
f1a76bc01a Call page table initialization 2025-12-16 22:34:41 +01:00
cb4d113e31 Add virtual address validation and system PTE helpers 2025-12-16 22:31:15 +01:00
728241f998 Move memory layout initialization to architecture-specific code 2025-12-16 20:36:16 +01:00
00d428d8de Architecture-specific system PTE limits 2025-12-16 20:05:51 +01:00
020b7c7676 Extend memory layout 2025-12-16 18:37:28 +01:00
2265a4a522 Remove unsupported PML4/PML5 PTE interfaces 2025-12-16 14:13:55 +01:00
dc23f91110 Split PTE implementation per architecture 2025-12-16 14:08:32 +01:00
7f0ca6a948 Compute PTE count per page from entry size 2025-12-15 13:56:39 +01:00
36c273ea13 Implement early page table mapping routines 2025-12-15 13:24:02 +01:00
5cf3dfa844 Add bootstrap physical page allocator 2025-12-15 12:38:08 +01:00
070c508e42 Introduce kernel virtual memory layout 2025-12-14 15:35:24 +01:00
5224dc315f Compute PFN database size during MM initialization 2025-12-13 22:50:27 +01:00
b7bbf9ffa8 Tidy up memory type verification helpers 2025-12-13 21:04:55 +01:00
eae48320f3 Harden PFN initialization and expose page count 2025-12-13 21:01:13 +01:00
17b5649362 Make memory type verification helpers accessible to PFN 2025-12-13 20:50:32 +01:00
783a9eea3a Extract PFN management into separate module 2025-12-13 20:42:48 +01:00
237f6a2974 Refactor memory manager initialization into MM::Manager 2025-12-13 20:21:08 +01:00
ee9514fd5c Fix GetP5eAddress return type 2025-12-13 19:58:49 +01:00
63c27a149a Add missing virtual GetPteDistance to pagemap interface 2025-12-06 00:29:51 +01:00
7694df7744 Add architecture-specific GetPteDistance 2025-12-06 00:19:24 +01:00
c710ec4688 Refactor XPA detection API 2025-12-04 23:07:59 +01:00
8054bb915a Fix incorrect pointer types 2025-11-30 20:06:51 +01:00
86aa22e5f8 Fix incorrect pointer types 2025-11-30 20:03:12 +01:00
4a7494ad3f Split paging interface into arch-specific code 2025-11-30 19:19:32 +01:00
d4287198b0 Implement virtual address resolvers for all page map levels and add XPA status accessor 2025-11-30 18:23:51 +01:00
4265ae92d0 Add MM::PageMap::GetXpaStatus() for querying PML level 2025-11-29 23:45:00 +01:00
931586eebd Refactor PageMap to enable architecture-specific VA translation 2025-11-29 23:37:08 +01:00
c099882866 Add PFN_COUNT typedef 2025-11-29 23:14:30 +01:00
0097cb88d7 Correct LA57 paging base addresses, add self-map constants and extend PTE structures 2025-11-29 23:11:54 +01:00
20b0bfdfad Add kernel parameters section and fix minor formatting issues 2025-11-17 23:19:16 +01:00
35523a230a Prevent duplicate object generation by linking xtoskrnl with libxtos 2025-11-17 23:15:22 +01:00
7b11a8feb1 Add page list and PTE pool type enums 2025-11-06 06:55:31 +01:00
0cf178a648 Fix class name 2025-11-04 23:10:02 +01:00
66f27e4b9a Add GetPageFrameNumber() to PTE interfaces 2025-11-04 23:03:47 +01:00
10b8ab347a Make MM::Paging::GetExtendedPhysicalAddressingStatus public 2025-11-04 22:51:34 +01:00
071c840ca8 Replace writable flag with AttributesMask in PTE setup 2025-11-04 17:34:49 +01:00
dda8f88830 Add PTE attribute definitions 2025-11-04 17:26:47 +01:00
cb2da54956 Unify PTE pointer types across MM subsystem 2025-11-03 22:13:32 +01:00
fd13091476 Unify MMPML2_PTE field naming convention 2025-11-03 22:02:59 +01:00
c28c3f8344 Add input qualifiers to page map interface definitions 2025-11-03 20:04:21 +01:00
dfb0284427 Add input qualifiers to paging interface definitions 2025-11-03 16:00:46 +01:00
1150b9ecdb Add PTE management routines 2025-10-30 22:03:25 +01:00
f6dac12057 Add missing EmptyPteList field to MMPAGEMAP_INFO 2025-10-30 20:19:35 +01:00
ffa480d69a Implement unified PTE accessors and management helpers 2025-10-30 20:14:02 +01:00
0120ba167f Introduce RAII helpers for runlevel transitions 2025-10-29 23:07:27 +01:00
4e9dc15501 Define VIRTUAL macro 2025-10-29 22:32:07 +01:00
164ff0c135 Expand spinlock queue levels 2025-10-28 08:35:34 +01:00
f538d035e2 Introduce global spinlock initialization and RAII guard classes 2025-10-27 20:48:44 +01:00
72b92f853e Use PTE base from PageMapInfo 2025-10-23 08:54:57 +02:00
00b04f5405 Refactor IDT gate setup to use explicit DPL and type fields 2025-10-18 18:29:49 +02:00
52afd31e77 Implement Stage2 loading in VBR code 2025-10-17 20:44:57 +02:00
7f06abf236 New message for unsupported CPUs 2025-10-17 09:18:49 +02:00
4f4df52d3d Include architecture-specific code in VBR 2025-10-17 09:12:54 +02:00
764fec4d75 Implement low-level CPU initialization support for i686 and AMD64 boot sectors 2025-10-17 09:05:24 +02:00
ca8a539c0e Change message labels naming convention 2025-10-17 08:58:41 +02:00
c206b443ed Move XTLDR image base definition to arch-specific config 2025-10-16 12:22:30 +02:00
b19b27a621 Build relocatable image to allow proper UEFI loading 2025-10-16 12:10:00 +02:00
56b81f5d73 Set fixed image base 2025-10-15 23:06:12 +02:00
1e99a3f4a9 Set fixed alignment and base address to allow execution under BIOS 2025-10-15 21:03:03 +02:00
0a71bc3995 Print fallback message in non-EFI environment 2025-10-15 20:55:16 +02:00
13a9d4c522 Introduce legacy VGA text mode support 2025-10-15 20:49:17 +02:00
9bf867af95 Propagate compile definitions to bootsector sources 2025-10-11 23:18:14 +02:00
a7be533521 Improve reliability and correctness of the PowerShell configure script (#21)
Co-authored-by: Pedro Valadés <perikiyoxd@gmail.com>
Co-committed-by: Pedro Valadés <perikiyoxd@gmail.com>
2025-10-10 20:18:05 +02:00
fdbe157c18 Fix CHS sector-by-sector read loop 2025-10-10 19:05:23 +02:00
56a1a811b9 Fix multi-sector read using CHS mode 2025-10-10 15:10:42 +02:00
32bacdd228 Unify OVMF firmware and add WHPX targets 2025-10-10 11:00:11 +02:00
2d4c82cd29 Add initial WHPX support 2025-10-10 10:35:17 +02:00
e5611d8081 Add support for WHPX accelerator on Windows and introduce OVMF Pure EFI firmware 2025-10-09 17:35:03 +02:00
e52977fb63 Point contributors to gitea 2025-10-09 09:59:32 +02:00
11f096d9f3 Remove IDEAS and KNOWN_ISSUES migrated to Gitea 2025-10-09 09:57:30 +02:00
6e507be5e9 Add source directory include path for bootsector assembly 2025-10-09 09:25:50 +02:00
6a8a561484 Implement disk read and error handling in VBR 2025-10-07 20:09:36 +02:00
c5f522be4c Move XTLDR under boot directory 2025-10-06 12:08:36 +02:00
233 changed files with 17464 additions and 2140 deletions

View File

@@ -55,6 +55,9 @@ add_definitions(-D__XTOS__)
add_definitions(-DXTOS_SOURCE_DIR="${EXECTOS_SOURCE_DIR}")
add_definitions(-DXTOS_BINARY_DIR="${EXECTOS_BINARY_DIR}")
# Add assembler flags
add_compiler_asmflags(-D__XTOS_ASSEMBLER__)
# Compute __FILE__ definition
file(RELATIVE_PATH _PATH_PREFIX ${EXECTOS_BINARY_DIR} ${EXECTOS_SOURCE_DIR})
add_compiler_flags(-D__RELFILE__="&__FILE__[__FILE__[0] == '.' ? sizeof \\\"${_PATH_PREFIX}\\\" - 1 : sizeof XTOS_SOURCE_DIR]")
@@ -66,5 +69,4 @@ set_disk_image_size(48)
add_subdirectory(boot)
add_subdirectory(drivers)
add_subdirectory(sdk)
add_subdirectory(xtldr)
add_subdirectory(xtoskrnl)

View File

@@ -9,8 +9,7 @@ porting drivers, fixing bugs, writing tests, creating documentation, or helping
love the help.
## Wish List
If you are looking for a way to contribute, but you are not sure where to start, check our [IDEAS](IDEAS.md) and
[KNOWN ISSUES](KNOWN_ISSUES.md) pages for suggestions. We try to keep them up to date. You can also check a list of
If you are looking for a way to contribute, but you are not sure where to start, check our list of
[open issues](https://git.codingworkshop.eu.org/xt-sys/exectos/issues). If you find interesting task and you are serious
about tackling one, feel free to contact us. We will be able to provide a more detailed information and suggestions
towards getting started.

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@@ -1,9 +0,0 @@
## ExectOS Ideas
This is a list of ideas that migh but not must be realized.
### XTOSKRNL
- [ ] Implement mechanism for detecting CPU features and checking hardware requirements. If CPU does not meet
requirements, it should cause a kernel panic before any non-supported instruction is being used.
- [ ] Finish framebuffer and terminal implementation. Initialization code is already prepared as well as routines for
clearing the screen and drawing single points. Terminal should be instantiable (should be able to create many
terminals and switch between them) and work on top of FB. It should define ANSI colors and scrollback buffer.

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@@ -1,6 +0,0 @@
## ExectOS Known Issues
This is a list of well known bugs that exists in all master branch builds.
### XTLDR
- [ ] EFI Runtime Services are not mapped properly into higher half. They are mapped itself, but all pointers inside
that structure point to some physical address that is unavailable after paging is enabled.

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@@ -53,14 +53,16 @@ implement any environment subsystem to support applications that are strictly wr
* NT drivers compatibility layer
# Requirements
ExectOS is in very early development stage, thus its requirements have been not specified yet. However according to its
design, it requires a modern EFI enabled hardware. It is not possible currently to boot ExectOS on a legacy BIOS.
ExectOS is currently in a very early stage of development, so its specific requirements are not fully defined yet.
However, based on the current design, it requires modern EFI hardware. You cannot boot ExectOS on a legacy BIOS
right now, but there are plans to add BIOS support in the future.
# Source structure
| Directory | Description |
|------------------|--------------------------------------------------------------|
| boot/bootdata | default configuration and data needed to boot XTOS |
| boot/bootsect | boot sector code (MBR & VBR) initializing the boot process |
| boot/xtldr | XTOS boot loader source code |
| drivers | XT native drivers source code |
| sdk/cmake | host toolchain configuration and build-related functions |
| sdk/firmware | firmware enabling XTOS to boot on virtual machines |
@@ -68,7 +70,6 @@ design, it requires a modern EFI enabled hardware. It is not possible currently
| services | integral subsystems services source code |
| subsystems | environment subsystems source code |
| xtoskrnl | XTOS kernel source code |
| xtldr | XTOS boot loader source code |
# Build
XTOS can only be built using [XTchain](https://git.codingworkshop.eu.org/xt-sys/xtchain), a dedicated toolchain designed

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@@ -1,2 +1,3 @@
add_subdirectory(bootdata)
add_subdirectory(bootsect)
add_subdirectory(xtldr)

View File

@@ -1,6 +1,8 @@
# XT Boot Sector
PROJECT(BOOTSECT)
add_definitions("-DARCH_ESP_SOURCE=\\\"${ARCH}/cpu.S\\\"")
# Compile boot sectors
compile_bootsector(mbrboot ${BOOTSECT_SOURCE_DIR}/mbrboot.S 0x7C00 Start)
compile_bootsector(espboot ${BOOTSECT_SOURCE_DIR}/espboot.S 0x7C00 Start)

144
boot/bootsect/amd64/cpu.S Normal file
View File

@@ -0,0 +1,144 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: boot/bootsect/amd64/cpu.S
* DESCRIPTION: Low-level support for CPU initialization
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
BuildPageMap:
/* Generate page map for first 1GB of memory */
pushaw
pushw %es
cld
movw $(0x1000 / 16), %ax
movw %ax, %es
xorw %di, %di
movl $(0x2000 | 0x07), %eax
stosl
xorl %eax, %eax
movw $1021, %cx
rep stosl
movw $(0x2000 / 16), %ax
movw %ax, %es
xorw %di, %di
movl $(0x3000 | 0x07), %eax
stosl
xorl %eax, %eax
movw $1021, %cx
rep stosl
movw $(0x3000 / 16), %ax
movw %ax, %es
xorw %di, %di
movw $512, %cx
movl $0x00000083, %eax
.BuildPageMapLoop:
/* Identity map 512 pages of 2MB */
movl %eax, %es:(%di)
addl $2097152, %eax
addw $0x08, %di
loop .BuildPageMapLoop
popw %es
popaw
ret
InitializeCpu:
/* Check if CPU supports CPUID, long mode and PAE */
pushal
pushfl
popl %eax
movl %eax, %ebx
xorl $0x00200000, %eax
pushl %eax
popfl
pushfl
popl %eax
cmpl %ebx, %eax
je CpuUnsupported
movl $0x01, %eax
cpuid
testl $0x40, %edx
jz CpuUnsupported
movl $0x80000000, %eax
cpuid
cmpl $0x80000000, %eax
jbe CpuUnsupported
movl $0x80000001, %eax
cpuid
testl $0x20000000, %edx
jz CpuUnsupported
popal
call LoadGdt
ret
LoadGdt:
/* Load Global Descriptor Table */
lgdt .GdtPointer
ret
RunStage2:
/* Switch to long mode and pass control to Stage 2 */
call BuildPageMap
call ParseExecutableHeader
xorl %edx, %edx
pushl %edx
pushl %eax
cli
xorw %ax, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %fs
movw %ax, %gs
movw %ax, %ss
movl %cr4, %eax
orl $0x00A0, %eax
movl %eax, %cr4
movl $0x00001000, %eax
movl %eax, %cr3
movl $0xC0000080, %ecx
rdmsr
orl $0x00000100, %eax
wrmsr
movl %cr0, %eax
orl $0x80000001, %eax
movl %eax, %cr0
ljmp $0x10, $.Stage2LongMode
.code64
.Stage2LongMode:
/* Set segments and stack, then jump to Stage 2 */
movw $0x18, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %ax, %ax
movw %ax, %fs
movw %ax, %gs
popq %rax
xorq %rbx, %rbx
xorq %rcx, %rcx
xorq %rdx, %rdx
xorq %rsi, %rsi
xorq %rdi, %rdi
xorq %rbp, %rbp
jmp *%rax
.code16
.GdtDescriptor:
/* Global Descriptor Table */
.quad 0x0000000000000000
.quad 0x0000000000000000
.quad 0x00AF9A000000FFFF
.quad 0x00CF92000000FFFF
.quad 0x00009E000000FFFF
.quad 0x000092000000FFFF
.quad 0x00CF9B000000FFFF
.GdtPointer:
/* Pointer to Global Descriptor Table */
.word .GdtPointer - .GdtDescriptor - 1
.long .GdtDescriptor
.Stage2FileName:
/* Name of Stage 2 executable file */
.ascii "BOOTX64 EFI"

View File

@@ -84,30 +84,446 @@ RealStart:
leaw -16(%bp), %sp
sti
/* Print message */
movw $msgUnavailable, %si
call Print
/* Get drive number */
cmpb $0xFF, DriveNumber - Start(%bp)
jne GetDriveParameters
movb %dl, DriveNumber - Start(%bp)
/* Wait for key press and reboot */
xorw %ax, %ax
int $0x16
int $0x19
GetDriveParameters:
/* Get drive parameters from the BIOS */
movb DriveNumber - Start(%bp), %dl
movb $0x08, %ah
movb $0x00, %al
int $0x13
jnc GetDriveSize
movw $0xFFFF, %cx
movb %cl, %dh
GetDriveSize:
/* Get drive size from the BIOS */
movzbl %dh, %eax
incw %ax
movzbl %cl, %edx
andb $0x3F, %dl
mulw %dx
xchgb %cl, %ch
shrb $0x06, %ch
incw %cx
movzwl %cx, %ecx
mull %ecx
movl %eax, %edi
VerifyBiosParameterBlock:
/* Verify the FAT32 BPB */
cmpw $0x00, SectorsPerFat - Start(%bp)
jne FsError
cmpw $0x00, FsVersion - Start(%bp)
ja FsError
ReadExtraCode:
/* Read second VBR sector with extra boot code (3 sectors starting from sector 2) */
movl HiddenSectors - Start(%bp), %eax
addl $0x02, %eax
movw $0x03, %cx
xorw %bx, %bx
movw %bx, %es
movw $0x7E00, %bx
call ReadSectors
jmp StartExtraCode
ReadSectors:
/* Check for extended BIOS functions and use it only if available */
pushw %es
pushal
movb $0x41, %ah
movw $0x55AA, %bx
movb DriveNumber - Start(%bp), %dl
int $0x13
jc .ReadCHS
cmpw $0xAA55, %bx
jne .ReadCHS
testb $0x01, %cl
jz .ReadCHS
/* Verify drive size and determine whether to use CHS or LBA */
cmpl %edi, %eax
jnb .ReadLBA
.ReadCHS:
/* Read sectors using CHS */
popal
.CHSLoop:
/* Read sector by sector using CHS */
pushw %cx
pushal
xorl %edx, %edx
movzwl SectorsPerTrack - Start(%bp), %ecx
divl %ecx
incb %dl
movb %dl, %cl
movl %eax, %edx
shrl $0x10, %edx
divw NumberOfHeads - Start(%bp)
movb %dl, %dh
movb DriveNumber - Start(%bp), %dl
movb %al, %ch
rorb $0x01, %ah
rorb $0x01, %ah
orb %ah, %cl
movw $0x0201, %ax
int $0x13
popal
popw %cx
jc DiskError
incl %eax
movw %es, %dx
addw $0x20, %dx
movw %dx, %es
loop .CHSLoop
popw %es
ret
.ReadLBA:
/* Prepare DAP packet and read sectors using LBA */
popal
pushw %cx
pushal
pushw $0x00
pushw $0x00
pushl %eax
pushw %es
pushw %bx
pushw %cx
pushw $0x10
movw %sp, %si
movb DriveNumber - Start(%bp), %dl
movb $0x42, %ah
int $0x13
jc DiskError
addw $0x10, %sp
popal
popw %si
pushw %bx
movzwl %si, %ebx
addl %ebx, %eax
shll $0x05, %ebx
movw %es, %dx
addw %bx, %dx
movw %dx, %es
popw %bx
subw %si, %cx
jnz .ReadLBA
popw %es
ret
DiskError:
/* Display disk error message and reboot */
movw $.MsgDiskError, %si
call Print
jmp Reboot
FsError:
/* Display FS error message and reboot */
movw $.MsgFsError, %si
call Print
jmp Reboot
Print:
/* Simple routine to print messages */
lodsb
orb %al, %al
jz DonePrint
jz .DonePrint
movb $0x0E, %ah
movw $0x07, %bx
int $0x10
jmp Print
DonePrint:
.DonePrint:
retw
msgUnavailable:
.ascii "XTLDR requires EFI-based system!\r\nPress any key to restart\r\n"
Reboot:
/* Display a message, wait for a key press and reboot */
movw $.MsgAnyKey, %si
call Print
xorw %ax, %ax
int $0x16
int $0x19
.MsgAnyKey:
.ascii "Press any key to restart...\r\n\0"
.MsgDiskError:
.ascii "Disk error!\r\n\0"
.MsgFsError:
.ascii "File system error!\r\n\0"
/* Fill the rest of the VBR with zeros and add VBR signature at the end */
.fill (510 - (. - Start)), 1, 0
.word 0xAA55
StartExtraCode:
/* Load XTLDR file from disk */
call LoadStage2
/* Enable A20 gate */
call EnableA20
/* Call architecture specific initialization code */
call InitializeCpu
/* Jump to Stage2 */
call RunStage2
Clear8042:
/* Clear 8042 PS/2 buffer */
nop
nop
nop
nop
inb $0x64, %al
cmpb $0xff, %al
je .Clear8042_Done
testb $0x02, %al
jnz Clear8042
.Clear8042_Done:
ret
EnableA20:
/* Enable A20 gate */
pushaw
call Clear8042
movb $0xD1, %al
outb %al, $0x64
call Clear8042
movb $0xDF, %al
outb %al, $0x60
call Clear8042
movb $0xFF, %al
outb %al, $0x64
call Clear8042
popaw
ret
FindFatEntry:
/* Find a file or directory in the FAT table */
pushw %bx
pushw %cx
pushw %dx
pushw %si
pushw %di
.FindFatCluster:
/* Find FAT32 cluster holding the entry */
cmp $0x0FFFFFF8, %eax
jae .FindEntryFail
pushl %eax
movw $0x0200, %bx
movw %bx, %es
call ReadCluster
popl %eax
movb SectorsPerCluster - Start(%bp), %cl
shlw $0x04, %cx
xorw %di, %di
.FindEntryLoop:
/* Find the entry */
movb %es:(%di), %al
cmpb $0x00, %al
je .FindEntryFail
cmpb $0xE5, %al
je .FindSkipEntry
movb %es:0x0B(%di), %ah
cmpb $0x0F, %ah
je .FindSkipEntry
pushw %di
pushw %si
pushw %cx
movw $0x0B, %cx
repe cmpsb
popw %cx
popw %si
popw %di
jnz .FindSkipEntry
movw %es:0x1A(%di), %ax
movw %es:0x14(%di), %dx
shll $0x10, %edx
orl %edx, %eax
clc
jmp .FindEntryDone
.FindSkipEntry:
/* Skip to the next entry */
addw $0x20, %di
decw %cx
jnz .FindEntryLoop
call GetFatEntry
jmp .FindFatCluster
.FindEntryFail:
/* Error, file/directory not found */
stc
.FindEntryDone:
/* Clean up the stack */
popw %di
popw %si
popw %dx
popw %cx
popw %bx
ret
GetFatEntry:
/* Get FAT32 sector and offset from FAT table */
shll $0x02, %eax
movl %eax, %ecx
xorl %edx, %edx
movzwl BytesPerSector - Start(%bp), %ebx
pushl %ebx
divl %ebx
movzwl ReservedSectors - Start(%bp), %ebx
addl %ebx, %eax
movl HiddenSectors - Start(%bp), %ebx
addl %ebx, %eax
popl %ebx
decl %ebx
andl %ebx, %ecx
movzwl ExtendedFlags - Start(%bp), %ebx
andw $0x0F, %bx
jz LoadFatSector
cmpb FatCopies - Start(%bp), %bl
jae FsError
pushl %eax
movl BigSectorsPerFat - Start(%bp), %eax
mull %ebx
popl %edx
addl %edx, %eax
LoadFatSector:
/* Load FAT32 sector from disk */
pushl %ecx
movw $0x9000, %bx
movw %bx, %es
cmpl %esi, %eax
je .LoadFatSectorDone
movl %eax, %esi
xorw %bx, %bx
movw $0x01, %cx
call ReadSectors
.LoadFatSectorDone:
/* Clean up the stack */
popl %ecx
movl %es:(%ecx), %eax
andl $0x0FFFFFFF, %eax
ret
LoadStage2:
/* Load Stage2 executable, first find file in the path */
movl $0xFFFFFFFF, %esi
pushl %esi
movl 0x7C2C, %eax
movw $.EfiDirName, %si
call FindFatEntry
jc Stage2NotLoaded
movw $.BootDirName, %si
call FindFatEntry
jc Stage2NotLoaded
movw $.Stage2FileName, %si
call FindFatEntry
jc Stage2NotLoaded
popl %esi
/* Load XTLDR file from disk */
cmpl $0x02, %eax
jb FileNotFound
cmpl $0x0FFFFFF8, %eax
jae FileNotFound
movw $(0xF800 / 16), %bx
movw %bx, %es
.LoadStage2Loop:
/* Load file data from disk */
pushl %eax
xorw %bx, %bx
pushw %es
call ReadCluster
popw %es
xorw %bx, %bx
movb SectorsPerCluster - Start(%bp), %bl
shlw $0x05, %bx
movw %es, %ax
addw %bx, %ax
movw %ax, %es
popl %eax
pushw %es
call GetFatEntry
popw %es
cmpl $0x0FFFFFF8, %eax
jb .LoadStage2Loop
ret
ParseExecutableHeader:
/* Parse Stage2 PE/COFF executable header */
pushw %es
movw $(0xF800 / 16), %ax
movw %ax, %es
movl %es:60, %eax
addl $(4 + 20), %eax
movl %es:16(%eax), %eax
addl $0xF800, %eax
popw %es
ret
ReadCluster:
/* Read FAT32 cluster from disk */
decl %eax
decl %eax
xorl %edx, %edx
movzbl SectorsPerCluster - Start(%bp), %ebx
mull %ebx
pushl %eax
xorl %edx, %edx
movzbl FatCopies - Start(%bp), %eax
mull BigSectorsPerFat - Start(%bp)
movzwl ReservedSectors - Start(%bp), %ebx
addl %ebx, %eax
addl HiddenSectors - Start(%bp), %eax
popl %ebx
addl %ebx, %eax
xorw %bx, %bx
movzbw SectorsPerCluster - Start(%bp), %cx
call ReadSectors
ret
/* Include architecture specific code */
.include ARCH_ESP_SOURCE
CpuUnsupported:
/* Display CPU unsupported message and reboot */
popal
movw $.MsgCpuUnsupported, %si
call Print
jmp Reboot
FileNotFound:
/* Display XTLDR not found message and reboot */
movw $.MsgXtLdrNotFound, %si
call Print
jmp Reboot
Stage2NotLoaded:
/* Clean up the stack and display XTLDR not found message and reboot */
popl %esi
jmp FileNotFound
.BootDirName:
/* Boot directory name */
.ascii "BOOT "
.EfiDirName:
/* EFI directory name */
.ascii "EFI "
.MsgCpuUnsupported:
.ascii "CPU not supported!\r\n\0"
.MsgXtLdrNotFound:
.ascii "XTLDR Stage2 not found!\r\n\0"
/* Fill the rest of the extra VBR with zeros and add signature */
.fill (2043 - (. - Start)), 1, 0
.ascii "XTLDR"

124
boot/bootsect/i686/cpu.S Normal file
View File

@@ -0,0 +1,124 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: boot/bootsect/i686/cpu.S
* DESCRIPTION: Low-level support for CPU initialization
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
BuildPageMap:
/* Generate page map for first 16MB of memory */
pushaw
pushw %es
cld
movw $(0x1000 >> 0x04), %ax
movw %ax, %es
xorw %di, %di
movl $(0x2000 | 0x03), %eax
stosl
movl $(0x3000 | 0x03), %eax
stosl
movl $(0x4000 | 0x03), %eax
stosl
movl $(0x5000 | 0x03), %eax
stosl
xorl %eax, %eax
movw $(1024 - 4), %cx
rep stosl
movl $0x00000003, %eax
movl $4, %edx
movw $(0x2000 >> 0x04), %bx
.BuildPageMapLoop:
/* Identity map 1024 pages of 4KB */
movw %bx, %es
xorw %di, %di
pushl %edx
movw $1024, %cx
.FillPageMapTable:
/* Fill the page table */
movl %eax, %es:(%di)
addl $4096, %eax
addw $0x04, %di
loop .FillPageMapTable
popl %edx
addw $(0x1000 >> 0x04), %bx
decl %edx
jnz .BuildPageMapLoop
popw %es
popaw
ret
InitializeCpu:
/* Check if CPU supports CPUID */
pushal
pushfl
popl %eax
movl %eax, %ebx
xorl $0x00200000, %eax
pushl %eax
popfl
pushfl
popl %eax
cmpl %ebx, %eax
je CpuUnsupported
popal
call LoadGdt
ret
LoadGdt:
/* Load Global Descriptor Table */
lgdt .GdtPointer
ret
RunStage2:
/* Switch to protected mode and pass control to Stage 2 */
call BuildPageMap
call ParseExecutableHeader
pushl %eax
cli
movl %cr0, %eax
orl $0x01, %eax
movl %eax, %cr0
ljmp $0x08, $.Stage2ProtectedMode
.code32
.Stage2ProtectedMode:
/* Set segments and stack, then jump to Stage 2 */
movw $0x10, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %ax, %ax
movw %ax, %fs
movw %ax, %gs
popl %eax
xorl %ebx, %ebx
xorl %ecx, %ecx
xorl %edx, %edx
xorl %esi, %esi
xorl %edi, %edi
xorl %ebp, %ebp
movl $0x1000, %ebx
movl %ebx, %cr3
movl %cr0, %ebx
orl $0x80000000, %ebx
movl %ebx, %cr0
jmp *%eax
.code16
.GdtDescriptor:
/* Global Descriptor Table */
.quad 0x0000000000000000
.quad 0x00CF9A000000FFFF
.quad 0x00CF92000000FFFF
.quad 0x00009E000000FFFF
.quad 0x000092000000FFFF
.GdtPointer:
/* Pointer to Global Descriptor Table */
.word .GdtPointer - .GdtDescriptor - 1
.long .GdtDescriptor
.Stage2FileName:
/* Name of Stage 2 executable file */
.ascii "BOOTIA32EFI"

View File

@@ -4,6 +4,7 @@
* FILE: boot/bootsect/amd64/mbrboot.S
* DESCRIPTION: XT Boot Loader MBR boot code
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <aiken@codingworkshop.eu.org>
*/
.text
@@ -41,7 +42,7 @@ RealStart:
movw %ax, %ss
/* Print welcome message */
leaw msgXtosBoot, %si
leaw .MsgXtosBoot, %si
call Print
/* Get BIOS boot drive and partition table offset */
@@ -90,19 +91,19 @@ PartitionFound:
InvalidSignature:
/* Invalid signature error */
leaw msgInvalidSignature, %si
leaw .MsgInvalidSignature, %si
call Print
jmp HaltSystem
PartitionNotFound:
/* Active partition not found error */
leaw msgPartitionNotFound, %si
leaw .MsgPartitionNotFound, %si
call Print
jmp HaltSystem
VbrReadFail:
/* VBR read failed error */
leaw msgVbrReadFail, %si
leaw .MsgVbrReadFail, %si
call Print
jmp HaltSystem
@@ -136,16 +137,16 @@ DonePrint:
/* Storage for the LBA start */
.long 0
msgInvalidSignature:
.MsgInvalidSignature:
.asciz "Invalid partition signature!"
msgPartitionNotFound:
.MsgPartitionNotFound:
.asciz "Bootable partition not found!"
msgVbrReadFail:
.MsgVbrReadFail:
.asciz "VBR read failed!"
msgXtosBoot:
.MsgXtosBoot:
.asciz "Starting XTOS boot loader...\r\n"
/* Fill the rest of the MBR with zeros and add MBR signature at the end */

View File

@@ -16,6 +16,7 @@ list(APPEND LIBXTLDR_SOURCE
# Specify list of source code files
list(APPEND XTLDR_SOURCE
${XTLDR_SOURCE_DIR}/arch/${ARCH}/memory.cc
${XTLDR_SOURCE_DIR}/biosutil.cc
${XTLDR_SOURCE_DIR}/bootutil.cc
${XTLDR_SOURCE_DIR}/config.cc
${XTLDR_SOURCE_DIR}/console.cc
@@ -38,6 +39,9 @@ add_executable(xtldr ${XTLDR_SOURCE})
# Add linker libraries
target_link_libraries(xtldr libxtos)
# Add linker options
target_link_options(xtldr PRIVATE /ALIGN:512)
# Set proper binary name and install target
if(ARCH STREQUAL "i686")
set(BINARY_NAME "bootia32")
@@ -49,5 +53,6 @@ set_install_target(xtldr efi/boot)
# Set loader entrypoint and subsystem
set_entrypoint(xtldr "BlStartXtLoader")
set_imagebase(xtldr ${BASEADDRESS_XTLDR})
set_linker_map(xtldr TRUE)
set_subsystem(xtldr efi_application)

View File

@@ -28,13 +28,12 @@ EFI_STATUS
Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress)
{
PLIST_ENTRY ListEntry, ModulesList, ModulesListEntry;
PXTBL_MEMORY_MAPPING Mapping;
PLIST_ENTRY ModulesList, ModulesListEntry;
PXTBL_MODULE_INFO ModuleInfo;
EFI_PHYSICAL_ADDRESS Address;
PVOID LoaderBase;
ULONGLONG LoaderSize;
EFI_STATUS Status;
PVOID LoaderBase;
/* Allocate pages for the Page Map */
Status = AllocatePages(AllocateAnyPages, 1, &Address);
@@ -44,6 +43,14 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign and zero-fill memory used by page mappings */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -57,7 +64,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
}
/* Map the trampoline code area */
Status = MapVirtualMemory(PageMap, (PVOID)MM_TRAMPOLINE_ADDRESS,(PVOID)MM_TRAMPOLINE_ADDRESS,
Status = MapVirtualMemory(PageMap, MM_TRAMPOLINE_ADDRESS, MM_TRAMPOLINE_ADDRESS,
1, LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -74,7 +81,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink);
/* Map module code */
Status = MapVirtualMemory(PageMap, ModuleInfo->ModuleBase, ModuleInfo->ModuleBase,
Status = MapVirtualMemory(PageMap, (ULONGLONG)ModuleInfo->ModuleBase, (ULONGLONG)ModuleInfo->ModuleBase,
EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary);
/* Check if mapping succeeded */
@@ -95,7 +102,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
if(LoaderBase && LoaderSize)
{
/* Map boot loader code as well */
Status = MapVirtualMemory(PageMap, LoaderBase, LoaderBase,
Status = MapVirtualMemory(PageMap, (ULONGLONG)LoaderBase, (ULONGLONG)LoaderBase,
EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -109,6 +116,28 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return STATUS_EFI_PROTOCOL_ERROR;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Iterates through the memory map and physically maps all virtual addresses to page tables.
*
* @param PageMap
* Supplies a pointer to the page mapping structure.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Memory::CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
PXTBL_MEMORY_MAPPING Mapping;
PLIST_ENTRY ListEntry;
EFI_STATUS Status;
/* Iterate through and map all the mappings*/
Debug::Print(L"Mapping and dumping EFI memory:\n");
ListEntry = PageMap->MemoryMap.Flink;
@@ -193,7 +222,7 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
}
/* Add new memory mapping */
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)(UINT_PTR)Address, 1, LoaderMemoryData);
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
@@ -239,9 +268,9 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
XTCDECL
EFI_STATUS
Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR VirtualAddress,
IN ULONG_PTR PhysicalAddress,
IN ULONG NumberOfPages)
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN ULONGLONG NumberOfPages)
{
PVOID Pml1, Pml2, Pml3, Pml4, Pml5;
SIZE_T Pml1Entry, Pml2Entry, Pml3Entry, Pml4Entry, Pml5Entry;

View File

@@ -25,13 +25,12 @@ EFI_STATUS
Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress)
{
PLIST_ENTRY ListEntry, ModulesList, ModulesListEntry;
EFI_PHYSICAL_ADDRESS Address, DirectoryAddress;
PLIST_ENTRY ModulesList, ModulesListEntry;
PXTBL_MODULE_INFO ModuleInfo;
PXTBL_MEMORY_MAPPING Mapping;
PVOID LoaderBase;
ULONGLONG LoaderSize;
EFI_STATUS Status;
PVOID LoaderBase;
ULONG Index;
/* Check the page map level to determine which paging structure to create */
@@ -45,6 +44,14 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign the allocated page to the page map and zero it out */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -57,6 +64,14 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Add new memory mapping for the Page Directories (PDs) */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, DirectoryAddress, 4, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Zero-fill the allocated memory for the Page Directories */
RTL::Memory::ZeroMemory((PVOID)DirectoryAddress, EFI_PAGE_SIZE * 4);
@@ -79,6 +94,14 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign the allocated page to the page map and zero it out */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -93,8 +116,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
}
/* Map the trampoline code area */
Status = MapVirtualMemory(PageMap, (PVOID)MM_TRAMPOLINE_ADDRESS,(PVOID)MM_TRAMPOLINE_ADDRESS,
1, LoaderFirmwareTemporary);
Status = MapVirtualMemory(PageMap, MM_TRAMPOLINE_ADDRESS, MM_TRAMPOLINE_ADDRESS, 1, LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS)
{
/* Mapping trampoline code failed */
@@ -110,7 +132,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink);
/* Map module code */
Status = MapVirtualMemory(PageMap, ModuleInfo->ModuleBase, ModuleInfo->ModuleBase,
Status = MapVirtualMemory(PageMap, (ULONGLONG)ModuleInfo->ModuleBase, (ULONGLONG)ModuleInfo->ModuleBase,
EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary);
/* Check if mapping succeeded */
@@ -131,7 +153,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
if(LoaderBase && LoaderSize)
{
/* Map boot loader code as well */
Status = MapVirtualMemory(PageMap, LoaderBase, LoaderBase,
Status = MapVirtualMemory(PageMap, (ULONGLONG)LoaderBase, (ULONGLONG)LoaderBase,
EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -145,6 +167,28 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return STATUS_EFI_PROTOCOL_ERROR;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Iterates through the memory map and physically maps all virtual addresses to page tables.
*
* @param PageMap
* Supplies a pointer to the page mapping structure.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Memory::CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
PXTBL_MEMORY_MAPPING Mapping;
PLIST_ENTRY ListEntry;
EFI_STATUS Status;
/* Iterate through and map all the mappings*/
Debug::Print(L"Mapping and dumping EFI memory:\n");
ListEntry = PageMap->MemoryMap.Flink;
@@ -157,8 +201,9 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
if(Mapping->VirtualAddress)
{
/* Dump memory mapping */
Debug::Print(L" Type=%02lu, PhysicalBase=%.8P, VirtualBase=%.8P, Pages=%llu\n", Mapping->MemoryType,
Mapping->PhysicalAddress, Mapping->VirtualAddress, Mapping->NumberOfPages);
Debug::Print(L" Type=%02lu, PhysicalBase=0x%.8llX, VirtualBase=0x%.8llX, Pages=%llu\n",
Mapping->MemoryType, Mapping->PhysicalAddress,
Mapping->VirtualAddress, Mapping->NumberOfPages);
/* Map memory */
Status = MapPage(PageMap, (UINT_PTR)Mapping->VirtualAddress,
@@ -252,7 +297,7 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
}
/* Add new memory mapping */
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)(UINT_PTR)Address, 1, LoaderMemoryData);
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
@@ -313,11 +358,11 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
XTCDECL
EFI_STATUS
Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR VirtualAddress,
IN ULONG_PTR PhysicalAddress,
IN ULONG NumberOfPages)
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN ULONGLONG NumberOfPages)
{
SIZE_T PageFrameNumber;
ULONGLONG PageFrameNumber;
PVOID Pml1, Pml2, Pml3;
SIZE_T Pml1Entry, Pml2Entry, Pml3Entry;
PHARDWARE_LEGACY_PTE LegacyPmlTable;

190
boot/xtldr/biosutil.cc Normal file
View File

@@ -0,0 +1,190 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtldr/biosutil.cc
* DESCRIPTION: Legacy BIOS support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtldr.hh>
/**
* Clears the entire screen and moves the cursor to the top-left corner.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::ClearScreen()
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT Blank;
UINT Index;
/* Set blank character */
Blank = (0x0F << 8) | L' ';
/* Fill the entire screen with blank characters */
for(Index = 0; Index < VgaWidth * VgaHeight; Index++)
{
VgaBuffer[Index] = Blank;
}
/* Reset cursor position to the top-left corner */
CursorX = 0;
CursorY = 0;
/* Update the hardware cursor position */
UpdateCursor();
}
/**
* Formats the input string and prints it out to the screen.
*
* @param Format
* The formatted string that is to be written to the output.
*
* @param ...
* Depending on the format string, this routine might expect a sequence of additional arguments.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::Print(IN PCWSTR Format,
IN ...)
{
RTL_PRINT_CONTEXT PrintContext;
VA_LIST Arguments;
/* Initialise the print contexts */
PrintContext.WriteWideCharacter = PutChar;
/* Initialise the va_list */
VA_START(Arguments, Format);
/* Format and print the string to the stdout */
RTL::WideString::FormatWideString(&PrintContext, (PWCHAR)Format, Arguments);
/* Clean up the va_list */
VA_END(Arguments);
}
/**
* Writes a single wide character to the screen using legacy BIOS VGA text mode.
*
* @param Character
* The wide character to be printed.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
XTSTATUS
BiosUtils::PutChar(IN WCHAR Character)
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT VgaCharacter;
/* Handle special characters */
if(Character == L'\n')
{
/* Move to the next line */
CursorX = 0;
CursorY++;
}
else if(Character == L'\r')
{
/* Move to the beginning of the current line */
CursorX = 0;
}
else
{
/* Print character and move cursor to the right */
VgaCharacter = (0x0F << 8) | (Character & 0xFF);
VgaBuffer[CursorY * VgaWidth + CursorX] = VgaCharacter;
CursorX++;
}
/* Handle moving to the next line if cursor is at the end of the line */
if(CursorX >= VgaWidth)
{
CursorX = 0;
CursorY++;
}
/* Handle scrolling if cursor is at the end of the screen */
if(CursorY >= VgaHeight)
{
ScrollScreen();
CursorY = VgaHeight - 1;
}
/* Update the hardware cursor position */
UpdateCursor();
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Scrolls the entire screen content up by one line and clears the last line.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::ScrollScreen()
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT Blank;
UINT Index;
/* Set blank character */
Blank = (0x0F << 8) | L' ';
/* Move every line up by one */
for(Index = 0; Index < (VgaHeight - 1) * VgaWidth; Index++)
{
VgaBuffer[Index] = VgaBuffer[Index + VgaWidth];
}
/* Clear the last line */
for(Index = (VgaHeight - 1) * VgaWidth; Index < VgaHeight * VgaWidth; Index++)
{
VgaBuffer[Index] = Blank;
}
}
/**
* Updates the hardware cursor position on the screen.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::UpdateCursor()
{
USHORT Position;
/* Calculate cursor position */
Position = CursorY * VgaWidth + CursorX;
/* Send command to set the high byte of the cursor position */
HL::IoPort::WritePort8(0x3D4, 0x0E);
HL::IoPort::WritePort8(0x3D5, (UCHAR)((Position >> 8) & 0xFF));
/* Send command to set the low byte of the cursor position */
HL::IoPort::WritePort8(0x3D4, 0x0F);
HL::IoPort::WritePort8(0x3D5, (UCHAR)(Position & 0xFF));
}

View File

@@ -10,6 +10,18 @@
#include <xtldr.hh>
/* Legacy BIOS cursor X position */
USHORT BiosUtils::CursorX = 0;
/* Legacy BIOS cursor Y position */
USHORT BiosUtils::CursorY = 0;
/* Legacy BIOS screen height */
CONST USHORT BiosUtils::VgaHeight = 25;
/* Legacy BIOS screen width */
CONST USHORT BiosUtils::VgaWidth = 80;
/* XT Boot Loader menu list */
PLIST_ENTRY Configuration::BootMenuList = NULLPTR;

View File

@@ -15,6 +15,25 @@
#include <libxtos.hh>
class BiosUtils
{
private:
STATIC USHORT CursorX;
STATIC USHORT CursorY;
STATIC CONST USHORT VgaHeight;
STATIC CONST USHORT VgaWidth;
public:
STATIC XTCDECL VOID ClearScreen();
STATIC XTCDECL VOID Print(IN PCWSTR Format,
IN ...);
STATIC XTCDECL XTSTATUS PutChar(IN WCHAR Character);
private:
STATIC XTCDECL VOID ScrollScreen();
STATIC XTCDECL VOID UpdateCursor();
};
class BootUtils
{
public:
@@ -146,6 +165,7 @@ class Memory
OUT PVOID *Memory);
STATIC XTCDECL EFI_STATUS BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress);
STATIC XTCDECL EFI_STATUS CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL EFI_STATUS FreePages(IN ULONGLONG NumberOfPages,
IN EFI_PHYSICAL_ADDRESS Memory);
STATIC XTCDECL EFI_STATUS FreePool(IN PVOID Memory);
@@ -158,15 +178,16 @@ class Memory
IN SHORT PageMapLevel,
IN PAGE_SIZE PageSize);
STATIC XTCDECL EFI_STATUS MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN OUT PVOID *MemoryMapAddress,
IN OUT PVOID *BaseAddress,
IN BOOLEAN IdentityMapping,
IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
STATIC XTCDECL EFI_STATUS MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR VirtualAddress,
IN ULONG_PTR PhysicalAddress,
IN ULONG NumberOfPages);
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN ULONGLONG NumberOfPages);
STATIC XTCDECL EFI_STATUS MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN PVOID VirtualAddress,
IN PVOID PhysicalAddress,
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN ULONGLONG NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType);
STATIC XTCDECL PVOID PhysicalAddressToVirtual(IN PVOID PhysicalAddress,

View File

@@ -314,9 +314,12 @@ Memory::InitializePageMap(OUT PXTBL_PAGE_MAPPING PageMap,
* @param PageMap
* Supplies a pointer to the page mapping structure.
*
* @param MemoryMapAddress
* @param BaseAddress
* Supplies a virtual address, where EFI memory will be mapped.
*
* @param IdentityMapping
* Specifies whether EFI non-free memory should be mapped by identity or sequential mapping.
*
* @param GetMemoryTypeRoutine
* Supplies a pointer to the routine which will be used to match EFI memory type to the OS memory type.
*
@@ -327,19 +330,20 @@ Memory::InitializePageMap(OUT PXTBL_PAGE_MAPPING PageMap,
XTCDECL
EFI_STATUS
Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN OUT PVOID *MemoryMapAddress,
IN OUT PVOID *BaseAddress,
IN BOOLEAN IdentityMapping,
IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine)
{
ULONGLONG MaxAddress, VirtualAddress;
PEFI_MEMORY_DESCRIPTOR Descriptor;
LOADER_MEMORY_TYPE MemoryType;
PEFI_MEMORY_MAP MemoryMap;
SIZE_T DescriptorCount;
PUCHAR VirtualAddress;
EFI_STATUS Status;
SIZE_T Index;
/* Set virtual address as specified in argument */
VirtualAddress = (PUCHAR)*MemoryMapAddress;
VirtualAddress = (ULONGLONG)*BaseAddress;
/* Check if custom memory type routine is specified */
if(GetMemoryTypeRoutine == NULLPTR)
@@ -367,8 +371,37 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
/* Iterate through all descriptors from the memory map */
for(Index = 0; Index < DescriptorCount; Index++)
{
/* Make sure descriptor does not start beyond lowest physical page */
if(Descriptor->PhysicalStart <= MAXUINT_PTR)
/* Check page map level */
if(PageMap->PageMapLevel == 2)
{
/* Limit physical address to 4GB in legacy mode */
MaxAddress = 0xFFFFFFFF;
}
else if(PageMap->PageMapLevel == 3)
{
/* Limit physical address to 64GB in PAE mode */
MaxAddress = 0xFFFFFFFFFULL;
}
/* Check page map level */
if(PageMap->PageMapLevel == 2 || PageMap->PageMapLevel == 3)
{
/* Check if physical address starts beyond limit */
if(Descriptor->PhysicalStart >= MaxAddress)
{
/* Go to the next descriptor */
Descriptor = (PEFI_MEMORY_DESCRIPTOR)((PUCHAR)Descriptor + MemoryMap->DescriptorSize);
continue;
}
/* Check if memory descriptor exceeds the lowest physical page */
if(Descriptor->PhysicalStart + (Descriptor->NumberOfPages << EFI_PAGE_SHIFT) > MaxAddress)
{
/* Truncate memory descriptor to the lowest supported physical page */
Descriptor->NumberOfPages = (MaxAddress - Descriptor->PhysicalStart) >> EFI_PAGE_SHIFT;
}
}
{
/* Skip EFI reserved memory */
if(Descriptor->Type == EfiReservedMemoryType)
@@ -378,25 +411,6 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
continue;
}
/* Check if preparing page map level 2 (non-PAE i686) */
if(PageMap->PageMapLevel == 2)
{
/* Check if physical address starts beyond 4GB */
if(Descriptor->PhysicalStart > 0xFFFFFFFF)
{
/* Go to the next descriptor */
Descriptor = (PEFI_MEMORY_DESCRIPTOR)((PUCHAR)Descriptor + MemoryMap->DescriptorSize);
continue;
}
/* Check if memory descriptor exceeds the lowest physical page */
if(Descriptor->PhysicalStart + (Descriptor->NumberOfPages << EFI_PAGE_SHIFT) > MAXULONG)
{
/* Truncate memory descriptor to the 4GB */
Descriptor->NumberOfPages = (((ULONGLONG)MAXULONG + 1) - Descriptor->PhysicalStart) >> EFI_PAGE_SHIFT;
}
}
/* Convert EFI memory type into XTLDR memory type */
MemoryType = GetMemoryTypeRoutine((EFI_MEMORY_TYPE)Descriptor->Type);
@@ -404,22 +418,32 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
if(MemoryType == LoaderFirmwareTemporary)
{
/* Map EFI firmware code */
Status = MapVirtualMemory(PageMap, (PVOID)Descriptor->PhysicalStart,
(PVOID)Descriptor->PhysicalStart, Descriptor->NumberOfPages, MemoryType);
Status = MapVirtualMemory(PageMap, Descriptor->PhysicalStart,
Descriptor->PhysicalStart, Descriptor->NumberOfPages, MemoryType);
}
else if(MemoryType != LoaderFree)
{
/* Add any non-free memory mapping */
Status = MapVirtualMemory(PageMap, VirtualAddress, (PVOID)Descriptor->PhysicalStart,
/* Check mapping strategy */
if(IdentityMapping)
{
/* Add any non-free memory using identity mapping */
Status = MapVirtualMemory(PageMap, Descriptor->PhysicalStart + KSEG0_BASE, Descriptor->PhysicalStart,
Descriptor->NumberOfPages, MemoryType);
}
else
{
/* Add any non-free memory using sequential mapping */
Status = MapVirtualMemory(PageMap, VirtualAddress, Descriptor->PhysicalStart,
Descriptor->NumberOfPages, MemoryType);
/* Calculate next valid virtual address */
VirtualAddress += Descriptor->NumberOfPages * EFI_PAGE_SIZE;
/* Update virtual address */
VirtualAddress = VirtualAddress + (Descriptor->NumberOfPages * MM_PAGE_SIZE);
}
}
else
{
/* Map all other memory as loader free */
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)Descriptor->PhysicalStart,
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Descriptor->PhysicalStart,
Descriptor->NumberOfPages, LoaderFree);
}
@@ -436,7 +460,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
}
/* Always map first page */
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)0, 1, LoaderFirmwarePermanent);
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, 0, 1, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS)
{
/* Mapping failed */
@@ -444,7 +468,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
}
/* Map BIOS ROM and VRAM */
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)0xA0000, 0x60, LoaderFirmwarePermanent);
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, 0xA0000, 0x60, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS)
{
/* Mapping failed */
@@ -452,7 +476,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
}
/* Store next valid virtual address and return success */
*MemoryMapAddress = VirtualAddress;
*BaseAddress = (PVOID)VirtualAddress;
return STATUS_EFI_SUCCESS;
}
@@ -481,13 +505,13 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
XTCDECL
EFI_STATUS
Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN PVOID VirtualAddress,
IN PVOID PhysicalAddress,
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN ULONGLONG NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType)
{
PXTBL_MEMORY_MAPPING Mapping1, Mapping2, Mapping3;
PVOID PhysicalAddressEnd, PhysicalAddress2End;
ULONGLONG PhysicalAddressEnd, PhysicalAddress2End;
PLIST_ENTRY ListEntry, MappingListEntry;
SIZE_T NumberOfMappedPages;
EFI_STATUS Status;
@@ -507,7 +531,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
Mapping1->MemoryType = MemoryType;
/* Calculate the end of the physical address */
PhysicalAddressEnd = (PVOID)((ULONG_PTR)PhysicalAddress + (NumberOfPages * EFI_PAGE_SIZE) - 1);
PhysicalAddressEnd = PhysicalAddress + (NumberOfPages * EFI_PAGE_SIZE) - 1;
/* Iterate through all the mappings already set to insert new mapping at the correct place */
ListEntry = PageMap->MemoryMap.Flink;
@@ -515,7 +539,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
{
/* Take a mapping from the list and calculate its end of physical address */
Mapping2 = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1;
/* Check if new mapping is a subset of an existing mapping */
if(Mapping1->PhysicalAddress >= Mapping2->PhysicalAddress && PhysicalAddressEnd <= PhysicalAddress2End)
@@ -523,7 +547,8 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
/* Make sure it's memory type is the same */
if(Mapping1->MemoryType == Mapping2->MemoryType)
{
/* It is already mapped */
/* Free the unused mapping structure and return success */
FreePool(Mapping1);
return STATUS_EFI_SUCCESS;
}
}
@@ -539,7 +564,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
}
/* Calculate number of pages for this mapping */
NumberOfMappedPages = ((PUCHAR)PhysicalAddress2End - (PUCHAR)PhysicalAddressEnd) / EFI_PAGE_SIZE;
NumberOfMappedPages = (PhysicalAddress2End - PhysicalAddressEnd) / EFI_PAGE_SIZE;
if(NumberOfMappedPages > 0)
{
/* Pages associated to the mapping, allocate memory for it */
@@ -550,18 +575,21 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Set mapping fields and insert it on the top */
Mapping3->PhysicalAddress = (PUCHAR)PhysicalAddressEnd + 1;
Mapping3->VirtualAddress = NULLPTR;
/* Set mapping fields */
Mapping3->PhysicalAddress = PhysicalAddressEnd + 1;
Mapping3->VirtualAddress = (ULONGLONG)NULLPTR;
Mapping3->NumberOfPages = NumberOfMappedPages;
Mapping3->MemoryType = Mapping2->MemoryType;
/* Insert new mapping in front of the list and increase page map size */
RTL::LinkedList::InsertHeadList(&Mapping2->ListEntry, &Mapping3->ListEntry);
PageMap->MapSize++;
}
/* Calculate number of pages and the end of the physical address */
Mapping2->NumberOfPages = ((PUCHAR)PhysicalAddressEnd + 1 -
(PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE;
PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1;
}
/* Check if they overlap */
@@ -586,18 +614,21 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Set mapping fields and insert it on the top */
/* Set mapping fields */
Mapping3->PhysicalAddress = Mapping1->PhysicalAddress;
Mapping3->VirtualAddress = NULLPTR;
Mapping3->VirtualAddress = (ULONGLONG)NULLPTR;
Mapping3->NumberOfPages = NumberOfMappedPages;
Mapping3->MemoryType = Mapping2->MemoryType;
/* Insert new mapping in front of the list and increase page map size */
RTL::LinkedList::InsertHeadList(&Mapping2->ListEntry, &Mapping3->ListEntry);
PageMap->MapSize++;
}
/* Calculate number of pages and the end of the physical address */
Mapping2->NumberOfPages = ((PUCHAR)Mapping1->PhysicalAddress -
(PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE;
PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1;
}
/* Check if mapping is really needed */
@@ -619,15 +650,19 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
Status = FreePool(Mapping2);
ListEntry = MappingListEntry;
/* Go to the next mapping */
/* Decrease page map size and go to the next mapping */
PageMap->MapSize--;
continue;
}
/* Determine physical address order */
if(Mapping2->PhysicalAddress > Mapping1->PhysicalAddress)
{
/* Insert new mapping in front */
/* Insert new mapping in front of the list and increase page map size */
RTL::LinkedList::InsertHeadList(Mapping2->ListEntry.Blink, &Mapping1->ListEntry);
PageMap->MapSize++;
/* Return success */
return STATUS_EFI_SUCCESS;
}
@@ -635,7 +670,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
ListEntry = ListEntry->Flink;
}
/* Insert new mapping to the list and increase page map size */
/* Insert new mapping to the tail of the list and increase page map size */
RTL::LinkedList::InsertTailList(&PageMap->MemoryMap, &Mapping1->ListEntry);
PageMap->MapSize++;

View File

@@ -729,11 +729,11 @@ PeCoff::RelocateLoadedImage(IN PPECOFF_IMAGE_CONTEXT Image)
}
else
{
/* Check if loaded 32-bit PE32 image should be relocated */
/* Set relocation data directory and image base address */
DataDirectory = &Image->PeHeader->OptionalHeader32.DataDirectory[PECOFF_IMAGE_DIRECTORY_ENTRY_BASERELOC];
ImageBase = Image->PeHeader->OptionalHeader32.ImageBase;
/* Check if loaded 32-bit PE32 image should be relocated */
if(Image->PeHeader->OptionalHeader32.NumberOfRvaAndSizes <= PECOFF_IMAGE_DIRECTORY_ENTRY_BASERELOC ||
DataDirectory->VirtualAddress == 0 || DataDirectory->Size < sizeof(PECOFF_IMAGE_BASE_RELOCATION))
{

View File

@@ -10,6 +10,49 @@
#include <xtos.hh>
XTCDECL
EFI_STATUS
Xtos::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
EFI_STATUS Status;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, (PageMap->PageMapLevel > 4) ? MM_P5E_LA57_BASE : MM_PXE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status);
return Status;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Determines the appropriate EFI memory mapping strategy for the AMD64 architecture.
*
* @return This routine returns TRUE, what results in an identity mapping.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
Xtos::DetermineMappingStrategy()
{
/* Use an identity mapping strategy */
return TRUE;
}
/**
* Determines the appropriate paging level (PML) for the AMD64 architecture.
*
@@ -76,24 +119,6 @@ Xtos::EnablePaging(IN PXTBL_PAGE_MAPPING PageMap)
ULONG_PTR TrampolineSize;
PVOID TrampolineCode;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, (PageMap->PageMapLevel > 4) ? MM_P5E_LA57_BASE : MM_PXE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status);
return Status;
}
/* Check the configured page map level to set the LA57 state accordingly */
if(PageMap->PageMapLevel == 5)
{
@@ -173,6 +198,7 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
PHARDWARE_PTE P5eBase, PdeBase, PpeBase, PxeBase;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
ULONG Index;
if(PageMap->PageMapLevel == 5)
{
@@ -190,6 +216,9 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status;
}
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by P5E */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -224,6 +253,9 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status;
}
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PXE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -252,6 +284,9 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status;
}
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PPE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -270,7 +305,7 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
}
/* Loop through 2 PDE entries */
for(UINT Index = 0 ; Index < 2 ; Index++)
for(Index = 0 ; Index < 2 ; Index++)
{
/* Check if PDE entry already exists */
if(!PdeBase[((MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF) + Index].Valid)
@@ -283,6 +318,9 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status;
}
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PDE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);

View File

@@ -9,6 +9,62 @@
#include <xtos.hh>
XTCDECL
EFI_STATUS
Xtos::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
ULONG_PTR SelfMapAddress;
EFI_STATUS Status;
/* Initialize self map address */
if(PageMap->PageMapLevel == 3)
{
/* For PML3 (PAE) use PTE base address */
SelfMapAddress = MM_PTE_BASE;
}
else
{
/* For PML2 (PAE disabled) use legacy PDE base address */
SelfMapAddress = MM_PDE_LEGACY_BASE;
}
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, SelfMapAddress);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware layer (Status code: %zX)\n", Status);
return Status;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Determines the appropriate EFI memory mapping strategy for the i686 architecture.
*
* @return This routine returns FALSE, what results in a sequential mapping.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
Xtos::DetermineMappingStrategy()
{
/* Use a sequential mapping strategy */
return FALSE;
}
/**
* Determines the appropriate paging level (PML) for the i686 architecture.
*
@@ -60,24 +116,6 @@ Xtos::EnablePaging(IN PXTBL_PAGE_MAPPING PageMap)
{
EFI_STATUS Status;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, MM_PTE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware layer (Status code: %zX)\n", Status);
return Status;
}
/* Exit EFI Boot Services */
XtLdrProtocol->Debug.Print(L"Exiting EFI boot services\n");
Status = XtLdrProtocol->Utils.ExitBootServices();
@@ -145,6 +183,9 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
/* Zero fill allocated memory */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Check if PAE is enabled (3-level paging) */
if(PageMap->PageMapLevel == 3)
{

View File

@@ -38,7 +38,9 @@ class Xtos
IN PVOID PhysicalAddress,
IN UINT NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType);
STATIC XTCDECL EFI_STATUS BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL LOADER_MEMORY_TYPE ConvertEfiMemoryType(IN EFI_MEMORY_TYPE EfiMemoryType);
STATIC XTCDECL BOOLEAN DetermineMappingStrategy();
STATIC XTCDECL ULONG DeterminePagingLevel(IN CONST PWCHAR Parameters);
STATIC XTCDECL EFI_STATUS EnablePaging(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL VOID GetDisplayInformation(OUT PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource,
@@ -46,10 +48,13 @@ class Xtos
IN PULONG_PTR FrameBufferSize,
IN PXTBL_FRAMEBUFFER_MODE_INFORMATION FrameBufferModeInfo);
STATIC XTCDECL EFI_STATUS GetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
IN PVOID *VirtualAddress,
IN EFI_PHYSICAL_ADDRESS PhysicalBase,
IN PVOID VirtualBase,
OUT PLIST_ENTRY MemoryDescriptorList);
STATIC XTCDECL EFI_STATUS GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
IN PVOID *VirtualAddress,
IN EFI_PHYSICAL_ADDRESS PhysicalBase,
IN PVOID VirtualBase,
IN PVOID FrameBufferVirtualBase,
OUT PLIST_ENTRY SystemResourcesList);
STATIC XTCDECL EFI_STATUS GetVirtualAddress(IN PLIST_ENTRY MemoryMappings,
IN PVOID PhysicalAddress,

View File

@@ -191,56 +191,52 @@ Xtos::GetDisplayInformation(OUT PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource
XTCDECL
EFI_STATUS
Xtos::GetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
IN PVOID *VirtualAddress,
IN EFI_PHYSICAL_ADDRESS PhysicalBase,
IN PVOID VirtualBase,
OUT PLIST_ENTRY MemoryDescriptorList)
{
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
ULONGLONG Pages;
Pages = (ULONGLONG)EFI_SIZE_TO_PAGES((PageMap->MapSize + 1) * sizeof(LOADER_MEMORY_DESCRIPTOR));
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, Pages, &Address);
if(Status != STATUS_EFI_SUCCESS)
{
return Status;
}
Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)Address, Pages, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Memory.FreePages(Address, Pages);
return Status;
}
PVOID PhysicalBase = (PVOID)Address;
PLOADER_MEMORY_DESCRIPTOR Descriptor;
PXTBL_MEMORY_MAPPING MemoryMapping;
PLIST_ENTRY ListEntry;
/* Initialize the descriptor pointer to the start of the allocated physical buffer */
Descriptor = (PLOADER_MEMORY_DESCRIPTOR)PhysicalBase;
/* Get the first entry from the internal boot loader memory map */
ListEntry = PageMap->MemoryMap.Flink;
/* Iterate through the internal memory map and populate the loader descriptor list */
while(ListEntry != &PageMap->MemoryMap)
{
PXTBL_MEMORY_MAPPING MemoryMapping = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
PLOADER_MEMORY_DESCRIPTOR MemoryDescriptor = (PLOADER_MEMORY_DESCRIPTOR)Address;
/* Retrieve the internal memory mapping record from the current list entry */
MemoryMapping = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
MemoryDescriptor->MemoryType = MemoryMapping->MemoryType;
MemoryDescriptor->BasePage = (UINT_PTR)MemoryMapping->PhysicalAddress / EFI_PAGE_SIZE;
MemoryDescriptor->PageCount = MemoryMapping->NumberOfPages;
/* Transfer memory type and address information to the kernel descriptor */
Descriptor->MemoryType = MemoryMapping->MemoryType;
Descriptor->BasePage = (UINT_PTR)(MemoryMapping->PhysicalAddress / EFI_PAGE_SIZE);
Descriptor->PageCount = (ULONG)MemoryMapping->NumberOfPages;
XtLdrProtocol->LinkedList.InsertTail(MemoryDescriptorList, &MemoryDescriptor->ListEntry);
/* Link the entry */
XtLdrProtocol->LinkedList.InsertTail(MemoryDescriptorList, &Descriptor->ListEntry);
Address = Address + sizeof(LOADER_MEMORY_DESCRIPTOR);
/* Move to the next slot in the allocated buffer */
Descriptor++;
ListEntry = ListEntry->Flink;
}
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, MemoryDescriptorList, PhysicalBase, *VirtualAddress);
/* Convert all physical link pointers in the list to their corresponding virtual addresses */
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, MemoryDescriptorList, (PVOID)PhysicalBase, VirtualBase);
/* Return success */
return STATUS_EFI_SUCCESS;
}
XTCDECL
EFI_STATUS
Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
IN PVOID *VirtualAddress,
IN EFI_PHYSICAL_ADDRESS PhysicalBase,
IN PVOID VirtualBase,
IN PVOID FrameBufferVirtualBase,
OUT PLIST_ENTRY SystemResourcesList)
{
XTSTATUS Status;
@@ -251,39 +247,18 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo;
EFI_PHYSICAL_ADDRESS FbAddress;
EFI_PHYSICAL_ADDRESS OriginalPhysicalBase;
ULONG_PTR FbSize;
UINT FrameBufferPages;
PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource;
PSYSTEM_RESOURCE_ACPI AcpiResource;
ULONGLONG Pages;
EFI_PHYSICAL_ADDRESS Address;
PVOID PhysicalBase, VirtualBase;
Pages = (ULONGLONG)EFI_SIZE_TO_PAGES(sizeof(SYSTEM_RESOURCE_ACPI) + sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, Pages, &Address);
if(Status != STATUS_EFI_SUCCESS)
{
return Status;
}
Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)Address, Pages, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Memory.FreePages(Address, Pages);
return Status;
}
PhysicalBase = (PVOID)Address;
VirtualBase = *VirtualAddress;
/* Calculate next valid virtual address */
*VirtualAddress = (PUINT8)*VirtualAddress + (Pages * EFI_PAGE_SIZE);
AcpiResource = (PSYSTEM_RESOURCE_ACPI)Address;
/* Save original physical base */
OriginalPhysicalBase = PhysicalBase;
AcpiResource = (PSYSTEM_RESOURCE_ACPI)PhysicalBase;
XtLdrProtocol->Memory.ZeroMemory(AcpiResource, sizeof(SYSTEM_RESOURCE_ACPI));
/* Load FrameBuffer protocol */
/* Load ACPI protocol */
Status = XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&AcpiProtocol, &AcpiGuid);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -302,13 +277,11 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
XtLdrProtocol->LinkedList.InsertTail(SystemResourcesList, &AcpiResource->Header.ListEntry);
/* Close FrameBuffer protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
Address = Address + sizeof(SYSTEM_RESOURCE_ACPI);
FrameBufferResource = (PSYSTEM_RESOURCE_FRAMEBUFFER)Address;
/* Close ACPI protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &AcpiGuid);
PhysicalBase = PhysicalBase + sizeof(SYSTEM_RESOURCE_ACPI);
FrameBufferResource = (PSYSTEM_RESOURCE_FRAMEBUFFER)PhysicalBase;
XtLdrProtocol->Memory.ZeroMemory(FrameBufferResource, sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
/* Load FrameBuffer protocol */
@@ -329,26 +302,16 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Calculate pages needed to map framebuffer */
FrameBufferPages = EFI_SIZE_TO_PAGES(FbSize);
/* Rewrite framebuffer address by using virtual address */
FrameBufferResource->Header.VirtualAddress = *VirtualAddress;
/* Map frame buffer memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, FrameBufferResource->Header.VirtualAddress,
FrameBufferResource->Header.PhysicalAddress,
FrameBufferPages, LoaderFirmwarePermanent);
/* Close FrameBuffer protocol */
/* Assign the pre-mapped virtual address to the resource block */
FrameBufferResource->Header.VirtualAddress = FrameBufferVirtualBase;
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
*VirtualAddress = (PUINT8)*VirtualAddress + (FrameBufferPages * EFI_PAGE_SIZE);
XtLdrProtocol->LinkedList.InsertTail(SystemResourcesList, &FrameBufferResource->Header.ListEntry);
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, SystemResourcesList, PhysicalBase, VirtualBase);
/* Convert list pointers to virtual */
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, SystemResourcesList, (PVOID)OriginalPhysicalBase, VirtualBase);
/* Return success */
return STATUS_EFI_SUCCESS;
}
@@ -389,7 +352,7 @@ Xtos::InitializeApicBase(IN PXTBL_PAGE_MAPPING PageMap)
}
/* Map APIC base address */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (PVOID)APIC_BASE, ApicBaseAddress, 1, LoaderFirmwarePermanent);
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, APIC_BASE, (ULONGLONG)ApicBaseAddress, 1, LoaderFirmwarePermanent);
return STATUS_EFI_SUCCESS;
}
@@ -409,34 +372,100 @@ Xtos::InitializeApicBase(IN PXTBL_PAGE_MAPPING PageMap)
XTCDECL
EFI_STATUS
Xtos::InitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
IN PVOID *VirtualAddress,
IN OUT PVOID *VirtualAddress,
IN PXTBL_BOOT_PARAMETERS Parameters)
{
EFI_PHYSICAL_ADDRESS FbPhysicalAddress, PhysicalBlock, PhysicalDescriptor, PhysicalResources;
PVOID FbVirtualAddress, VirtualBlock, VirtualResources, VirtualDescriptor;
UINT BlockPages, DescriptorPages, FbPages, ParametersSize, ResourcesPages;
XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo;
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
PKERNEL_INITIALIZATION_BLOCK LoaderBlock;
EFI_PHYSICAL_ADDRESS Address;
EFI_HANDLE ProtocolHandle;
EFI_STATUS Status;
UINT BlockPages;
UINT ParametersSize;
ULONG_PTR FbSize;
EFI_GUID FrameBufGuid = XT_FRAMEBUFFER_PROTOCOL_GUID;
/* Initialize Framebuffer information */
FbPhysicalAddress = 0;
FbSize = 0;
FbVirtualAddress = NULLPTR;
FbPages = 0;
/* Calculate size of parameters */
ParametersSize = (XtLdrProtocol->WideString.Length(Parameters->Parameters, 0) + 1) * sizeof(WCHAR);
/* Calculate number of pages needed for initialization block */
BlockPages = EFI_SIZE_TO_PAGES(sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
ResourcesPages = EFI_SIZE_TO_PAGES(sizeof(SYSTEM_RESOURCE_ACPI) + sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
/* Allocate memory for kernel initialization block */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, BlockPages, &Address);
/* Query Framebuffer size for allocation */
if(XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&FrameBufProtocol, &FrameBufGuid) == STATUS_EFI_SUCCESS)
{
/* Get FrameBuffer information */
FrameBufProtocol->GetDisplayInformation(&FbPhysicalAddress, &FbSize, &FbModeInfo);
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
}
FbPages = EFI_SIZE_TO_PAGES(FbSize);
/* Precommit page map to allocate memory */
XtLdrProtocol->Memory.CommitPageMap(PageMap);
/* Calculate number of pages needed for memory descriptor list */
DescriptorPages = EFI_SIZE_TO_PAGES(PageMap->MapSize * sizeof(LOADER_MEMORY_DESCRIPTOR) * 2);
/* Allocate memory for the kernel initialization block and boot parameters */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, BlockPages, &PhysicalBlock);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure */
/* Memory allocation failure, return status code */
return Status;
}
/* Initialize and zero-fill kernel initialization block */
LoaderBlock = (PKERNEL_INITIALIZATION_BLOCK)(UINT_PTR)Address;
XtLdrProtocol->Memory.ZeroMemory(LoaderBlock, sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
/* Allocate memory for the system resources data structures */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, ResourcesPages, &PhysicalResources);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return status code */
return Status;
}
/* Allocate memory for the memory descriptor list */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, DescriptorPages, &PhysicalDescriptor);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return status code */
return Status;
}
/* Map the Kernel Initialization Block into virtual memory and advance the virtual address pointer */
VirtualBlock = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualBlock, PhysicalBlock, BlockPages, LoaderSystemBlock);
*VirtualAddress = (PUINT8)*VirtualAddress + (BlockPages * EFI_PAGE_SIZE);
/* Map the system resources physical memory into virtual address space and update the allocation pointer */
VirtualResources = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualResources, PhysicalResources, ResourcesPages, LoaderFirmwarePermanent);
*VirtualAddress = (PUINT8)*VirtualAddress + (ResourcesPages * EFI_PAGE_SIZE);
/* Check if a framebuffer was detected and requires memory mapping */
if(FbPages > 0)
{
/* Map the framebuffer physical memory range into virtual address space */
FbVirtualAddress = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)FbVirtualAddress, FbPhysicalAddress, FbPages, LoaderFirmwarePermanent);
*VirtualAddress = (PUINT8)*VirtualAddress + (FbPages * EFI_PAGE_SIZE);
}
/* Map the allocated physical memory for memory descriptors into the virtual address space */
VirtualDescriptor = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualDescriptor, PhysicalDescriptor, DescriptorPages, LoaderMemoryData);
*VirtualAddress = (PUINT8)*VirtualAddress + (DescriptorPages * EFI_PAGE_SIZE);
/* Set basic loader block properties */
XtLdrProtocol->Memory.ZeroMemory((PVOID)PhysicalBlock, sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
LoaderBlock = (PKERNEL_INITIALIZATION_BLOCK)PhysicalBlock;
LoaderBlock->BlockSize = sizeof(KERNEL_INITIALIZATION_BLOCK);
LoaderBlock->BlockVersion = INITIALIZATION_BLOCK_VERSION;
LoaderBlock->ProtocolVersion = BOOT_PROTOCOL_VERSION;
@@ -450,24 +479,33 @@ Xtos::InitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
LoaderBlock->FirmwareInformation.EfiFirmware.EfiRuntimeServices = NULLPTR;
/* Copy parameters to kernel initialization block */
LoaderBlock->KernelParameters = (PWCHAR)((UINT_PTR)*VirtualAddress + sizeof(KERNEL_INITIALIZATION_BLOCK));
LoaderBlock->KernelParameters = (PWCHAR)((UINT_PTR)VirtualBlock + sizeof(KERNEL_INITIALIZATION_BLOCK));
XtLdrProtocol->Memory.CopyMemory((PVOID)((UINT_PTR)LoaderBlock + sizeof(KERNEL_INITIALIZATION_BLOCK)),
Parameters->Parameters,
ParametersSize);
Parameters->Parameters, ParametersSize);
/* Map kernel initialization block */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)LoaderBlock,
BlockPages, LoaderSystemBlock);
/* Calculate next valid virtual address */
*VirtualAddress = (PUINT8)*VirtualAddress + (BlockPages * EFI_PAGE_SIZE);
/* Commit mappings */
XtLdrProtocol->Memory.CommitPageMap(PageMap);
/* Initialize system resources list */
XtLdrProtocol->LinkedList.InitializeHead(&LoaderBlock->SystemResourcesListHead);
GetSystemResourcesList(PageMap, VirtualAddress, &LoaderBlock->SystemResourcesListHead);
Status = GetSystemResourcesList(PageMap, PhysicalResources, VirtualResources, FbVirtualAddress, &LoaderBlock->SystemResourcesListHead);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to initialize system resources list, return status code */
return Status;
}
/* Initialize memory descriptor list */
XtLdrProtocol->LinkedList.InitializeHead(&LoaderBlock->MemoryDescriptorListHead);
GetMemoryDescriptorList(PageMap, VirtualAddress, &LoaderBlock->MemoryDescriptorListHead);
Status = GetMemoryDescriptorList(PageMap, PhysicalDescriptor, VirtualDescriptor, &LoaderBlock->MemoryDescriptorListHead);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to initialize memory descriptor list, return status code */
return Status;
}
/* Set boot image size */
LoaderBlock->BootImageSize = (PFN_NUMBER)(((ULONGLONG)*VirtualAddress - KSEG0_BASE) / EFI_PAGE_SIZE);
/* Return success */
return STATUS_EFI_SUCCESS;
@@ -607,11 +645,12 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
PPECOFF_IMAGE_CONTEXT ImageContext = NULLPTR;
PEFI_LOADED_IMAGE_PROTOCOL ImageProtocol;
PVOID VirtualAddress, VirtualMemoryArea;
PVOID VirtualAddress;
PXT_ENTRY_POINT KernelEntryPoint;
EFI_HANDLE ProtocolHandle;
EFI_STATUS Status;
XTBL_PAGE_MAPPING PageMap;
BOOLEAN IdentityMapping;
/* Initialize XTOS startup sequence */
XtLdrProtocol->Debug.Print(L"Initializing XTOS startup sequence\n");
@@ -628,19 +667,30 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
/* Close FrameBuffer protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
/* Determine whether to use a sequential or an identity mapping strategy */
IdentityMapping = DetermineMappingStrategy();
/* Set base virtual memory area for the kernel mappings */
VirtualMemoryArea = (PVOID)KSEG0_BASE;
VirtualAddress = (PVOID)(KSEG0_BASE + KSEG0_KERNEL_BASE);
VirtualAddress = (PVOID)(KSEG0_BASE);
/* Initialize virtual memory mappings */
XtLdrProtocol->Memory.InitializePageMap(&PageMap, DeterminePagingLevel(Parameters->Parameters), Size4K);
Status = XtLdrProtocol->Memory.MapEfiMemory(&PageMap, &VirtualMemoryArea, NULLPTR);
/* Map all EFI memory regions */
Status = XtLdrProtocol->Memory.MapEfiMemory(&PageMap, &VirtualAddress, IdentityMapping, NULLPTR);
if(Status != STATUS_EFI_SUCCESS)
{
/* Mapping failed */
return Status;
}
/* Check mapping strategy */
if(IdentityMapping)
{
/* Adjust virtual address to skip the identity-mapped physical range */
VirtualAddress = (PVOID)((ULONGLONG)VirtualAddress + 0x800000000);
}
/* Load the kernel */
Status = LoadModule(BootDir, Parameters->KernelFile, VirtualAddress, LoaderSystemCode, &ImageContext);
if(Status != STATUS_EFI_SUCCESS)
@@ -650,8 +700,8 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
}
/* Add kernel image memory mapping */
Status = XtLdrProtocol->Memory.MapVirtualMemory(&PageMap, ImageContext->VirtualAddress,
ImageContext->PhysicalAddress, ImageContext->ImagePages,
Status = XtLdrProtocol->Memory.MapVirtualMemory(&PageMap, (ULONGLONG)ImageContext->VirtualAddress,
(ULONGLONG)ImageContext->PhysicalAddress, ImageContext->ImagePages,
LoaderSystemCode);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -670,6 +720,14 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
return Status;
}
/* Build page map */
Status = BuildPageMap(&PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Store virtual address of kernel initialization block for future kernel call */
KernelParameters = (PKERNEL_INITIALIZATION_BLOCK)VirtualAddress;

View File

@@ -1054,6 +1054,7 @@ Protocol::InstallXtLoaderProtocol()
LoaderProtocol.Memory.AllocatePages = Memory::AllocatePages;
LoaderProtocol.Memory.AllocatePool = Memory::AllocatePool;
LoaderProtocol.Memory.BuildPageMap = Memory::BuildPageMap;
LoaderProtocol.Memory.CommitPageMap = Memory::CommitPageMap;
LoaderProtocol.Memory.CompareMemory = RTL::Memory::CompareMemory;
LoaderProtocol.Memory.CopyMemory = RTL::Memory::CopyMemory;
LoaderProtocol.Memory.FreePages = Memory::FreePages;

View File

@@ -236,6 +236,15 @@ BlStartXtLoader(IN EFI_HANDLE ImageHandle,
PWCHAR Modules;
EFI_STATUS Status;
/* Check if system is EFI-based and provided parameters are valid */
if(ImageHandle == NULLPTR || SystemTable == NULLPTR)
{
/* Invalid parameters, print error message using BIOS calls and hang */
BiosUtils::ClearScreen();
BiosUtils::Print(L"XTLDR requires EFI-based system!");
for(;;);
}
/* Initialize XTLDR and */
XtLoader::InitializeBootLoader(ImageHandle, SystemTable);

View File

@@ -4,48 +4,41 @@
# DESCRIPTION: Project configuration script for preparing the build environment
# DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
# Check XTchain
if (-not $env:XTCVER) {
Write-Host "XTChain not detected or corrupted!"
Write-Error "XTChain not detected or corrupted!"
exit 1
}
# Set target architecture
if ($env:TARGET) {
$ARCH = $env:TARGET
} else {
$ARCH = "amd64"
}
# Set target architecture defaulting to amd64
$ARCH = if ($env:TARGET) { $env:TARGET } else { "amd64" }
# Set target build type
if (-not $env:BUILD_TYPE) {
$env:BUILD_TYPE = "DEBUG"
}
# Set target build type defaulting to Debug
$env:BUILD_TYPE = if ($env:BUILD_TYPE -in @("Debug", "Release")) { $env:BUILD_TYPE } else { "Debug" }
# Set variables
$EXECTOS_SOURCE_DIR = (Get-Location).Path
$EXECTOS_BINARY_DIR = "build-$($ARCH)-$($env:BUILD_TYPE.ToLower())"
$EXECTOS_SOURCE_DIR = $PSScriptRoot
$EXECTOS_BINARY_DIR = Join-Path $EXECTOS_SOURCE_DIR "build-$ARCH-$($env:BUILD_TYPE.ToLower())"
# Create directories if needed
if ($EXECTOS_SOURCE_DIR -eq (Get-Location).Path) {
Write-Host "Creating directories in $EXECTOS_BINARY_DIR"
# Create build directory
if (-not (Test-Path $EXECTOS_BINARY_DIR)) {
Write-Host "Creating build directory: $EXECTOS_BINARY_DIR"
New-Item -ItemType Directory -Path $EXECTOS_BINARY_DIR -Force | Out-Null
Set-Location -Path $EXECTOS_BINARY_DIR
}
Set-Location $EXECTOS_BINARY_DIR
# Delete old cache
Remove-Item -Path "CMakeCache.txt" -ErrorAction SilentlyContinue
Remove-Item -Path "host-tools/CMakeCache.txt" -ErrorAction SilentlyContinue
Remove-Item "CMakeCache.txt", "host-tools/CMakeCache.txt" -ErrorAction SilentlyContinue
# Configure project using CMake
& cmake -G Ninja -DARCH:STRING=$($ARCH) -DBUILD_TYPE:STRING=$($env:BUILD_TYPE) $EXECTOS_SOURCE_DIR
& cmake -G Ninja "-DARCH:STRING=$ARCH" "-DBUILD_TYPE:STRING=$($env:BUILD_TYPE)" $EXECTOS_SOURCE_DIR
# Check if configuration succeeded
if ($LASTEXITCODE -ne 0) {
Write-Host "Configure script failed."
Write-Error "Configure script failed."
exit 1
} else {
"$($ARCH)" | Out-File -Encoding ASCII -NoNewline build.arch
Write-Host "Configure script completed. Enter '$EXECTOS_BINARY_DIR' directory and execute 'xbuild' to build ExectOS."
}
$ARCH | Out-File -Encoding ASCII -NoNewline "build.arch"
Write-Host "Configure completed. Run 'xbuild' to build ExectOS."

View File

@@ -1 +1,3 @@
add_subdirectory("xtadk")
set_sdk_target("xtdk/" "include")

View File

@@ -1,2 +1,3 @@
# Set base addresses for all modules
set(BASEADDRESS_XTLDR 0x000000000000F800)
set(BASEADDRESS_XTOSKRNL 0x0000000140000000)

View File

@@ -1,2 +1,3 @@
# Set base addresses for all modules
set(BASEADDRESS_XTLDR 0x0000F800)
set(BASEADDRESS_XTOSKRNL 0x00400000)

View File

@@ -23,36 +23,57 @@ endif()
find_program(QEMU_EMULATOR ${QEMU_COMMAND})
if(QEMU_EMULATOR)
if(CMAKE_HOST_LINUX)
# This target starts up a QEMU+OVMF virtual machine using KVM accelerator
add_custom_target(testefikvm
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-KVM" -machine type=q35,kernel_irqchip=on,accel="kvm:whpx",mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-KVM" -machine type=q35,kernel_irqchip=on,accel=kvm,mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_code_${ARCH}.fd,if=pflash,format=raw,unit=0,readonly=on
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_vars_${ARCH}.fd,if=pflash,format=raw,unit=1
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
elseif(CMAKE_HOST_WIN32)
# This target starts up a QEMU+OVMF virtual machine using WHPX accelerator
add_custom_target(testefiwhpx
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-WHPX" -machine type=q35,kernel_irqchip=off,accel=whpx,mem-merge=off,vmport=off
-m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
endif()
# This target starts up a QEMU+OVMF virtual machine using TCG accelerator
add_custom_target(testefitcg
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-TCG" -machine type=q35,accel=tcg -cpu max,-hypervisor
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_code_${ARCH}.fd,if=pflash,format=raw,unit=0,readonly=on
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_vars_${ARCH}.fd,if=pflash,format=raw,unit=1
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
if(CMAKE_HOST_LINUX)
# This target starts up a QEMU+SEABIOS virtual machine using KVM accelerator
add_custom_target(testkvm
DEPENDS diskimg
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-KVM" -machine type=q35,kernel_irqchip=on,accel="kvm:whpx",mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-KVM" -machine type=q35,kernel_irqchip=on,accel=kvm,mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-hda ${EXECTOS_BINARY_DIR}/output/disk.img
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
elseif(CMAKE_HOST_WIN32)
# This target starts up a QEMU+SEABIOS virtual machine using WHPX accelerator
add_custom_target(testwhpx
DEPENDS diskimg
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-WHPX" -machine type=q35,kernel_irqchip=off,accel=whpx,mem-merge=off,vmport=off
-m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-hda ${EXECTOS_BINARY_DIR}/output/disk.img
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
endif()
# This target starts up a QEMU+SEABIOS virtual machine using TCG accelerator
add_custom_target(testtcg

View File

@@ -59,16 +59,103 @@ function(add_module_linker_flags MODULE FLAGS)
set_module_property(${MODULE} LINK_FLAGS ${FLAGS})
endfunction()
# This function compiles XT Assembly Development Kit
function(generate_xtadk TARGET_NAME SOURCE_FILES)
# Define the absolute destination path for the generated header file
set(HEADER_OUTPUT "${EXECTOS_BINARY_DIR}/sdk/includes/${TARGET_NAME}.h")
get_filename_component(HEADER_OUTPUT_DIRECTORY "${HEADER_OUTPUT}" DIRECTORY)
# Tokenize global CXX flags into a list to ensure correct argument expansion
separate_arguments(COMPILER_FLAGS NATIVE_COMMAND "${CMAKE_CXX_FLAGS}")
# Resolve and tokenize build-configuration specific flags
string(TOUPPER "${CMAKE_BUILD_TYPE}" BUILD_TYPE)
if(BUILD_TYPE)
separate_arguments(BUILD_TYPE_SPECIFIC_FLAGS NATIVE_COMMAND "${CMAKE_CXX_FLAGS_${BUILD_TYPE}}")
endif()
# Retrieve compiler definitions, include paths, and options
get_directory_property(COMPILE_DEFINITIONS COMPILE_DEFINITIONS)
get_directory_property(INCLUDE_DIRECTORIES INCLUDE_DIRECTORIES)
get_directory_property(COMPILE_OPTIONS COMPILE_OPTIONS)
# Initialize the final compiler argument list
set(COMPILER_ARGUMENTS "")
list(APPEND COMPILER_ARGUMENTS ${COMPILER_FLAGS} ${BUILD_TYPE_SPECIFIC_FLAGS})
# Transform definitions into MSVC-style
foreach(DEFINITION ${COMPILE_DEFINITIONS})
list(APPEND COMPILER_ARGUMENTS "/D${DEFINITION}")
endforeach()
# Transform include paths into MSVC-style
foreach(INCLUDE_PATH ${INCLUDE_DIRECTORIES})
list(APPEND COMPILER_ARGUMENTS "/I${INCLUDE_PATH}")
endforeach()
# Append all supplemental compiler options
list(APPEND COMPILER_ARGUMENTS ${COMPILE_OPTIONS})
set(COLLECTED_ASSEMBLY_OUTPUTS "")
# Iterate through each source file to create individual assembly generation rules
foreach(SOURCE_FILE_PATH ${SOURCE_FILES})
# Extract the base filename
get_filename_component(FILENAME_WITHOUT_EXTENSION "${SOURCE_FILE_PATH}" NAME_WE)
# Define the unique output path for the intermediate assembly file
set(CURRENT_ASSEMBLY_OUTPUT "${CMAKE_CURRENT_BINARY_DIR}/${FILENAME_WITHOUT_EXTENSION}.S")
list(APPEND COLLECTED_ASSEMBLY_OUTPUTS "${CURRENT_ASSEMBLY_OUTPUT}")
get_filename_component(CURRENT_ASSEMBLY_DIRECTORY "${CURRENT_ASSEMBLY_OUTPUT}" DIRECTORY)
# Execute the compiler to generate assembly code
add_custom_command(
OUTPUT "${CURRENT_ASSEMBLY_OUTPUT}"
COMMAND ${CMAKE_COMMAND} -E make_directory "${CURRENT_ASSEMBLY_DIRECTORY}"
COMMAND ${CMAKE_CXX_COMPILER}
${COMPILER_ARGUMENTS}
/c /FAs /Fa${CURRENT_ASSEMBLY_OUTPUT}
-- ${SOURCE_FILE_PATH}
DEPENDS "${SOURCE_FILE_PATH}"
COMMENT "Generating XTADK Assembly: ${FILENAME_WITHOUT_EXTENSION}"
VERBATIM
COMMAND_EXPAND_LISTS
)
endforeach()
# Aggregate all generated assembly units into a single consolidated XTADK header
add_custom_command(
OUTPUT "${HEADER_OUTPUT}"
COMMAND ${CMAKE_COMMAND} -E make_directory "${HEADER_OUTPUT_DIRECTORY}"
COMMAND xtadkgen ${COLLECTED_ASSEMBLY_OUTPUTS} -O "${HEADER_OUTPUT}"
DEPENDS ${COLLECTED_ASSEMBLY_OUTPUTS}
COMMENT "Generating XTADK header: ${TARGET_NAME}"
VERBATIM
)
# Establish the generation target and expose the header directory via an interface library
add_custom_target(${TARGET_NAME}_gen DEPENDS "${HEADER_OUTPUT}")
add_library(${TARGET_NAME} INTERFACE)
add_dependencies(${TARGET_NAME} ${TARGET_NAME}_gen)
target_include_directories(${TARGET_NAME} INTERFACE "${EXECTOS_BINARY_DIR}/sdk/includes")
endfunction()
# This function compiles an assembly bootsector file into a flat binary
function(compile_bootsector NAME SOURCE BASEADDR ENTRYPOINT)
set(BINARY_NAME "${NAME}.bin")
set(OBJECT_NAME "${NAME}.obj")
get_directory_property(DEFS COMPILE_DEFINITIONS)
foreach(def ${DEFS})
list(APPEND ASM_DEFS "-D${def}")
endforeach()
add_custom_command(
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${BINARY_NAME}
COMMAND ${CMAKE_ASM_COMPILER}
/nologo
--target=i386-none-elf
${ASM_DEFS}
-I${CMAKE_CURRENT_SOURCE_DIR}
/Fo${CMAKE_CURRENT_BINARY_DIR}/${OBJECT_NAME}
-c -- ${SOURCE}
COMMAND ${CMAKE_ASM_LINKER}

View File

@@ -13,6 +13,10 @@ The ovmf_vars files, store UEFI variables, which are used to store and retrieve
boot options, device settings, and system preferences. The ovmf_vars file contains the persistent variables specific to
a virtual machine, allowing it to maintain its configuration across multiple boot sessions.
## BOCHS ROM BIOS
The rombios.bin file contains the ROM BIOS image for Bochs. This image is distributed under the GNU Lesser General Public
License (LGPL).
## Video BIOS (LGPL'd VGABios)
The vgabios.bin file contains the Video Bios for Bochs and QEMU. This VGA Bios is very specific to the emulated VGA card.
It is NOT meant to drive a physical vga card. It also implements support for VBE version 2.0.

Binary file not shown.

Binary file not shown.

14
sdk/xtadk/CMakeLists.txt Normal file
View File

@@ -0,0 +1,14 @@
# XT Assembly Development Kit
PROJECT(XTADK)
# Specify include directories
include_directories(
${EXECTOS_SOURCE_DIR}/sdk/xtdk
${XTADK_SOURCE_DIR}/includes)
# Specify list of XTADK source code files
list(APPEND XTADK_SOURCE
${XTADK_SOURCE_DIR}/${ARCH}/ke.cc)
# Generate assembly header from XTADK sources
generate_xtadk(xtadk "${XTADK_SOURCE}")

83
sdk/xtadk/amd64/ke.cc Normal file
View File

@@ -0,0 +1,83 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/amd64/ke.cc
* DESCRIPTION: ADK generator for AMD64 version of Kernel Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtkmapi.h>
#include <adkdefs.h>
/**
* Generates a definitions file for the Kernel Library used by the XTOS kernel assembly code
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
GenerateAssemblyDefinitions(VOID)
{
/* Generate KTRAP_FRAME offsets */
ADK_OFFSET(KTRAP_FRAME, Xmm0);
ADK_OFFSET(KTRAP_FRAME, Xmm1);
ADK_OFFSET(KTRAP_FRAME, Xmm2);
ADK_OFFSET(KTRAP_FRAME, Xmm3);
ADK_OFFSET(KTRAP_FRAME, Xmm4);
ADK_OFFSET(KTRAP_FRAME, Xmm5);
ADK_OFFSET(KTRAP_FRAME, Xmm6);
ADK_OFFSET(KTRAP_FRAME, Xmm7);
ADK_OFFSET(KTRAP_FRAME, Xmm8);
ADK_OFFSET(KTRAP_FRAME, Xmm9);
ADK_OFFSET(KTRAP_FRAME, Xmm10);
ADK_OFFSET(KTRAP_FRAME, Xmm11);
ADK_OFFSET(KTRAP_FRAME, Xmm12);
ADK_OFFSET(KTRAP_FRAME, Xmm13);
ADK_OFFSET(KTRAP_FRAME, Xmm14);
ADK_OFFSET(KTRAP_FRAME, Xmm15);
ADK_OFFSET(KTRAP_FRAME, MxCsr);
ADK_OFFSET(KTRAP_FRAME, PreviousMode);
ADK_OFFSET(KTRAP_FRAME, Cr2);
ADK_OFFSET(KTRAP_FRAME, Cr3);
ADK_OFFSET(KTRAP_FRAME, Dr0);
ADK_OFFSET(KTRAP_FRAME, Dr1);
ADK_OFFSET(KTRAP_FRAME, Dr2);
ADK_OFFSET(KTRAP_FRAME, Dr3);
ADK_OFFSET(KTRAP_FRAME, Dr6);
ADK_OFFSET(KTRAP_FRAME, Dr7);
ADK_OFFSET(KTRAP_FRAME, SegDs);
ADK_OFFSET(KTRAP_FRAME, SegEs);
ADK_OFFSET(KTRAP_FRAME, SegFs);
ADK_OFFSET(KTRAP_FRAME, SegGs);
ADK_OFFSET(KTRAP_FRAME, Rax);
ADK_OFFSET(KTRAP_FRAME, Rbx);
ADK_OFFSET(KTRAP_FRAME, Rcx);
ADK_OFFSET(KTRAP_FRAME, Rdx);
ADK_OFFSET(KTRAP_FRAME, R8);
ADK_OFFSET(KTRAP_FRAME, R9);
ADK_OFFSET(KTRAP_FRAME, R10);
ADK_OFFSET(KTRAP_FRAME, R11);
ADK_OFFSET(KTRAP_FRAME, R12);
ADK_OFFSET(KTRAP_FRAME, R13);
ADK_OFFSET(KTRAP_FRAME, R14);
ADK_OFFSET(KTRAP_FRAME, R15);
ADK_OFFSET(KTRAP_FRAME, Rsi);
ADK_OFFSET(KTRAP_FRAME, Rdi);
ADK_OFFSET(KTRAP_FRAME, Rbp);
ADK_OFFSET(KTRAP_FRAME, Vector);
ADK_OFFSET(KTRAP_FRAME, ErrorCode);
ADK_OFFSET(KTRAP_FRAME, ExceptionFrame);
ADK_OFFSET(KTRAP_FRAME, Rip);
ADK_OFFSET(KTRAP_FRAME, SegCs);
ADK_OFFSET(KTRAP_FRAME, Flags);
ADK_OFFSET(KTRAP_FRAME, Rsp);
ADK_OFFSET(KTRAP_FRAME, SegSs);
/* Generate KTRAP_FRAME size and REGISTERS_SIZE */
ADK_SIZE(KTRAP_FRAME);
ADK_SIZE_FROM(REGISTERS_SIZE, KTRAP_FRAME, Rax);
}

57
sdk/xtadk/i686/ke.cc Normal file
View File

@@ -0,0 +1,57 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/i686/ke.cc
* DESCRIPTION: ADK generator for i686 version of Kernel Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtkmapi.h>
#include <adkdefs.h>
/**
* Generates a definitions file for the Kernel Library used by the XTOS kernel assembly code
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
GenerateAssemblyDefinitions(VOID)
{
/* Generate KTRAP_FRAME offsets */
ADK_OFFSET(KTRAP_FRAME, PreviousMode);
ADK_OFFSET(KTRAP_FRAME, Cr2);
ADK_OFFSET(KTRAP_FRAME, Cr3);
ADK_OFFSET(KTRAP_FRAME, Dr0);
ADK_OFFSET(KTRAP_FRAME, Dr1);
ADK_OFFSET(KTRAP_FRAME, Dr2);
ADK_OFFSET(KTRAP_FRAME, Dr3);
ADK_OFFSET(KTRAP_FRAME, Dr6);
ADK_OFFSET(KTRAP_FRAME, Dr7);
ADK_OFFSET(KTRAP_FRAME, SegDs);
ADK_OFFSET(KTRAP_FRAME, SegEs);
ADK_OFFSET(KTRAP_FRAME, SegFs);
ADK_OFFSET(KTRAP_FRAME, SegGs);
ADK_OFFSET(KTRAP_FRAME, Eax);
ADK_OFFSET(KTRAP_FRAME, Ebx);
ADK_OFFSET(KTRAP_FRAME, Ecx);
ADK_OFFSET(KTRAP_FRAME, Edx);
ADK_OFFSET(KTRAP_FRAME, Esi);
ADK_OFFSET(KTRAP_FRAME, Edi);
ADK_OFFSET(KTRAP_FRAME, Ebp);
ADK_OFFSET(KTRAP_FRAME, Vector);
ADK_OFFSET(KTRAP_FRAME, ErrorCode);
ADK_OFFSET(KTRAP_FRAME, Eip);
ADK_OFFSET(KTRAP_FRAME, SegCs);
ADK_OFFSET(KTRAP_FRAME, Flags);
ADK_OFFSET(KTRAP_FRAME, Esp);
ADK_OFFSET(KTRAP_FRAME, SegSs);
/* Generate KTRAP_FRAME size and REGISTERS_SIZE */
ADK_SIZE(KTRAP_FRAME);
ADK_SIZE_FROM(REGISTERS_SIZE, KTRAP_FRAME, Eax);
}

View File

@@ -0,0 +1,19 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/adkdefs.h
* DESCRIPTION: Definitions for XTADK
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTADK_ADKDEFS_H
#define __XTADK_ADKDEFS_H
/* Macros for calculating structure size and offsets for assembler code */
#define ADK_DEFINE(Symbol, Value) __asm__ volatile("\n\t# ==> " #Symbol " %c0" : : "i" ((SIZE_T)(Value)))
#define ADK_OFFSET(Structure, Member) ADK_DEFINE(Structure ## _ ## Member, FIELD_OFFSET(Structure, Member))
#define ADK_SIZE(Structure) ADK_DEFINE(Structure ## _SIZE, sizeof(Structure))
#define ADK_SIZE_FROM(Name, Structure, Member) ADK_DEFINE(Structure ## _ ## Name, sizeof(Structure) - FIELD_OFFSET(Structure, Member))
#endif /* __XTADK_ADKDEFS_H */

View File

@@ -12,6 +12,7 @@
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* Control Register 0 constants */
@@ -127,6 +128,10 @@
#define X86_EFLAGS_VIP_MASK 0x00100000 /* Virtual Interrupt Pending */
#define X86_EFLAGS_ID_MASK 0x00200000 /* Identification */
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* CPU vendor enumeration list */
typedef enum _CPU_VENDOR
{
@@ -135,6 +140,18 @@ typedef enum _CPU_VENDOR
CPU_VENDOR_UNKNOWN = 0xFFFFFFFF
} CPU_VENDOR, *PCPU_VENDOR;
/* CPUID advanced power management features (0x80000007) enumeration list */
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT
{
CPUID_FEATURES_EDX_TS = 1 << 0, /* Temperature Sensor */
CPUID_FEATURES_EDX_FIS = 1 << 1, /* Frequency ID Selection */
CPUID_FEATURES_EDX_VIS = 1 << 2, /* Voltage ID Selection */
CPUID_FEATURES_EDX_TTS = 1 << 3, /* ThermaTrip Support */
CPUID_FEATURES_EDX_HTC = 1 << 4, /* Hardware Thermal Throttling */
CPUID_FEATURES_EDX_STC = 1 << 5, /* Software Thermal Throttling */
CPUID_FEATURES_EDX_TSCI = 1 << 8 /* TSC Invariant */
} CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
/* CPUID extended features (0x80000001) enumeration list */
typedef enum _CPUID_FEATURES_EXTENDED
{
@@ -176,6 +193,23 @@ typedef enum _CPUID_FEATURES_EXTENDED
CPUID_FEATURES_EDX_3DNOW = 1 << 31
} CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
/* CPUID Thermal and Power Management features (0x00000006) enumeration list */
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT
{
CPUID_FEATURES_EAX_DTHERM = 1 << 0,
CPUID_FEATURES_EAX_IDA = 1 << 1,
CPUID_FEATURES_EAX_ARAT = 1 << 2,
CPUID_FEATURES_EAX_PLN = 1 << 4,
CPUID_FEATURES_EAX_PTS = 1 << 6,
CPUID_FEATURES_EAX_HWP = 1 << 7,
CPUID_FEATURES_EAX_HWP_NOTIFY = 1 << 8,
CPUID_FEATURES_EAX_HWP_ACT_WINDOW = 1 << 9,
CPUID_FEATURES_EAX_HWP_EPP = 1 << 10,
CPUID_FEATURES_EAX_HWP_PKG_REQ = 1 << 11,
CPUID_FEATURES_EAX_HWP_HIGHEST_PERF_CHANGE = 1 << 15,
CPUID_FEATURES_EAX_HFI = 1 << 19
} CPUID_FEATURES_LEAF6, *PCPUID_FEATURES_LEAF6;
/* CPUID STD1 features (0x00000001) enumeration list */
typedef enum _CPUID_FEATURES_STANDARD1
{
@@ -202,7 +236,7 @@ typedef enum _CPUID_FEATURES_STANDARD1
CPUID_FEATURES_ECX_X2APIC = 1 << 21,
CPUID_FEATURES_ECX_MOVBE = 1 << 22,
CPUID_FEATURES_ECX_POPCNT = 1 << 23,
CPUID_FEATURES_ECX_TSC = 1 << 24,
CPUID_FEATURES_ECX_TSC_DEADLINE = 1 << 24,
CPUID_FEATURES_ECX_AES = 1 << 25,
CPUID_FEATURES_ECX_XSAVE = 1 << 26,
CPUID_FEATURES_ECX_OSXSAVE = 1 << 27,
@@ -376,16 +410,23 @@ typedef enum _CPUID_FEATURES_STANDARD7_LEAF1
/* CPUID requests */
typedef enum _CPUID_REQUESTS
{
CPUID_GET_VENDOR_STRING,
CPUID_GET_STANDARD1_FEATURES,
CPUID_GET_TLB_CACHE,
CPUID_GET_SERIAL,
CPUID_GET_CACHE_TOPOLOGY,
CPUID_GET_MONITOR_MWAIT,
CPUID_GET_POWER_MANAGEMENT,
CPUID_GET_STANDARD7_FEATURES
CPUID_GET_VENDOR_STRING = 0x00000000,
CPUID_GET_STANDARD1_FEATURES = 0x00000001,
CPUID_GET_TLB_CACHE = 0x00000002,
CPUID_GET_SERIAL = 0x00000003,
CPUID_GET_CACHE_TOPOLOGY = 0x00000004,
CPUID_GET_MONITOR_MWAIT = 0x00000005,
CPUID_GET_POWER_MANAGEMENT = 0x00000006,
CPUID_GET_STANDARD7_FEATURES = 0x00000007,
CPUID_GET_TSC_CRYSTAL_CLOCK = 0x00000015,
CPUID_GET_EXTENDED_MAX = 0x80000000,
CPUID_GET_EXTENDED_FEATURES = 0x80000001,
CPUID_GET_ADVANCED_POWER_MANAGEMENT = 0x80000007
} CPUID_REQUESTS, *PCPUID_REQUESTS;
/* Interrupt handler */
typedef VOID (*PINTERRUPT_HANDLER)(PKTRAP_FRAME TrapFrame);
/* Processor identification information */
typedef struct _CPU_IDENTIFICATION
{
@@ -426,4 +467,5 @@ typedef enum _TRAMPOLINE_TYPE
TrampolineEnableXpa
} TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_ARTYPES_H */

View File

@@ -15,6 +15,9 @@
#include <amd64/xtstruct.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */
XTCLINK
XTCDECL
@@ -49,4 +52,5 @@ VOID
HlWritePort32(IN USHORT Port,
IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_HLFUNCS_H */

View File

@@ -9,6 +9,7 @@
#ifndef __XTDK_AMD64_HLTYPES_H
#define __XTDK_AMD64_HLTYPES_H
#include <xtbase.h>
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
@@ -53,6 +54,27 @@
/* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64
/* I/O APIC base address */
#define IOAPIC_DEFAULT_BASE 0xFEC00000
/* I/O APIC definitions */
#define IOAPIC_MAX_CONTROLLERS 128
#define IOAPIC_MAX_OVERRIDES 16
#define IOAPIC_RTE_MASKED 0x100FF
#define IOAPIC_RTE_SIZE 2
#define IOAPIC_VECTOR_FREE 0xFF
#define IOAPIC_VECTOR_RESERVED 0xFE
/* IOAPIC offsets */
#define IOAPIC_IOREGSEL 0x00
#define IOAPIC_IOWIN 0x10
/* IOAPIC registers */
#define IOAPIC_ID 0x00
#define IOAPIC_VER 0x01
#define IOAPIC_ARB 0x02
#define IOAPIC_REDTBL 0x10
/* 8259/ISP PIC ports definitions */
#define PIC1_CONTROL_PORT 0x20
#define PIC1_DATA_PORT 0x21
@@ -62,6 +84,10 @@
/* PIC vector definitions */
#define PIC1_VECTOR_SPURIOUS 0x37
/* PIT ports definitions */
#define PIT_COMMAND_PORT 0x43
#define PIT_DATA_PORT0 0x40
/* Serial ports information */
#define COMPORT_ADDRESS {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
#define COMPORT_COUNT 8
@@ -69,6 +95,17 @@
/* Initial stall factor */
#define INITIAL_STALL_FACTOR 100
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* APIC destination mode enumeration list */
typedef enum _APIC_DEST_MODE
{
APIC_DM_Physical,
APIC_DM_Logical
} APIC_DEST_MODE, *PAPIC_DEST_MODE;
/* APIC delivery mode enumeration list */
typedef enum _APIC_DM
{
@@ -126,6 +163,7 @@ typedef enum _APIC_REGISTER
APIC_TICR = 0x38, /* Initial Count Register for Timer */
APIC_TCCR = 0x39, /* Current Count Register for Timer */
APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
APIC_SIPI = 0x3F, /* Self-IPI Register */
APIC_EAFR = 0x40, /* extended APIC Feature register */
APIC_EACR = 0x41, /* Extended APIC Control Register */
APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
@@ -135,6 +173,19 @@ typedef enum _APIC_REGISTER
APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */
} APIC_REGISTER, *PAPIC_REGISTER;
/* APIC Timer Divide enumeration list */
typedef enum _APIC_TIMER_DIVISOR
{
TIMER_DivideBy2 = 0,
TIMER_DivideBy4 = 1,
TIMER_DivideBy8 = 2,
TIMER_DivideBy16 = 3,
TIMER_DivideBy32 = 8,
TIMER_DivideBy64 = 9,
TIMER_DivideBy128 = 10,
TIMER_DivideBy1 = 11,
} APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
/* I8259 PIC interrupt mode enumeration list */
typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE
{
@@ -252,6 +303,40 @@ typedef union _APIC_SPURIOUS_REGISTER
};
} APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
/* I/O APIC Controller information */
typedef struct _IOAPIC_DATA
{
ULONG GsiBase;
ULONG Identifier;
ULONG LineCount;
PHYSICAL_ADDRESS PhysicalAddress;
ULONG_PTR VirtualAddress;
} IOAPIC_DATA, *PIOAPIC_DATA;
/* I/O APIC Redirection Register */
typedef union _IOAPIC_REDIRECTION_REGISTER
{
ULONGLONG LongLong;
struct
{
UINT Base;
UINT Extended;
};
struct
{
ULONGLONG Vector:8;
ULONGLONG DeliveryMode:3;
ULONGLONG DestinationMode:1;
ULONGLONG DeliveryStatus:1;
ULONGLONG PinPolarity:1;
ULONGLONG RemoteIRR:1;
ULONGLONG TriggerMode:1;
ULONGLONG Mask:1;
ULONGLONG Reserved:39;
ULONGLONG Destination:8;
};
} IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
/* I8259 PIC register structure */
typedef union _PIC_I8259_ICW1
{
@@ -317,4 +402,17 @@ typedef union _PIC_I8259_ICW4
UCHAR Bits;
} PIC_I8259_ICW4, *PPIC_I8259_ICW4;
typedef struct _TIMER_CAPABILITIES
{
BOOLEAN Arat;
BOOLEAN Art;
BOOLEAN InvariantTsc;
BOOLEAN RDTSCP;
ULONG TimerFrequency;
BOOLEAN TscDeadline;
ULONG TscDenominator;
ULONG TscNumerator;
} TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_HLTYPES_H */

View File

@@ -23,6 +23,7 @@
/* GDT selector names */
#define KGDT_NULL 0x0000
#define KGDT_R0_CMCODE 0x0008
#define KGDT_R0_CODE 0x0010
#define KGDT_R0_DATA 0x0018
#define KGDT_R3_CMCODE 0x0020
@@ -46,7 +47,7 @@
#define KGDT_DESCRIPTOR_CODE 0x08
/* GDT descriptor type codes */
#define KGDT_TYPE_NONE 0x0
#define KGDT_TYPE_NONE 0x00
#define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ)
#define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE)
@@ -58,6 +59,7 @@
#define KIDT_IST_RESERVED 0
#define KIDT_IST_PANIC 1
#define KIDT_IST_MCA 2
#define KIDT_IST_NMI 3
/* AMD64 Segment Types */
#define AMD64_TASK_GATE 0x5
@@ -108,11 +110,9 @@
/* Static Kernel-Mode address start */
#define KSEG0_BASE 0xFFFFF80000000000
/* XTOS Kernel address base */
#define KSEG0_KERNEL_BASE 0x0000000800000000
/* XTOS Kernel stack size */
#define KERNEL_STACK_SIZE 0x8000
#define KERNEL_STACKS 3
/* XTOS Kernel stack guard pages */
#define KERNEL_STACK_GUARD_PAGES 1
@@ -138,6 +138,10 @@
#define NPX_STATE_SCRUB 0x1
#define NPX_STATE_SWITCH 0x2
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Floating point state storing structure */
typedef struct _FLOATING_SAVE_AREA
{
@@ -272,11 +276,18 @@ typedef struct _KIDTENTRY
{
USHORT OffsetLow;
USHORT Selector;
union
{
struct
{
USHORT IstIndex:3;
USHORT Reserved0:5;
USHORT Type:5;
USHORT Dpl:2;
USHORT Present:1;
};
USHORT Access;
};
USHORT OffsetMiddle;
ULONG OffsetHigh;
ULONG Reserved1;
@@ -512,6 +523,7 @@ typedef struct _KPROCESSOR_BLOCK
KAFFINITY SetMember;
ULONG StallScaleFactor;
UCHAR CpuNumber;
PINTERRUPT_HANDLER InterruptDispatchTable[256];
} KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;
/* Thread Environment Block (TEB) structure definition */
@@ -520,4 +532,5 @@ typedef struct _THREAD_ENVIRONMENT_BLOCK
THREAD_INFORMATION_BLOCK InformationBlock;
} THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_KETYPES_H */

View File

@@ -25,11 +25,11 @@
#define MM_PXE_BASE 0xFFFFF6FB7DBED000ULL
/* Page directory and page base addresses for 5-level paging */
#define MM_PTE_LA57_BASE 0xFFFF000000000000ULL
#define MM_PDE_LA57_BASE 0xFFFF010000000000ULL
#define MM_PPE_LA57_BASE 0xFFFF010800000000ULL
#define MM_PXE_LA57_BASE 0xFFFF010840000000ULL
#define MM_P5E_LA57_BASE 0xFFFF010840200000ULL
#define MM_PTE_LA57_BASE 0xFFED000000000000ULL
#define MM_PDE_LA57_BASE 0xFFEDF68000000000ULL
#define MM_PPE_LA57_BASE 0xFFEDF6FB40000000ULL
#define MM_PXE_LA57_BASE 0xFFEDF6FB7DA00000ULL
#define MM_P5E_LA57_BASE 0xFFEDF6FB7DBED000ULL
/* PTE shift values */
#define MM_PTE_SHIFT 3
@@ -39,15 +39,56 @@
#define MM_PXI_SHIFT 39
#define MM_P5I_SHIFT 48
/* Number of PTEs per page */
#define MM_PTE_PER_PAGE 512
#define MM_PDE_PER_PAGE 512
#define MM_PPE_PER_PAGE 512
#define MM_PXE_PER_PAGE 512
/* PTE state flags */
#define MM_PTE_VALID 0x0000000000000001ULL
#define MM_PTE_ACCESSED 0x0000000000000020ULL
#define MM_PTE_DIRTY 0x0000000000000040ULL
/* PTE scope flags */
#define MM_PTE_LARGE_PAGE 0x0000000000000080ULL
#define MM_PTE_GLOBAL 0x0000000000000100ULL
/* PTE access flags */
#define MM_PTE_NOACCESS 0x0000000000000000ULL
#define MM_PTE_READONLY 0x0000000000000000ULL
#define MM_PTE_EXECUTE 0x0000000000000000ULL
#define MM_PTE_EXECUTE_READ 0x0000000000000000ULL
#define MM_PTE_READWRITE 0x8000000000000002ULL
#define MM_PTE_WRITECOPY 0x8000000000000200ULL
#define MM_PTE_EXECUTE_READWRITE 0x0000000000000002ULL
#define MM_PTE_EXECUTE_WRITECOPY 0x0000000000000200ULL
/* PTE protection flags */
#define MM_PTE_NOEXECUTE 0x8000000000000000ULL
#define MM_PTE_GUARDED 0x8000000000000018ULL
#define MM_PTE_PROTECT 0x8000000000000612ULL
/* PTE cache flags */
#define MM_PTE_CACHE_ENABLE 0x0000000000000000ULL
#define MM_PTE_CACHE_DISABLE 0x0000000000000010ULL
#define MM_PTE_CACHE_WRITECOMBINED 0x0000000000000010ULL
#define MM_PTE_CACHE_WRITETHROUGH 0x0000000000000008ULL
/* PTE software flags */
#define MM_PTE_COPY_ON_WRITE 0x0000000000000200ULL
#define MM_PTE_PROTOTYPE 0x0000000000000400ULL
#define MM_PTE_TRANSITION 0x0000000000000800ULL
/* PTE frame bits */
#define MM_PTE_FRAME_BITS 57
/* PTE protection bits */
#define MM_PTE_PROTECTION_BITS 5
/* Base address of the system page table */
#define MM_SYSTEM_PTE_BASE KSEG0_BASE
/* Minimum number of physical pages needed by the system */
#define MM_MINIMUM_PHYSICAL_PAGES 2048
/* Number of system PTEs */
#define MM_DEFAULT_NUMBER_SYSTEM_PTES 22000
/* Default number of secondary colors */
#define MM_DEFAULT_SECONDARY_COLORS 64
@@ -63,9 +104,25 @@
/* Maximum physical address used by HAL allocations */
#define MM_MAXIMUM_PHYSICAL_ADDRESS 0x00000000FFFFFFFFULL
/* Highest system address */
#define MM_HIGHEST_SYSTEM_ADDRESS 0xFFFFFFFFFFFFFFFFULL
/* Trampoline code address */
#define MM_TRAMPOLINE_ADDRESS 0x80000
/* Pool block size */
#define MM_POOL_BLOCK_SIZE 16
/* Number of pool lists per page */
#define MM_POOL_LISTS_PER_PAGE (MM_PAGE_SIZE / MM_POOL_BLOCK_SIZE)
/* Number of pool tracking tables */
#define MM_POOL_TRACKING_TABLES 64
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Page size enumeration list */
typedef enum _PAGE_SIZE
{
@@ -252,6 +309,7 @@ typedef struct _MMPFN
USHORT ReferenceCount;
} e2;
} u3;
ULONG UsedPageTableEntries;
union
{
MMPTE OriginalPte;
@@ -262,15 +320,33 @@ typedef struct _MMPFN
ULONG_PTR EntireFrame;
struct
{
ULONG_PTR PteFrame:58;
ULONG_PTR PteFrame:57;
ULONG_PTR InPageError:1;
ULONG_PTR VerifierAllocation:1;
ULONG_PTR AweAllocation:1;
ULONG_PTR LockCharged:1;
ULONG_PTR KernelStack:1;
ULONG_PTR Priority:3;
ULONG_PTR MustBeCached:1;
};
} u4;
} MMPFN, *PMMPFN;
/* Pool descriptor structure definition */
typedef struct _POOL_DESCRIPTOR
{
LIST_ENTRY ListHeads[MM_POOL_LISTS_PER_PAGE];
PVOID LockAddress;
ULONG PoolIndex;
LONG PendingFreeDepth;
PVOID PendingFrees;
MMPOOL_TYPE PoolType;
ULONG RunningFrees;
ULONG RunningAllocations;
ULONG Threshold;
ULONG TotalPages;
ULONG TotalBigAllocations;
SIZE_T TotalBytes;
SIZE_T Reserved;
} POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_MMTYPES_H */

View File

@@ -12,13 +12,20 @@
#include <xtdefs.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Architecture-specific enumeration lists forward references */
typedef enum _APIC_DEST_MODE APIC_DEST_MODE, *PAPIC_DEST_MODE;
typedef enum _APIC_DM APIC_DM, *PAPIC_DM;
typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH;
typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE;
typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER;
typedef enum _APIC_TIMER_DIVISOR APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR;
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_EXTENDED CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT CPUID_FEATURES_POWER_MANAGEMENT, *PCPUID_FEATURES_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_STANDARD1 CPUID_FEATURES_STANDARD1, *PCPUID_FEATURES_STANDARD1;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF0 CPUID_FEATURES_STANDARD7_LEAF0, *PCPUID_FEATURES_STANDARD7_LEAF0;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF1 CPUID_FEATURES_STANDARD7_LEAF1, *PCPUID_FEATURES_STANDARD7_LEAF1;
@@ -39,6 +46,7 @@ typedef struct _CPUID_REGISTERS CPUID_REGISTERS, *PCPUID_REGISTERS;
typedef struct _CPUID_SIGNATURE CPUID_SIGNATURE, *PCPUID_SIGNATURE;
typedef struct _FLOATING_SAVE_AREA FLOATING_SAVE_AREA, *PFLOATING_SAVE_AREA;
typedef struct _HARDWARE_PTE HARDWARE_PTE, *PHARDWARE_PTE;
typedef struct _IOAPIC_DATA IOAPIC_DATA, *PIOAPIC_DATA;
typedef struct _KDESCRIPTOR KDESCRIPTOR, *PKDESCRIPTOR;
typedef struct _KEXCEPTION_FRAME KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
typedef struct _KGDTENTRY KGDTENTRY, *PKGDTENTRY;
@@ -61,13 +69,16 @@ typedef struct _MMPTE_PROTOTYPE MMPTE_PROTOTYPE, *PMMPTE_PROTOTYPE;
typedef struct _MMPTE_SOFTWARE MMPTE_SOFTWARE, *PMMPTE_SOFTWARE;
typedef struct _MMPTE_SUBSECTION MMPTE_SUBSECTION, *PMMPTE_SUBSECTION;
typedef struct _MMPTE_TRANSITION MMPTE_TRANSITION, *PMMPTE_TRANSITION;
typedef struct _POOL_DESCRIPTOR POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
typedef struct _TIMER_CAPABILITIES TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
/* Unions forward references */
typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER;
typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
typedef union _IOAPIC_REDIRECTION_REGISTER IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
typedef union _MMPTE MMP5E, *PMMP5E;
typedef union _MMPTE MMPDE, *PMMPDE;
typedef union _MMPTE MMPPE, *PMMPPE;
@@ -78,4 +89,5 @@ typedef union _PIC_I8259_ICW2 PIC_I8259_ICW2, *PPIC_I8259_ICW2;
typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3;
typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_XTSTRUCT_H */

View File

@@ -13,6 +13,9 @@
#include <xtuefi.h>
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
/* XT BootLoader routines forward references */
XTCLINK
XTCDECL
@@ -21,4 +24,5 @@ BlGetXtLdrProtocol(IN PEFI_SYSTEM_TABLE SystemTable,
IN EFI_HANDLE ImageHandle,
OUT PXTBL_LOADER_PROTOCOL *ProtocolHandler);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_BLFUNCS_H */

View File

@@ -41,6 +41,10 @@
/* TUI dialog box maximum width */
#define XTBL_TUI_MAX_DIALOG_WIDTH 100
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
/* XTLDR Routine pointers */
typedef LOADER_MEMORY_TYPE (XTCDECL *PBL_GET_MEMTYPE_ROUTINE)(IN EFI_MEMORY_TYPE EfiMemoryType);
@@ -51,6 +55,7 @@ typedef EFI_STATUS (XTCDECL *PBL_BOOTMENU_INITIALIZE_OS_LIST)(IN ULONG MaxNameLe
typedef BOOLEAN (XTCDECL *PBL_BOOTUTILS_GET_BOOLEAN_PARAMETER)(IN PCWSTR Parameters, IN PCWSTR Needle);
typedef VOID (XTAPI *PBL_BOOTUTILS_GET_TRAMPOLINE_INFORMATION)(IN TRAMPOLINE_TYPE TrampolineType, OUT PVOID *TrampolineCode, OUT PULONG_PTR TrampolineSize);
typedef EFI_STATUS (XTCDECL *PBL_BUILD_PAGE_MAP)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR SelfMapAddress);
typedef EFI_STATUS (XTCDECL *PBL_COMMIT_PAGE_MAP)(IN PXTBL_PAGE_MAPPING PageMap);
typedef EFI_STATUS (XTCDECL *PBL_CLOSE_VOLUME)(IN PEFI_HANDLE VolumeHandle);
typedef VOID (XTCDECL *PBL_CLEAR_CONSOLE_LINE)(IN ULONGLONG LineNo);
typedef BOOLEAN (XTCDECL *PBL_CPU_CPUID)(IN OUT PCPUID_REGISTERS Registers);
@@ -100,9 +105,9 @@ typedef VOID (XTCDECL *PBL_LLIST_INITIALIZE_HEAD)(IN PLIST_ENTRY ListHead);
typedef VOID (XTCDECL *PBL_LLIST_INSERT_HEAD)(IN OUT PLIST_ENTRY ListHead, IN PLIST_ENTRY Entry);
typedef VOID (XTCDECL *PBL_LLIST_INSERT_TAIL)(IN OUT PLIST_ENTRY ListHead, IN PLIST_ENTRY Entry);
typedef VOID (XTCDECL *PBL_LLIST_REMOVE_ENTRY)(IN PLIST_ENTRY Entry);
typedef EFI_STATUS (XTCDECL *PBL_MAP_EFI_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN OUT PVOID *MemoryMapAddress, IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
typedef EFI_STATUS (XTCDECL *PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR VirtualAddress, IN ULONG_PTR PhysicalAddress, IN ULONG NumberOfPages);
typedef EFI_STATUS (XTCDECL *PBL_MAP_VIRTUAL_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN PVOID VirtualAddress, IN PVOID PhysicalAddress, IN ULONGLONG NumberOfPages, IN LOADER_MEMORY_TYPE MemoryType);
typedef EFI_STATUS (XTCDECL *PBL_MAP_EFI_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN OUT PVOID *BaseAddress, IN BOOLEAN IdentityMapping, IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
typedef EFI_STATUS (XTCDECL *PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONGLONG VirtualAddress, IN ULONGLONG PhysicalAddress, IN ULONGLONG NumberOfPages);
typedef EFI_STATUS (XTCDECL *PBL_MAP_VIRTUAL_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN ULONGLONG VirtualAddress, IN ULONGLONG PhysicalAddress, IN ULONGLONG NumberOfPages, IN LOADER_MEMORY_TYPE MemoryType);
typedef VOID (XTAPI *PBL_MOVE_MEMORY)(IN OUT PVOID Destination, IN PCVOID Source, IN SIZE_T Length);
typedef EFI_STATUS (XTCDECL *PBL_OPEN_VOLUME)(IN PEFI_DEVICE_PATH_PROTOCOL DevicePath, OUT PEFI_HANDLE DiskHandle, OUT PEFI_FILE_HANDLE *FsHandle);
typedef EFI_STATUS (XTCDECL *PBL_OPEN_PROTOCOL)(OUT PEFI_HANDLE Handle, OUT PVOID *ProtocolHandler, IN PEFI_GUID ProtocolGuid);
@@ -232,8 +237,8 @@ typedef struct _XTBL_KNOWN_BOOT_PROTOCOL
typedef struct _XTBL_MEMORY_MAPPING
{
LIST_ENTRY ListEntry;
PVOID VirtualAddress;
PVOID PhysicalAddress;
ULONGLONG VirtualAddress;
ULONGLONG PhysicalAddress;
ULONGLONG NumberOfPages;
LOADER_MEMORY_TYPE MemoryType;
} XTBL_MEMORY_MAPPING, *PXTBL_MEMORY_MAPPING;
@@ -449,6 +454,7 @@ typedef struct _XTBL_LOADER_PROTOCOL
PBL_ALLOCATE_PAGES AllocatePages;
PBL_ALLOCATE_POOL AllocatePool;
PBL_BUILD_PAGE_MAP BuildPageMap;
PBL_COMMIT_PAGE_MAP CommitPageMap;
PBL_COMPARE_MEMORY CompareMemory;
PBL_COPY_MEMORY CopyMemory;
PBL_FREE_PAGES FreePages;
@@ -518,4 +524,5 @@ typedef struct _XTBL_LOADER_PROTOCOL
} WideString;
} XTBL_LOADER_PROTOCOL, *PXTBL_LOADER_PROTOCOL;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_BLTYPES_H */

View File

@@ -13,6 +13,9 @@
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel Executive routines forward references */
XTCLINK
XTFASTCALL
@@ -44,4 +47,5 @@ XTFASTCALL
VOID
ExWaitForRundownProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_EXFUNCS_H */

View File

@@ -17,6 +17,10 @@
/* Rundown protection flags */
#define EX_RUNDOWN_ACTIVE 0x1
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Executive rundown protection structure definition */
typedef struct _EX_RUNDOWN_REFERENCE
{
@@ -34,4 +38,5 @@ typedef struct _EX_RUNDOWN_WAIT_BLOCK
KEVENT WakeEvent;
} EX_RUNDOWN_WAIT_BLOCK, *PEX_RUNDOWN_WAIT_BLOCK;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_EXTYPES_H */

View File

@@ -14,6 +14,9 @@
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */
XTCLINK
XTAPI
@@ -48,4 +51,5 @@ VOID
HlWriteRegister32(IN PVOID Register,
IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_HLFUNCS_H */

View File

@@ -101,6 +101,12 @@
#define ACPI_MADT_PLACE_ENABLED 0 /* Processor Local APIC CPU Enabled */
#define ACPI_MADT_PLAOC_ENABLED 1 /* Processor Local APIC Online Capable */
/* ACPI address space definitions */
#define ACPI_ADDRESS_SPACE_MEMORY 0x00
/* Maximum number of cached ACPI tables */
#define ACPI_MAX_CACHED_TABLES 32
/* Default serial port settings */
#define COMPORT_CLOCK_RATE 0x1C200
#define COMPORT_WAIT_TIMEOUT 204800
@@ -179,6 +185,14 @@
#define COMPORT_REG_MSR 0x06 /* Modem Status Register */
#define COMPORT_REG_SR 0x07 /* Scratch Register */
/* Minimum and maximum profile intervals */
#define MIN_PROFILE_INTERVAL 1000
#define MAX_PROFILE_INTERVAL 10000000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Generic Address structure */
typedef struct _GENERIC_ADDRESS
{
@@ -214,7 +228,7 @@ typedef struct _ACPI_SUBTABLE_HEADER
typedef struct _ACPI_CACHE_LIST
{
LIST_ENTRY ListEntry;
ACPI_DESCRIPTION_HEADER Header;
PACPI_DESCRIPTION_HEADER Table;
} ACPI_CACHE_LIST, *PACPI_CACHE_LIST;
/* ACPI Root System Description Table Pointer (RSDP) structure */
@@ -305,6 +319,17 @@ typedef struct _ACPI_FADT
GENERIC_ADDRESS SleepStatusReg;
} PACKED ACPI_FADT, *PACPI_FADT;
/* ACPI High Precision Event Timer (HPET) table structure */
typedef struct _ACPI_HPET
{
ACPI_DESCRIPTION_HEADER Header;
ULONG EventTimerBlockId;
GENERIC_ADDRESS BaseAddress;
UCHAR HpetNumber;
USHORT MinimumTick;
UCHAR PageProtectionAndOem;
} PACKED ACPI_HPET, *PACPI_HPET;
/* ACPI Multiple APIC Description Table (MADT) structure */
typedef struct _ACPI_MADT
{
@@ -314,6 +339,26 @@ typedef struct _ACPI_MADT
ULONG ApicTables[];
} PACKED ACPI_MADT, *PACPI_MADT;
/* ACPI Interrupt Override MADT subtable structure */
typedef struct _ACPI_MADT_INTERRUPT_OVERRIDE
{
ACPI_SUBTABLE_HEADER Header;
UCHAR Bus;
UCHAR SourceIrq;
ULONG GlobalSystemInterrupt;
USHORT Flags;
} PACKED ACPI_MADT_INTERRUPT_OVERRIDE, *PACPI_MADT_INTERRUPT_OVERRIDE;
/* ACPI IO APIC MADT subtable structure */
typedef struct _ACPI_MADT_IOAPIC
{
ACPI_SUBTABLE_HEADER Header;
UCHAR IoApicId;
UCHAR Reserved;
ULONG IoApicAddress;
ULONG GlobalIrqBase;
} PACKED ACPI_MADT_IOAPIC, *PACPI_MADT_IOAPIC;
/* ACPI Local APIC MADT subtable structure */
typedef struct _ACPI_MADT_LOCAL_APIC
{
@@ -450,4 +495,5 @@ typedef struct _SMBIOS3_TABLE_HEADER
ULONGLONG TableAddress;
} SMBIOS3_TABLE_HEADER, *PSMBIOS3_TABLE_HEADER;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_HLTYPES_H */

View File

@@ -12,6 +12,7 @@
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* Control Register 0 constants */
@@ -92,6 +93,10 @@
#define X86_EFLAGS_VIP_MASK 0x00100000 /* Virtual Interrupt Pending */
#define X86_EFLAGS_ID_MASK 0x00200000 /* Identification */
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* CPU vendor enumeration list */
typedef enum _CPU_VENDOR
{
@@ -100,6 +105,18 @@ typedef enum _CPU_VENDOR
CPU_VENDOR_UNKNOWN = 0xFFFFFFFF
} CPU_VENDOR, *PCPU_VENDOR;
/* CPUID advanced power management features (0x80000007) enumeration list */
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT
{
CPUID_FEATURES_EDX_TS = 1 << 0, /* Temperature Sensor */
CPUID_FEATURES_EDX_FIS = 1 << 1, /* Frequency ID Selection */
CPUID_FEATURES_EDX_VIS = 1 << 2, /* Voltage ID Selection */
CPUID_FEATURES_EDX_TTS = 1 << 3, /* ThermaTrip Support */
CPUID_FEATURES_EDX_HTC = 1 << 4, /* Hardware Thermal Throttling */
CPUID_FEATURES_EDX_STC = 1 << 5, /* Software Thermal Throttling */
CPUID_FEATURES_EDX_TSCI = 1 << 8 /* TSC Invariant */
} CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
/* CPUID extended features (0x80000001) enumeration list */
typedef enum _CPUID_FEATURES_EXTENDED
{
@@ -141,6 +158,23 @@ typedef enum _CPUID_FEATURES_EXTENDED
CPUID_FEATURES_EDX_3DNOW = 1 << 31
} CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
/* CPUID Thermal and Power Management features (0x00000006) enumeration list */
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT
{
CPUID_FEATURES_EAX_DTHERM = 1 << 0,
CPUID_FEATURES_EAX_IDA = 1 << 1,
CPUID_FEATURES_EAX_ARAT = 1 << 2,
CPUID_FEATURES_EAX_PLN = 1 << 4,
CPUID_FEATURES_EAX_PTS = 1 << 6,
CPUID_FEATURES_EAX_HWP = 1 << 7,
CPUID_FEATURES_EAX_HWP_NOTIFY = 1 << 8,
CPUID_FEATURES_EAX_HWP_ACT_WINDOW = 1 << 9,
CPUID_FEATURES_EAX_HWP_EPP = 1 << 10,
CPUID_FEATURES_EAX_HWP_PKG_REQ = 1 << 11,
CPUID_FEATURES_EAX_HWP_HIGHEST_PERF_CHANGE = 1 << 15,
CPUID_FEATURES_EAX_HFI = 1 << 19
} CPUID_FEATURES_LEAF6, *PCPUID_FEATURES_LEAF6;
/* CPUID STD1 features (0x00000001) enumeration list */
typedef enum _CPUID_FEATURES_STANDARD1
{
@@ -167,7 +201,7 @@ typedef enum _CPUID_FEATURES_STANDARD1
CPUID_FEATURES_ECX_X2APIC = 1 << 21,
CPUID_FEATURES_ECX_MOVBE = 1 << 22,
CPUID_FEATURES_ECX_POPCNT = 1 << 23,
CPUID_FEATURES_ECX_TSC = 1 << 24,
CPUID_FEATURES_ECX_TSC_DEADLINE = 1 << 24,
CPUID_FEATURES_ECX_AES = 1 << 25,
CPUID_FEATURES_ECX_XSAVE = 1 << 26,
CPUID_FEATURES_ECX_OSXSAVE = 1 << 27,
@@ -341,16 +375,23 @@ typedef enum _CPUID_FEATURES_STANDARD7_LEAF1
/* CPUID requests */
typedef enum _CPUID_REQUESTS
{
CPUID_GET_VENDOR_STRING,
CPUID_GET_STANDARD1_FEATURES,
CPUID_GET_TLB_CACHE,
CPUID_GET_SERIAL,
CPUID_GET_CACHE_TOPOLOGY,
CPUID_GET_MONITOR_MWAIT,
CPUID_GET_POWER_MANAGEMENT,
CPUID_GET_STANDARD7_FEATURES
CPUID_GET_VENDOR_STRING = 0x00000000,
CPUID_GET_STANDARD1_FEATURES = 0x00000001,
CPUID_GET_TLB_CACHE = 0x00000002,
CPUID_GET_SERIAL = 0x00000003,
CPUID_GET_CACHE_TOPOLOGY = 0x00000004,
CPUID_GET_MONITOR_MWAIT = 0x00000005,
CPUID_GET_POWER_MANAGEMENT = 0x00000006,
CPUID_GET_STANDARD7_FEATURES = 0x00000007,
CPUID_GET_TSC_CRYSTAL_CLOCK = 0x00000015,
CPUID_GET_EXTENDED_MAX = 0x80000000,
CPUID_GET_EXTENDED_FEATURES = 0x80000001,
CPUID_GET_ADVANCED_POWER_MANAGEMENT = 0x80000007
} CPUID_REQUESTS, *PCPUID_REQUESTS;
/* Interrupt handler */
typedef VOID (*PINTERRUPT_HANDLER)(PKTRAP_FRAME TrapFrame);
/* Processor identification information */
typedef struct _CPU_IDENTIFICATION
{
@@ -390,4 +431,5 @@ typedef enum _TRAMPOLINE_TYPE
TrampolineApStartup
} TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_ARTYPES_H */

View File

@@ -15,6 +15,9 @@
#include <i686/xtstruct.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */
XTCLINK
XTCDECL
@@ -49,4 +52,5 @@ VOID
HlWritePort32(IN USHORT Port,
IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_HLFUNCS_H */

View File

@@ -9,6 +9,7 @@
#ifndef __XTDK_I686_HLTYPES_H
#define __XTDK_I686_HLTYPES_H
#include <xtbase.h>
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
@@ -58,6 +59,27 @@
/* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64
/* I/O APIC base address */
#define IOAPIC_DEFAULT_BASE 0xFEC00000
/* I/O APIC definitions */
#define IOAPIC_MAX_CONTROLLERS 64
#define IOAPIC_MAX_OVERRIDES 16
#define IOAPIC_RTE_MASKED 0x100FF
#define IOAPIC_RTE_SIZE 2
#define IOAPIC_VECTOR_FREE 0xFF
#define IOAPIC_VECTOR_RESERVED 0xFE
/* IOAPIC offsets */
#define IOAPIC_IOREGSEL 0x00
#define IOAPIC_IOWIN 0x10
/* IOAPIC registers */
#define IOAPIC_ID 0x00
#define IOAPIC_VER 0x01
#define IOAPIC_ARB 0x02
#define IOAPIC_REDTBL 0x10
/* 8259/ISP PIC ports definitions */
#define PIC1_CONTROL_PORT 0x20
#define PIC1_DATA_PORT 0x21
@@ -69,6 +91,10 @@
/* PIC vector definitions */
#define PIC1_VECTOR_SPURIOUS 0x37
/* PIT ports definitions */
#define PIT_COMMAND_PORT 0x43
#define PIT_DATA_PORT0 0x40
/* Serial ports information */
#define COMPORT_ADDRESS {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
#define COMPORT_COUNT 8
@@ -76,6 +102,17 @@
/* Initial stall factor */
#define INITIAL_STALL_FACTOR 100
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* APIC destination mode enumeration list */
typedef enum _APIC_DEST_MODE
{
APIC_DM_Physical,
APIC_DM_Logical
} APIC_DEST_MODE, *PAPIC_DEST_MODE;
/* APIC delivery mode enumeration list */
typedef enum _APIC_DM
{
@@ -133,6 +170,7 @@ typedef enum _APIC_REGISTER
APIC_TICR = 0x38, /* Initial Count Register for Timer */
APIC_TCCR = 0x39, /* Current Count Register for Timer */
APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
APIC_SIPI = 0x3F, /* Self-IPI Register */
APIC_EAFR = 0x40, /* extended APIC Feature register */
APIC_EACR = 0x41, /* Extended APIC Control Register */
APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
@@ -142,6 +180,19 @@ typedef enum _APIC_REGISTER
APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */
} APIC_REGISTER, *PAPIC_REGISTER;
/* APIC Timer Divide enumeration list */
typedef enum _APIC_TIMER_DIVISOR
{
TIMER_DivideBy2 = 0,
TIMER_DivideBy4 = 1,
TIMER_DivideBy8 = 2,
TIMER_DivideBy16 = 3,
TIMER_DivideBy32 = 8,
TIMER_DivideBy64 = 9,
TIMER_DivideBy128 = 10,
TIMER_DivideBy1 = 11,
} APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
/* I8259 PIC interrupt mode enumeration list */
typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE
{
@@ -259,6 +310,40 @@ typedef union _APIC_SPURIOUS_REGISTER
};
} APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
/* I/O APIC Controller information */
typedef struct _IOAPIC_DATA
{
ULONG GsiBase;
ULONG Identifier;
ULONG LineCount;
PHYSICAL_ADDRESS PhysicalAddress;
ULONG_PTR VirtualAddress;
} IOAPIC_DATA, *PIOAPIC_DATA;
/* I/O APIC Redirection Register */
typedef union _IOAPIC_REDIRECTION_REGISTER
{
ULONGLONG LongLong;
struct
{
UINT Base;
UINT Extended;
};
struct
{
ULONGLONG Vector:8;
ULONGLONG DeliveryMode:3;
ULONGLONG DestinationMode:1;
ULONGLONG DeliveryStatus:1;
ULONGLONG PinPolarity:1;
ULONGLONG RemoteIRR:1;
ULONGLONG TriggerMode:1;
ULONGLONG Mask:1;
ULONGLONG Reserved:39;
ULONGLONG Destination:8;
};
} IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
/* I8259 PIC register structure */
typedef union _PIC_I8259_ICW1
{
@@ -324,4 +409,18 @@ typedef union _PIC_I8259_ICW4
UCHAR Bits;
} PIC_I8259_ICW4, *PPIC_I8259_ICW4;
/* Timer Capabilities */
typedef struct _TIMER_CAPABILITIES
{
BOOLEAN Arat;
BOOLEAN Art;
BOOLEAN InvariantTsc;
BOOLEAN RDTSCP;
ULONG TimerFrequency;
BOOLEAN TscDeadline;
ULONG TscDenominator;
ULONG TscNumerator;
} TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_HLTYPES_H */

View File

@@ -50,7 +50,7 @@
#define KGDT_DESCRIPTOR_CODE 0x08
/* GDT descriptor type codes */
#define KGDT_TYPE_NONE 0x0
#define KGDT_TYPE_NONE 0x00
#define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ)
#define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE)
@@ -58,12 +58,6 @@
#define KIDT_ACCESS_RING0 0x00
#define KIDT_ACCESS_RING3 0x60
/* IDT gate types */
#define KIDT_TASK 0x05
#define KIDT_CALL 0x0C
#define KIDT_INTERRUPT 0x0E
#define KIDT_TRAP 0x0F
/* TSS Offsets */
#define KTSS_ESP0 0x04
#define KTSS_CR3 0x1C
@@ -88,6 +82,7 @@
#define KTSS_IO_MAPS 0x68
/* I686 Segment Types */
#define I686_LDT 0x2
#define I686_TASK_GATE 0x5
#define I686_TSS 0x9
#define I686_ACTIVE_TSS 0xB
@@ -134,11 +129,9 @@
/* Static Kernel-Mode address start */
#define KSEG0_BASE 0x80000000
/* XTOS Kernel address base */
#define KSEG0_KERNEL_BASE 0x01800000
/* XTOS Kernel stack size */
#define KERNEL_STACK_SIZE 0x4000
#define KERNEL_STACKS 3
/* XTOS Kernel stack guard pages */
#define KERNEL_STACK_GUARD_PAGES 1
@@ -166,6 +159,10 @@
#define NPX_STATE_LOADED 0x0
#define NPX_STATE_UNLOADED 0xA
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Floating point state storing structure */
typedef struct _FN_SAVE_FORMAT
{
@@ -284,7 +281,18 @@ typedef struct _KIDTENTRY
{
USHORT Offset;
USHORT Selector;
union
{
struct
{
UCHAR Reserved;
UCHAR Type:4;
UCHAR Flag:1;
UCHAR Dpl:2;
UCHAR Present:1;
};
USHORT Access;
};
USHORT ExtendedOffset;
} KIDTENTRY, *PKIDTENTRY;
@@ -470,6 +478,7 @@ typedef struct _KPROCESSOR_BLOCK
KAFFINITY SetMember;
ULONG StallScaleFactor;
UCHAR CpuNumber;
PINTERRUPT_HANDLER InterruptDispatchTable[256];
} KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;
/* Thread Environment Block (TEB) structure definition */
@@ -478,4 +487,5 @@ typedef struct _THREAD_ENVIRONMENT_BLOCK
THREAD_INFORMATION_BLOCK InformationBlock;
} THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_KETYPES_H */

View File

@@ -35,9 +35,58 @@
#define MM_PTE_LEGACY_SHIFT 2
#define MM_PDI_LEGACY_SHIFT 22
/* PTE state flags */
#define MM_PTE_VALID 0x00000001
#define MM_PTE_ACCESSED 0x00000020
#define MM_PTE_DIRTY 0x00000040
/* PTE scope flags */
#define MM_PTE_LARGE_PAGE 0x00000080
#define MM_PTE_GLOBAL 0x00000100
/* PTE access flags */
#define MM_PTE_NOACCESS 0x00000000
#define MM_PTE_READONLY 0x00000000
#define MM_PTE_EXECUTE 0x00000000
#define MM_PTE_EXECUTE_READ 0x00000000
#define MM_PTE_READWRITE 0x00000002
#define MM_PTE_WRITECOPY 0x00000200
#define MM_PTE_EXECUTE_READWRITE 0x00000002
#define MM_PTE_EXECUTE_WRITECOPY 0x00000200
/* PTE protection flags */
#define MM_PTE_NOEXECUTE 0x00000000
#define MM_PTE_GUARDED 0x00000018
#define MM_PTE_PROTECT 0x00000612
/* PTE cache flags */
#define MM_PTE_CACHE_ENABLE 0x00000000
#define MM_PTE_CACHE_DISABLE 0x00000010
#define MM_PTE_CACHE_WRITECOMBINED 0x00000010
#define MM_PTE_CACHE_WRITETHROUGH 0x00000008
/* PTE software flags */
#define MM_PTE_COPY_ON_WRITE 0x00000200
#define MM_PTE_PROTOTYPE 0x00000400
#define MM_PTE_TRANSITION 0x00000800
/* PTE frame bits */
#define MM_PTE_FRAME_BITS 25
/* PTE protection bits */
#define MM_PTE_PROTECTION_BITS 5
/* Base address of the system page table */
#define MM_SYSTEM_PTE_BASE NULLPTR
/* Minimum number of physical pages needed by the system */
#define MM_MINIMUM_PHYSICAL_PAGES 1100
/* Number of system PTEs */
#define MM_MINIMUM_NUMBER_SYSTEM_PTES 7000
#define MM_DEFAULT_NUMBER_SYSTEM_PTES 11000
#define MM_MAXIMUM_NUMBER_SYSTEM_PTES 22000
/* Default number of secondary colors */
#define MM_DEFAULT_SECONDARY_COLORS 64
@@ -53,9 +102,25 @@
/* Maximum physical address used by HAL allocations */
#define MM_MAXIMUM_PHYSICAL_ADDRESS 0xFFFFFFFF
/* Highest system address */
#define MM_HIGHEST_SYSTEM_ADDRESS 0xFFFFFFFF
/* Trampoline code address */
#define MM_TRAMPOLINE_ADDRESS 0x80000
/* Pool block size */
#define MM_POOL_BLOCK_SIZE 8
/* Number of pool lists per page */
#define MM_POOL_LISTS_PER_PAGE (MM_PAGE_SIZE / MM_POOL_BLOCK_SIZE)
/* Number of pool tracking tables */
#define MM_POOL_TRACKING_TABLES 32
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Page size enumeration list */
typedef enum _PAGE_SIZE
{
@@ -106,7 +171,6 @@ typedef struct _HARDWARE_MODERN_PTE
/* Generic Page Table entry union to abstract PML2 and PML3 formats */
typedef union _HARDWARE_PTE
{
ULONGLONG Long;
HARDWARE_LEGACY_PTE Pml2;
HARDWARE_MODERN_PTE Pml3;
} HARDWARE_PTE, *PHARDWARE_PTE;
@@ -201,12 +265,12 @@ typedef struct _MMPML2_PTE_TRANSITION
typedef union _MMPML2_PTE
{
ULONG Long;
HARDWARE_PTE Flush;
MMPML2_PTE_HARDWARE Hard;
MMPML2_PTE_PROTOTYPE Proto;
MMPML2_PTE_SOFTWARE Soft;
MMPML2_PTE_TRANSITION Trans;
MMPML2_PTE_SUBSECTION Subsect;
HARDWARE_LEGACY_PTE Flush;
MMPML2_PTE_HARDWARE Hardware;
MMPML2_PTE_PROTOTYPE Prototype;
MMPML2_PTE_SOFTWARE Software;
MMPML2_PTE_TRANSITION Transition;
MMPML2_PTE_SUBSECTION Subsection;
MMPML2_PTE_LIST List;
} MMPML2_PTE, *PMMPML2_PTE;
@@ -296,7 +360,7 @@ typedef struct _MMPML3_PTE_TRANSITION
typedef union _MMPML3_PTE
{
ULONGLONG Long;
HARDWARE_PTE Flush;
HARDWARE_MODERN_PTE Flush;
MMPML3_PTE_HARDWARE Hardware;
MMPML3_PTE_PROTOTYPE Prototype;
MMPML3_PTE_SOFTWARE Software;
@@ -308,7 +372,6 @@ typedef union _MMPML3_PTE
/* Generic Page Table Entry union to abstract PML2 and PML3 formats */
typedef union _MMPTE
{
ULONGLONG Long;
MMPML2_PTE Pml2;
MMPML3_PTE Pml3;
} MMPTE, *PMMPTE;
@@ -339,6 +402,7 @@ typedef struct _MMPFN
USHORT ReferenceCount;
} e2;
} u3;
ULONG UsedPageTableEntries;
union
{
MMPTE OriginalPte;
@@ -349,15 +413,33 @@ typedef struct _MMPFN
ULONG_PTR EntireFrame;
struct
{
ULONG_PTR PteFrame:26;
ULONG_PTR PteFrame:25;
ULONG_PTR InPageError:1;
ULONG_PTR VerifierAllocation:1;
ULONG_PTR AweAllocation:1;
ULONG_PTR LockCharged:1;
ULONG_PTR KernelStack:1;
ULONG_PTR Priority:3;
ULONG_PTR MustBeCached:1;
};
} u4;
} MMPFN, *PMMPFN;
/* Pool descriptor structure definition */
typedef struct _POOL_DESCRIPTOR
{
LIST_ENTRY ListHeads[MM_POOL_LISTS_PER_PAGE];
PVOID LockAddress;
ULONG PoolIndex;
LONG PendingFreeDepth;
PVOID PendingFrees;
MMPOOL_TYPE PoolType;
ULONG RunningFrees;
ULONG RunningAllocations;
ULONG Threshold;
ULONG TotalPages;
ULONG TotalBigAllocations;
SIZE_T TotalBytes;
SIZE_T Reserved;
} POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_MMTYPES_H */

View File

@@ -12,13 +12,20 @@
#include <xtdefs.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Architecture-specific enumeration lists forward references */
typedef enum _APIC_DEST_MODE APIC_DEST_MODE, *PAPIC_DEST_MODE;
typedef enum _APIC_DM APIC_DM, *PAPIC_DM;
typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH;
typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE;
typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER;
typedef enum _APIC_TIMER_DIVISOR APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR;
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_EXTENDED CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT CPUID_FEATURES_POWER_MANAGEMENT, *PCPUID_FEATURES_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_STANDARD1 CPUID_FEATURES_STANDARD1, *PCPUID_FEATURES_STANDARD1;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF0 CPUID_FEATURES_STANDARD7_LEAF0, *PCPUID_FEATURES_STANDARD7_LEAF0;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF1 CPUID_FEATURES_STANDARD7_LEAF1, *PCPUID_FEATURES_STANDARD7_LEAF1;
@@ -42,6 +49,7 @@ typedef struct _FX_SAVE_AREA FX_SAVE_AREA, *PFX_SAVE_AREA;
typedef struct _FX_SAVE_FORMAT FX_SAVE_FORMAT, *PFX_SAVE_FORMAT;
typedef struct _HARDWARE_LEGACY_PTE HARDWARE_LEGACY_PTE, *PHARDWARE_LEGACY_PTE;
typedef struct _HARDWARE_MODERN_PTE HARDWARE_MODERN_PTE, *PHARDWARE_MODERN_PTE;
typedef struct _IOAPIC_DATA IOAPIC_DATA, *PIOAPIC_DATA;
typedef struct _KDESCRIPTOR KDESCRIPTOR, *PKDESCRIPTOR;
typedef struct _KEXCEPTION_FRAME KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
typedef struct _KGDTENTRY KGDTENTRY, *PKGDTENTRY;
@@ -70,7 +78,9 @@ typedef struct _MMPML3_PTE_PROTOTYPE MMPML3_PTE_PROTOTYPE, *PMMPML3_PTE_PROTOTYP
typedef struct _MMPML3_PTE_SOFTWARE MMPML3_PTE_SOFTWARE, *PMMPML3_PTE_SOFTWARE;
typedef struct _MMPML3_PTE_SUBSECTION MMPML3_PTE_SUBSECTION, *PMMPML3_PTE_SUBSECTION;
typedef struct _MMPML3_PTE_TRANSITION MMPML3_PTE_TRANSITION, *PMMPML3_PTE_TRANSITION;
typedef struct _POOL_DESCRIPTOR POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
typedef struct _TIMER_CAPABILITIES TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
/* Unions forward references */
typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
@@ -78,6 +88,7 @@ typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGIS
typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER;
typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
typedef union _HARDWARE_PTE HARDWARE_PTE, *PHARDWARE_PTE;
typedef union _IOAPIC_REDIRECTION_REGISTER IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
typedef union _MMPML2_PTE MMPML2_PTE, *PMMPML2_PTE;
typedef union _MMPML3_PTE MMPML3_PTE, *PMMPML3_PTE;
typedef union _MMPTE MMPDE, *PMMPDE;
@@ -88,4 +99,5 @@ typedef union _PIC_I8259_ICW2 PIC_I8259_ICW2, *PPIC_I8259_ICW2;
typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3;
typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_XTSTRUCT_H */

View File

@@ -58,6 +58,10 @@
#define PCI_STATUS_SIGNALED_SYSTEM_ERROR 0x4000
#define PCI_STATUS_DETECTED_PARITY_ERROR 0x8000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* PCI bridge control registers */
typedef struct _PCI_BRIDGE_CONTROL_REGISTER
{
@@ -214,4 +218,5 @@ typedef struct _PCI_TYPE1_DEVICE
PCI_BRIDGE_CONTROL_REGISTER Bridge;
} PCI_TYPE1_DEVICE, *PPCI_TYPE1_DEVICE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_IOTYPES_H */

View File

@@ -13,6 +13,9 @@
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel debugger routines forward references */
XTCLINK
XTCDECL
@@ -20,4 +23,5 @@ VOID
DbgPrint(PCWSTR Format,
...);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KDFUNCS_H */

View File

@@ -21,6 +21,10 @@
#define DEBUG_PROVIDER_COMPORT 0x00000001
#define DEBUG_PROVIDER_FRAMEBUFFER 0x00000002
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel routine callbacks */
typedef XTSTATUS (XTAPI *PKD_INIT_ROUTINE)();
typedef VOID (*PKD_PRINT_ROUTINE)(IN PCWSTR Format, IN ...);
@@ -42,4 +46,5 @@ typedef struct _KD_DISPATCH_TABLE
RTL_PRINT_CONTEXT PrintContext;
} KD_DISPATCH_TABLE, *PKD_DISPATCH_TABLE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KDTYPES_H */

View File

@@ -15,6 +15,9 @@
#include <ketypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel services routines forward references */
XTCLINK
XTFASTCALL
@@ -159,4 +162,5 @@ XTAPI
BOOLEAN
KeSignalCallDpcSynchronize(IN PVOID SystemArgument);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KEFUNCS_H */

View File

@@ -49,6 +49,10 @@
#define THREAD_HIGH_PRIORITY 31
#define THREAD_MAXIMUM_PRIORITY 32
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Adjust reason */
typedef enum _ADJUST_REASON
{
@@ -133,6 +137,37 @@ typedef enum _KPROCESS_STATE
ProcessOutSwap
} KPROCESS_STATE, *PKPROCESS_STATE;
/* Kernel profiling sources */
typedef enum _KPROFILE_SOURCE
{
ProfileTime,
ProfileAlignmentFixup,
ProfileTotalIssues,
ProfilePipelineDry,
ProfileLoadInstructions,
ProfilePipelineFrozen,
ProfileBranchInstructions,
ProfileTotalNonissues,
ProfileDcacheMisses,
ProfileIcacheMisses,
ProfileCacheMisses,
ProfileBranchMispredictions,
ProfileStoreInstructions,
ProfileFpInstructions,
ProfileIntegerInstructions,
Profile2Issue,
Profile3Issue,
Profile4Issue,
ProfileSpecialInstructions,
ProfileTotalCycles,
ProfileIcacheIssues,
ProfileDcacheAccesses,
ProfileMemoryBarrierCycles,
ProfileLoadLinkedIssues,
ProfileXtKernel,
ProfileMaximum
} KPROFILE_SOURCE, *PKPROFILE_SOURCE;
/* Thread state */
typedef enum _KTHREAD_STATE
{
@@ -150,21 +185,23 @@ typedef enum _KTHREAD_STATE
typedef enum _KSPIN_LOCK_QUEUE_LEVEL
{
DispatcherLock,
UnusedSpareLock,
ExpansionLock,
PfnLock,
SystemSpaceLock,
VacbLock,
MasterLock,
NonPagedPoolLock,
NonPagedAllocPoolLock,
IoCancelLock,
WorkQueueLock,
IoVpbLock,
IoDatabaseLock,
IoCompletionLock,
FsStructLock,
FileSystemLock,
AfdWorkQueueLock,
BcbLock,
MmNonPagedPoolLock,
NonPagedPoolLock,
ReservedSystemLock,
TimerTableLock,
MaximumLock
} KSPIN_LOCK_QUEUE_LEVEL, *PKSPIN_LOCK_QUEUE_LEVEL;
@@ -645,4 +682,5 @@ typedef struct _KUBSAN_TYPE_MISMATCH_DATA_V1
UCHAR TypeCheckKind;
} KUBSAN_TYPE_MISMATCH_DATA_V1, *PKUBSAN_TYPE_MISMATCH_DATA_V1;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KEFUNCS_H */

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