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Update SelfMapAddress
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This commit is contained in:
Aiken Harris
2025-12-17 20:35:28 +01:00
parent f1a76bc01a
commit 049c9c6bbd
3 changed files with 32 additions and 6 deletions
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4
sdk/xtdk/amd64/mmtypes.h
View File

@@ -31,10 +31,6 @@
#define MM_PXE_LA57_BASE 0xFFEDF6FB7DA00000ULL
#define MM_P5E_LA57_BASE 0xFFEDF6FB7DBED000ULL
/* Self map address */
#define MM_PML4_SELF_MAP_ADDRESS 0xFFFFF6FB7DBEDF68ULL
#define MM_PML5_SELF_MAP_ADDRESS 0xFFEDF6FB7DBEDF68ULL
/* PTE shift values */
#define MM_PTE_SHIFT 3
#define MM_PTI_SHIFT 12

4
xtoskrnl/mm/amd64/mmgr.cc
View File

@@ -40,7 +40,7 @@ MM::Manager::InitializeMemoryLayout(VOID)
{
/* Configure memory layout for 5-level paging, using 57bit address space and providing a 128 PB address space */
MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFEFA8000000000ULL;
MemoryLayout.SelfMapAddress = (PVOID)MM_PML5_SELF_MAP_ADDRESS;
MemoryLayout.SelfMapAddress = (PVOID)MM_P5E_LA57_BASE;
/* Define the non-paged and paged pool regions */
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
@@ -59,7 +59,7 @@ MM::Manager::InitializeMemoryLayout(VOID)
{
/* Configure memory layout for 4-level paging, using 48bit address space and providing a 128 TB address space */
MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xFFFFFA8000000000ULL;
MemoryLayout.SelfMapAddress = (PVOID)MM_PML4_SELF_MAP_ADDRESS;
MemoryLayout.SelfMapAddress = (PVOID)MM_PXE_BASE;
/* Define the non-paged and paged pool regions */
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);

30
xtoskrnl/mm/i686/mmgr.cc
View File

@@ -47,9 +47,39 @@ MM::Manager::InitializeMemoryLayout(VOID)
if(MM::Paging::GetXpaStatus())
{
/* Configure memory layout for 3-level paging, using 36bit address space and providing a 64 GB address space */
MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xB0000000;
MemoryLayout.SelfMapAddress = (PVOID)MM_PTE_BASE;
/* Define the non-paged and paged pool regions */
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolEnd = (PVOID)0xEEFFFFFF;
MemoryLayout.PagedPoolStart = (PVOID)0xE2000000;
MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
/* Define hyperspace, system PTE space, and the user space limit */
MemoryLayout.HyperSpaceStart = (PVOID)0xC0800000;
MemoryLayout.HyperSpaceEnd = (PVOID)0xC0BFFFFF;
MemoryLayout.SystemSpaceStart = (PVOID)0xC0C00000;
MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
MemoryLayout.UserSpaceEnd = (PVOID)0x7FFEFFFF;
}
else
{
/* Configure memory layout for 2-level paging, using 32bit address space and providing a 4 GB address space */
MemoryLayout.PfnDatabaseAddress = (PMMPFN)0xB0000000;
MemoryLayout.SelfMapAddress = (PVOID)MM_PTE_BASE;
/* Define the non-paged and paged pool regions */
MemoryLayout.NonPagedPoolStart = (PVOID)((ULONG_PTR)MemoryLayout.PfnDatabaseAddress + PfnDatabaseSize * MM_PAGE_SIZE);
MemoryLayout.NonPagedPoolEnd = (PVOID)0xFFBE0000;
MemoryLayout.PagedPoolStart = (PVOID)0xE1000000;
MemoryLayout.PagedPoolEnd = (PVOID)(((ULONG_PTR)MemoryLayout.PagedPoolStart + PagedPoolSize) - 1);
/* Define hyperspace, system PTE space, and the user space limit */
MemoryLayout.HyperSpaceStart = (PVOID)0xC0400000;
MemoryLayout.HyperSpaceEnd = (PVOID)0xC07FFFFF;
MemoryLayout.SystemSpaceStart = (PVOID)0xC0800000;
MemoryLayout.SystemSpaceEnd = (PVOID)((ULONG_PTR)MemoryLayout.SystemSpaceStart + (NumberOfSystemPtes + 1) * MM_PAGE_SIZE);
MemoryLayout.UserSpaceEnd = (PVOID)0x7FFEFFFF;
}
}