Add non-PAE paging support to BlMapPage
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0d3fb550f2
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1ffddfd0e2
@ -31,7 +31,7 @@ BlBuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
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EFI_STATUS Status;
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ULONG Index;
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/* Check the page map level to determine which paging structure to create. */
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/* Check the page map level to determine which paging structure to create */
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if(PageMap->PageMapLevel == 3)
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{
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/* Allocate a page for the 3-level page map structure (PAE enabled) */
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@ -189,55 +189,77 @@ BlMapPage(IN PXTBL_PAGE_MAPPING PageMap,
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IN ULONG_PTR PhysicalAddress,
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IN ULONG NumberOfPages)
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{
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SIZE_T Pml1Entry, Pml2Entry, Pml3Entry;
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PHARDWARE_PTE Pml1, Pml2, Pml3;
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SIZE_T PageFrameNumber;
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PVOID Pml1, Pml2, Pml3;
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SIZE_T Pml1Entry, Pml2Entry, Pml3Entry;
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PHARDWARE_PTE PmlTable;
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PHARDWARE_LEGACY_PTE LegacyPmlTable;
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EFI_STATUS Status;
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/* Set the Page Frame Number (PFN) */
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PageFrameNumber = PhysicalAddress >> EFI_PAGE_SHIFT;
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/* Do the recursive mapping */
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/* Map all requested pages */
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while(NumberOfPages > 0)
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{
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/* Calculate the indices in the various Page Tables from the virtual address */
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Pml3Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 30)) >> 30;
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Pml2Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 21)) >> 21;
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Pml1Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 12)) >> 12;
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/* Check page map level */
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/* Check the paging mode to use the correct page table structure */
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if(PageMap->PageMapLevel == 3)
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{
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/* Three level Page Map */
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Pml3 = ((PHARDWARE_PTE)(PageMap->PtePointer));
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/* Calculate the indices for PAE page tables */
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Pml3Entry = (VirtualAddress >> 30) & 0x3;
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Pml2Entry = (VirtualAddress >> 21) & 0x1FF;
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Pml1Entry = (VirtualAddress >> 12) & 0x1FF;
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/* Get PML2 */
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/* Get Page Directory Pointer Table (PML3) */
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Pml3 = PageMap->PtePointer;
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/* Get Page Directory (PML2) */
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Status = BlpGetNextPageTable(PageMap, Pml3, Pml3Entry, &Pml2);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Memory mapping failure */
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/* Failed to get the Page Table, abort mapping */
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return Status;
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}
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/* Get Page Table (PML1) */
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Status = BlpGetNextPageTable(PageMap, Pml2, Pml2Entry, &Pml1);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Failed to get the Page Table, abort mapping */
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return Status;
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}
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/* Set the 64-bit PTE entry */
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PmlTable = (PHARDWARE_PTE)Pml1;
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RtlZeroMemory(&PmlTable[Pml1Entry], sizeof(HARDWARE_PTE));
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PmlTable[Pml1Entry].PageFrameNumber = PageFrameNumber;
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PmlTable[Pml1Entry].Valid = 1;
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PmlTable[Pml1Entry].Writable = 1;
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}
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else
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{
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/* Two level Page Map */
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Pml2 = ((PHARDWARE_PTE)(PageMap->PtePointer));
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}
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/* Calculate the indices for non-PAE page tables */
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Pml2Entry = (VirtualAddress >> 22) & 0x3FF;
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Pml1Entry = (VirtualAddress >> 12) & 0x3FF;
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/* Get PML1 */
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Status = BlpGetNextPageTable(PageMap, Pml2, Pml2Entry, &Pml1);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Memory mapping failure */
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return Status;
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}
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/* Get Page Directory (PML2) */
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Pml2 = PageMap->PtePointer;
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/* Set paging entry settings */
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RtlZeroMemory(&Pml1[Pml1Entry], sizeof(HARDWARE_PTE));
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Pml1[Pml1Entry].PageFrameNumber = PageFrameNumber;
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Pml1[Pml1Entry].Valid = 1;
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Pml1[Pml1Entry].Writable = 1;
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/* Get Page Table (PML1) */
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Status = BlpGetNextPageTable(PageMap, Pml2, Pml2Entry, &Pml1);
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if(Status != STATUS_EFI_SUCCESS)
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{
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/* Failed to get the Page Table, abort mapping */
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return Status;
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}
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/* Set the 32-bit PTE entry */
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LegacyPmlTable = (PHARDWARE_LEGACY_PTE)Pml1;
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RtlZeroMemory(&LegacyPmlTable[Pml1Entry], sizeof(HARDWARE_LEGACY_PTE));
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LegacyPmlTable[Pml1Entry].PageFrameNumber = (UINT32)PageFrameNumber;
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LegacyPmlTable[Pml1Entry].Valid = 1;
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LegacyPmlTable[Pml1Entry].Writable = 1;
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}
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/* Take next virtual address and PFN */
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VirtualAddress += EFI_PAGE_SIZE;
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