update AP bootstrap code

xtoskrnl/ar/amd64/archsmp.S

@@ -12,17 +12,74 @@
 .text
 
 
+.global ArBootstrapPageMap
+
 .global ArStartApplicationProcessor
 ArStartApplicationProcessor:
     /* 16-bit code (real mode) */
     .code16
 
+    /* Turn off interrupts and clear direction flag */
     cli
     cld
-    hlt
+
+    /* Load temporary GDT */
+    lgdt (ArpApTemporaryGdtSize - ArStartApplicationProcessor + 0x1000)
+
+    /* Enable bit 0 in CR0 to enable Protected Mode */
+    movl %cr0, %eax
+    orl $0x1, %eax
+    movl %eax, %cr0
+
+    /* Long jump into 32bits */
+    ljmpl $0x8, $(ApplicationProcessor32 - ArStartApplicationProcessor + 0x1000)
 
     /* 32-bit code (protected mode) */
     .code32
+ApplicationProcessor32:
+
+    /* Fix segment registers */
+    mov $0x10, %ax
+    mov %ax, %ds
+    mov %ax, %es
+    mov %ax, %fs
+    mov %ax, %gs
+    mov %ax, %ss
+
+    /* Enable LM and NX in the EFER. */
+    mov $0xC0000080, %ecx
+    rdmsr
+    or $0x900, %eax
+    wrmsr
+
+    /* Enable PAE and PSE */
+    mov %cr4, %eax
+    or $0x668, %eax
+    mov %eax, %cr4
+
+    /* Install page map in CR3 */
+    mov (ArBootstrapPageMap - ArStartApplicationProcessor + 0x1000), %eax
+    mov %eax, %cr3
+
+    /* Enable paging */
+    mov %cr0, %eax
+    or $0x80010000, %eax
+    mov %eax, %cr0
+
+    /* Long jump into 64bits */
+    ljmpl $0x8, $(ApplicationProcessor64 - ArStartApplicationProcessor + 0x1000)
 
     /* 64-bit code (long mode) */
     .code64
+ApplicationProcessor64:
+
+    /* HALT CPU in long mode */
+    hlt
+
+.align 8
+ArpApTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00CF92000000FFFF, 0x00AF9A000000FFFF
+ArpApTemporaryGdtSize: .short ArpApTemporaryGdtSize - ArpApTemporaryGdtDesc - 1
+ArpApTemporaryGdtBase: .long ArpApTemporaryGdtDesc - ArStartApplicationProcessor + 0x1000
+ArBootstrapPageMap: .quad 0x0000000000000000
+
+ArStartApplicationProcessorEnd: