Fix loading CS segment for AMD64 architecture
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@ -235,30 +235,42 @@ ArLoadSegment(IN USHORT Segment,
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switch(Segment)
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{
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case SEGMENT_CS:
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asm volatile("movl %0, %%cs"
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/* Load CS Segment */
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asm volatile("mov %0, %%rax\n"
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"push %%rax\n"
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"lea label(%%rip), %%rax\n"
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"push %%rax\n"
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"lretq\n"
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"label:"
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:
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: "r" (Source));
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: "ri" ((ULONGLONG)Source)
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: "rax");
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break;
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case SEGMENT_DS:
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/* Load DS Segment */
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asm volatile("movl %0, %%ds"
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:
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: "r" (Source));
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break;
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case SEGMENT_ES:
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/* Load ES Segment */
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asm volatile("movl %0, %%es"
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:
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: "r" (Source));
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break;
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case SEGMENT_FS:
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/* Load FS Segment */
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asm volatile("movl %0, %%fs"
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:
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: "r" (Source));
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break;
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case SEGMENT_GS:
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/* Load GS Segment */
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asm volatile("movl %0, %%gs"
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:
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: "r" (Source));
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break;
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/* Load SS Segment */
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case SEGMENT_SS:
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asm volatile("movl %0, %%ss"
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:
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