Merge branch 'master' into prcb-cpu-features

This commit is contained in:
2023-11-26 18:53:01 +01:00
21 changed files with 402 additions and 23 deletions

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@@ -12,10 +12,29 @@
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* APIC base address */
#define APIC_BASE 0xFFFFFFFFFFFE0000ULL
#define APIC_BASE 0xFFFFFFFFFFFE0000
/* APIC vector definitions */
#define APIC_VECTOR_ZERO 0x00
#define APIC_VECTOR_APC 0x1F
#define APIC_VECTOR_DPC 0x2F
#define APIC_VECTOR_CMCI 0x35
#define APIC_VECTOR_SPURIOUS 0x3F
#define APIC_VECTOR_REBOOT 0x50
#define APIC_VECTOR_GENERIC 0xC1
#define APIC_VECTOR_SYNC 0xD1
#define APIC_VECTOR_CLOCK 0xD1
#define APIC_VECTOR_CLOCK_IPI 0xD2
#define APIC_VECTOR_IPI 0xE1
#define APIC_VECTOR_ERROR 0xE3
#define APIC_VECTOR_POWERFAIL 0xEF
#define APIC_VECTOR_PROFILE 0xFD
#define APIC_VECTOR_PERF 0xFE
#define APIC_VECTOR_NMI 0xFF
/* Serial port I/O addresses */
#define COMPORT_ADDRESSES {0x000, 0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}

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@@ -106,6 +106,14 @@
#define APC_LEVEL 1
#define DISPATCH_LEVEL 2
#define CMC_LEVEL 5
#define DEVICE1_LEVEL 6
#define DEVICE2_LEVEL 7
#define DEVICE3_LEVEL 8
#define DEVICE4_LEVEL 9
#define DEVICE5_LEVEL 10
#define DEVICE6_LEVEL 11
#define DEVICE7_LEVEL 12
#define SYNC_LEVEL 12
#define CLOCK_LEVEL 13
#define IPI_LEVEL 14
#define DRS_LEVEL 14
@@ -361,7 +369,7 @@ typedef struct _KSWITCH_FRAME
ULONG64 P4Home;
ULONG64 P5Home;
ULONG MxCsr;
KIRQL ApcBypass;
KRUNLEVEL ApcBypass;
UCHAR Reserved[3];
ULONG64 Rbp;
ULONG64 Return;
@@ -376,7 +384,7 @@ typedef struct _KTRAP_FRAME
ULONG64 P4Home;
ULONG64 P5;
KPROCESSOR_MODE PreviousMode;
KIRQL PreviousIrql;
KRUNLEVEL PreviousRunLevel;
UCHAR FaultIndicator;
UCHAR ExceptionActive;
ULONG MxCsr;
@@ -540,7 +548,7 @@ typedef struct _KPROCESSOR_BLOCK
};
};
PKIDTENTRY IdtBase;
KIRQL Irql;
KRUNLEVEL RunLevel;
KPROCESSOR_CONTROL_BLOCK Prcb;
ULONG ContextSwitches;
} KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;

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@@ -12,11 +12,35 @@
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* APIC base address */
#define APIC_BASE 0xFFFE0000
/* APIC vector definitions */
#define APIC_VECTOR_ZERO 0x00
#define APIC_VECTOR_SPURIOUS 0x1F
#define APIC_VECTOR_APC 0x3D
#define APIC_VECTOR_DPC 0x41
#define APIC_VECTOR_REBOOT 0x50
#define APIC_VECTOR_DEVICE1 0x51
#define APIC_VECTOR_DEVICE2 0x61
#define APIC_VECTOR_DEVICE3 0x71
#define APIC_VECTOR_DEVICE4 0x81
#define APIC_VECTOR_DEVICE5 0x91
#define APIC_VECTOR_DEVICE6 0xA1
#define APIC_VECTOR_DEVICE7 0xB1
#define APIC_VECTOR_GENERIC 0xC1
#define APIC_VECTOR_SYNC 0xC1
#define APIC_VECTOR_CLOCK 0xD1
#define APIC_VECTOR_IPI 0xE1
#define APIC_VECTOR_ERROR 0xE3
#define APIC_VECTOR_POWERFAIL 0xEF
#define APIC_VECTOR_PROFILE 0xFD
#define APIC_VECTOR_PERF 0xFE
#define APIC_VECTOR_NMI 0xFF
/* Serial port I/O addresses */
#define COMPORT_ADDRESSES {0x000, 0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}

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@@ -135,6 +135,13 @@
#define APC_LEVEL 1
#define DISPATCH_LEVEL 2
#define CMCI_LEVEL 5
#define DEVICE1_LEVEL 6
#define DEVICE2_LEVEL 7
#define DEVICE3_LEVEL 8
#define DEVICE4_LEVEL 9
#define DEVICE5_LEVEL 10
#define DEVICE6_LEVEL 11
#define DEVICE7_LEVEL 12
#define PROFILE_LEVEL 27
#define SYNC_LEVEL 27
#define CLOCK_LEVEL 28
@@ -471,7 +478,7 @@ typedef struct _KPROCESSOR_BLOCK
THREAD_INFORMATION_BLOCK ThreadInformationBlock;
PKPROCESSOR_BLOCK Self;
PKPROCESSOR_CONTROL_BLOCK CurrentPrcb;
KIRQL Irql;
KRUNLEVEL RunLevel;
PKIDTENTRY IdtBase;
PKGDTENTRY GdtBase;
PKTSS TssBase;

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@@ -280,7 +280,7 @@ typedef struct _KSPIN_LOCK_QUEUE
typedef struct _KLOCK_QUEUE_HANDLE
{
KSPIN_LOCK_QUEUE LockQueue;
KIRQL OldIrql;
KRUNLEVEL OldRunLevel;
} KLOCK_QUEUE_HANDLE, *PKLOCK_QUEUE_HANDLE;
/* Queue object structure definition */
@@ -431,7 +431,7 @@ typedef struct _KTHREAD
};
KWAIT_BLOCK WaitBlock[KTHREAD_WAIT_BLOCK + 1];
UCHAR NpxState;
KIRQL WaitIrql;
KRUNLEVEL WaitRunLevel;
LIST_ENTRY QueueListEntry;
PKTRAP_FRAME TrapFrame;
PVOID CallbackStack;

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@@ -17,15 +17,15 @@
/* Kernel affinity */
typedef ULONG_PTR KAFFINITY, *PKAFFINITY;
/* Interrupt Request Level (IRQL) */
typedef UCHAR KIRQL, *PKIRQL;
/* Kernel priority */
typedef LONG KPRIORITY, *PKPRIORITY;
/* Processor modes */
typedef CHAR KPROCESSOR_MODE, *PKPROCESSOR_MODE;
/* Interrupt Request Run Level (IRQL) */
typedef UCHAR KRUNLEVEL, *PKRUNLEVEL;
/* Spin locks synchronization mechanism */
typedef ULONG_PTR KSPIN_LOCK, *PKSPIN_LOCK;