Implement support for APIC Self-InterProcessor Interrupts (SIPI)
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@@ -134,6 +134,7 @@ typedef enum _APIC_REGISTER
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APIC_TICR = 0x38, /* Initial Count Register for Timer */
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APIC_TICR = 0x38, /* Initial Count Register for Timer */
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APIC_TCCR = 0x39, /* Current Count Register for Timer */
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APIC_TCCR = 0x39, /* Current Count Register for Timer */
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APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
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APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
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APIC_SIPI = 0x3F, /* Self-IPI Register */
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APIC_EAFR = 0x40, /* extended APIC Feature register */
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APIC_EAFR = 0x40, /* extended APIC Feature register */
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APIC_EACR = 0x41, /* Extended APIC Control Register */
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APIC_EACR = 0x41, /* Extended APIC Control Register */
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APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
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APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
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@@ -141,6 +141,7 @@ typedef enum _APIC_REGISTER
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APIC_TICR = 0x38, /* Initial Count Register for Timer */
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APIC_TICR = 0x38, /* Initial Count Register for Timer */
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APIC_TCCR = 0x39, /* Current Count Register for Timer */
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APIC_TCCR = 0x39, /* Current Count Register for Timer */
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APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
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APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
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APIC_SIPI = 0x3F, /* Self-IPI Register */
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APIC_EAFR = 0x40, /* extended APIC Feature register */
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APIC_EAFR = 0x40, /* extended APIC Feature register */
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APIC_EACR = 0x41, /* Extended APIC Control Register */
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APIC_EACR = 0x41, /* Extended APIC Control Register */
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APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
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APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
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@@ -404,6 +404,33 @@ HL::Pic::SendIpi(ULONG ApicId,
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}
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}
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}
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}
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/**
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* Sends a Self-IPI (Inter-Processor Interrupt) to the current CPU.
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*
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* @param Vector
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* Supplies the IPI vector to send.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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HL::Pic::SendSelfIpi(ULONG Vector)
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{
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/* Check current APIC mode */
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if(ApicMode == APIC_MODE_X2APIC)
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{
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/* In x2APIC mode, a dedicated Self-IPI register is used */
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WriteApicRegister(APIC_SIPI, Vector);
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}
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else
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{
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/* In xAPIC compatibility mode, ICR0 is used */
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WriteApicRegister(APIC_ICR0, Vector | (1 << 18));
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}
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}
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/**
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/**
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* Writes to the APIC register.
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* Writes to the APIC register.
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*
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*
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@@ -28,6 +28,7 @@ namespace HL
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STATIC XTAPI VOID SendEoi(VOID);
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STATIC XTAPI VOID SendEoi(VOID);
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STATIC XTAPI VOID SendIpi(ULONG ApicId,
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STATIC XTAPI VOID SendIpi(ULONG ApicId,
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ULONG Vector);
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ULONG Vector);
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STATIC XTAPI VOID SendSelfIpi(ULONG Vector);
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STATIC XTFASTCALL VOID WriteApicRegister(IN APIC_REGISTER Register,
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STATIC XTFASTCALL VOID WriteApicRegister(IN APIC_REGISTER Register,
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IN ULONGLONG Value);
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IN ULONGLONG Value);
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