Implement HlLoadTaskRegister() for loading TSS segment selector into task register
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This commit is contained in:
Rafal Kupiec 2023-01-20 20:24:05 +01:00
parent 9cbe2d458c
commit f20ab3e52e
Signed by: belliash
GPG Key ID: 4E829243E0CFE6B4
4 changed files with 46 additions and 0 deletions

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@ -59,6 +59,10 @@ VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value);
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source);
XTCDECL
ULONG_PTR
HlReadControlRegister(IN USHORT ControlRegister);

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@ -59,6 +59,10 @@ VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value);
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source);
XTCDECL
ULONG_PTR
HlReadControlRegister(IN USHORT ControlRegister);

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@ -236,6 +236,25 @@ HlIoPortOutLong(IN USHORT Port,
"Nd" (Port));
}
/**
* Loads Task Register (TR) with a segment selector that points to TSS.
*
* @param Source
* Supplies the segment selector in the GDT describing the TSS.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source)
{
asm volatile("ltr %0"
:
: "rm" (Source));
}
/**
* Reads the specified CPU control register and returns its value.
*

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@ -236,6 +236,25 @@ HlIoPortOutLong(IN USHORT Port,
"Nd" (Port));
}
/**
* Loads Task Register (TR) with a segment selector that points to TSS.
*
* @param Source
* Supplies the segment selector in the GDT describing the TSS.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source)
{
asm volatile("ltr %0"
:
: "rm" (Source));
}
/**
* Reads the specified CPU control register and returns its value.
*