Implement HlLoadTaskRegister() for loading TSS segment selector into task register
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Esse commit está contido em:
2023-01-20 20:24:05 +01:00
commit f20ab3e52e
4 arquivos alterados com 46 adições e 0 exclusões

Ver arquivo

@@ -59,6 +59,10 @@ VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value);
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source);
XTCDECL
ULONG_PTR
HlReadControlRegister(IN USHORT ControlRegister);

Ver arquivo

@@ -59,6 +59,10 @@ VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value);
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source);
XTCDECL
ULONG_PTR
HlReadControlRegister(IN USHORT ControlRegister);

Ver arquivo

@@ -236,6 +236,25 @@ HlIoPortOutLong(IN USHORT Port,
"Nd" (Port));
}
/**
* Loads Task Register (TR) with a segment selector that points to TSS.
*
* @param Source
* Supplies the segment selector in the GDT describing the TSS.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source)
{
asm volatile("ltr %0"
:
: "rm" (Source));
}
/**
* Reads the specified CPU control register and returns its value.
*

Ver arquivo

@@ -236,6 +236,25 @@ HlIoPortOutLong(IN USHORT Port,
"Nd" (Port));
}
/**
* Loads Task Register (TR) with a segment selector that points to TSS.
*
* @param Source
* Supplies the segment selector in the GDT describing the TSS.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source)
{
asm volatile("ltr %0"
:
: "rm" (Source));
}
/**
* Reads the specified CPU control register and returns its value.
*