perikiyoxd
289b1bdebc
Rework _CPU_FEATURES structure
2023-11-27 22:04:31 +01:00
perikiyoxd
323c173abe
Merge branch 'master' into prcb-cpu-features
2023-11-27 19:11:34 +01:00
belliash
4ca4e298f0
Add more PIC/APIC related definitions
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2023-11-26 23:35:14 +01:00
perikiyoxd
73c768ba0e
Merge branch 'master' into prcb-cpu-features
2023-11-26 18:53:01 +01:00
belliash
5b48525b1d
Increase commit hash to 10 characters to match Gitea
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2023-11-26 16:26:22 +01:00
belliash
4701351bd7
Add missing SYNC_LEVEL definition
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2023-11-25 22:14:45 +01:00
belliash
14a966043e
Add missing Interrupt request level definitions
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2023-11-25 18:50:59 +01:00
belliash
0e6bf984a5
Add APIC vector definitions
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2023-11-25 18:33:01 +01:00
belliash
55cc62f5a0
Rename KIRQL to KRUNLEVEL type
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2023-11-25 00:32:55 +01:00
perikiyoxd
a270c08dcf
feat: Add CPU vendor and features identification
...
Add functionality to identify the CPU vendor and features using the CPUID instruction.
The CPU vendor information is stored in the Processor Control Block (PRCB),
including the vendor name and a corresponding enumeration.
CPU features are also retrieved and stored in the PRCB.
Previously, the CPU vendor was not properly stored in the PRCB, caused by a missing type cast.
Using Rtl functions to copy the CPU vendor name to the PRCB.
Details:
- Introduced functions `ArpSetCpuVendor` and `ArpSetCpuFeatures` to set CPU vendor and features, respectively.
- Modified `ArpIdentifyProcessor` to call the new functions for vendor and features identification.
- Added `CPU_FEATURES` structure to `KPROCESSOR_CONTROL_BLOCK` structure to store CPU features.
Tests:
- Tested x86_64 on QEMU. Verified that the CPU vendor and features are correctly identified and stored in the PRCB.
2023-11-23 23:26:39 +01:00
perikiyoxd
3c4ebe12e1
POSIX compliant stream redirection
...
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Reviewed-on: #1
Reviewed-by: Rafal Kupiec <belliash@noreply.codingworkshop.git >
Co-authored-by: Pedro Valadés <perikiyoxd@gmail.com >
Co-committed-by: Pedro Valadés <perikiyoxd@gmail.com >
2023-11-23 23:26:26 +01:00
perikiyoxd
a01ccff6dc
POSIX compliant stream redirection
...
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Reviewed-on: #1
Reviewed-by: Rafal Kupiec <belliash@noreply.codingworkshop.git >
Co-authored-by: PerikiyoXD <perikiyoxd@gmail.com >
Co-committed-by: PerikiyoXD <perikiyoxd@gmail.com >
2023-11-23 17:02:30 +01:00
belliash
c526e63b7a
Add EFI Framework MP services protocol related structures
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2023-11-23 15:38:32 +01:00
belliash
d8403d01f5
Verify kernel and boot loader compatibility
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2023-11-22 17:22:57 +01:00
belliash
c4143c63f9
Enable LLVM MASM Assembly
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2023-11-20 23:30:44 +01:00
belliash
a3c28cee73
Initial XTLDR APIC support, finds and maps base APIC address for kernel
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2023-11-20 15:18:22 +01:00
belliash
3d0a48df26
Give qemu direct access to the terminal
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2023-11-19 20:41:21 +01:00
belliash
575b842d05
Add APIC Registers address map (APIC_REGISTER enumeration list)
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2023-11-19 00:57:27 +01:00
belliash
42b7c3698c
Add missing I/O register routines forward references
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2023-11-19 00:41:21 +01:00
belliash
64ffe0d7d7
Add EFI task priority levels
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2023-11-17 00:11:30 +01:00
belliash
71e7adadbd
Correct typo
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2023-11-17 00:10:54 +01:00
belliash
d083d00ab1
Add EFI MP services protocol structures
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2023-11-16 23:06:01 +01:00
belliash
1a932468a2
Add some DPC related stubs
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2023-11-16 14:53:54 +01:00
belliash
67496bef28
Add KLOCK_QUEUE_HANDLE structure definition
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2023-11-11 11:36:22 +01:00
belliash
91d65bb937
Define max ULONG type limit
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2023-11-11 09:41:44 +01:00
belliash
83c0accc5f
Update EFLAGS masks
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2023-11-09 16:12:24 +01:00
belliash
641b34b119
Fixes in i686 version of KepInitializeThreadContext()
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2023-11-08 16:06:01 +01:00
belliash
362eefc2b3
Fixes in AMD64 version of KepInitializeThreadContext() to get rid of PageFault exception
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2023-11-07 15:34:49 +01:00
belliash
91ce0f9947
Compensate missing return address, which is a 4-byte on i686 and an 8-byte on amd64
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2023-11-05 20:07:13 +01:00
belliash
ba833422b0
Implement ExCompleteRundownProtection() and ExReInitializeRundownProtection() routines and add stub for ExWaitForRundownProtectionRelease()
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2023-11-05 09:50:04 +01:00
belliash
e11ef2f008
Use correct calling convention for a deferred routine
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2023-10-30 15:28:00 +01:00
belliash
aa17be6eb3
Implement KeSetTargetProcessorDpc() routine
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2023-10-29 19:59:21 +01:00
belliash
be7981f614
Implement KeInitializeThreadedDpc() and export it together with KeInitializeDpc()
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2023-10-29 19:45:45 +01:00
belliash
f05a262da2
Cleanup XTDK and XTOSKRNL headers
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2023-10-29 09:58:47 +01:00
belliash
841a6b304b
Cleanup KE subsystem headers
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2023-10-29 09:14:46 +01:00
belliash
798e4c1d22
Cleanup MM subsystem headers
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2023-10-29 00:52:05 +02:00
belliash
cc3e9eb5e6
Add routines used by XTLDR
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2023-10-29 00:31:57 +02:00
belliash
600c86949b
Cleanup RTL subsystem headers
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2023-10-29 00:14:01 +02:00
belliash
d920cae481
Fix build by defining more routines used by XTLDR
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2023-10-28 23:41:52 +02:00
belliash
ad15c55a39
Cleanup AR subsystem headers
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2023-10-28 23:35:34 +02:00
belliash
d55946c3cf
Cleanup HL subsystem headers
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2023-10-28 22:56:04 +02:00
belliash
ebb740b0e7
Add more readmes to describe XTOS components and source code tree directories
ci/woodpecker/push/build Pipeline was successful
2023-05-18 21:24:33 +02:00
belliash
e11d9dcfad
Make a place for XTBK
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2023-05-18 21:11:36 +02:00
belliash
42669bcfb3
Import readme for XTDK
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2023-05-18 21:00:35 +02:00
belliash
9a059b407e
The declspec 'naked' attribute is not supported on 'x86_64', use attribute instead
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2023-04-12 20:50:42 +02:00
belliash
358b20f1a1
Reorder routines
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2023-04-04 22:35:06 +02:00
belliash
4073b1589d
Rename endian conversion routines to match naming convention
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2023-04-04 21:02:14 +02:00
belliash
2257ad1567
Add XTASSEMBLY routine modifier to instruct compiler to generate code without prolog and epilog
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2023-03-28 17:33:38 +02:00
belliash
bf3d56385f
Add missing forward declarations
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2023-03-24 15:39:07 +01:00
belliash
6402a0d0a4
Update EDK2 OVMF firmware
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2023-03-20 22:28:43 +01:00