30 Commits

Author	SHA1	Message	Date
PerikiyoXD	363e100493	Saving processor features in the processor control block ... Fixed correct AMD Family 25 model detection Fixed procedure for saving processor vendor name (previously corrupted) Added a debugging print of the processor identification	2024-05-06 17:55:37 +02:00
Rafal Kupiec	3aa0413756	Use common routine to set runlevel	2024-04-19 23:52:21 +02:00
Rafal Kupiec	28c89986fb	Tweaks to AMD64 architecture support	2024-04-19 23:37:39 +02:00
Rafal Kupiec	92ee74b494	Rework trap handling to access registers	2024-04-19 16:52:37 +02:00
Rafal Kupiec	cf408519ad	Initialize AMD64 segments properly	2024-04-17 20:02:27 +02:00
Rafal Kupiec	d17b06a180	Register interrupt handlers once the APIC initialization is done	2023-11-28 14:20:23 +01:00
Rafal Kupiec	55cc62f5a0	Rename KIRQL to KRUNLEVEL type	2023-11-25 00:32:55 +01:00
belliash	dfae0b4727	Implement ArSetGdtEntryBase() routine	2023-03-02 22:51:57 +01:00
belliash	d427ca20fb	Always include xtos.h in kernel sources	2023-02-20 00:21:52 +01:00
belliash	d72002187d	Partially implement ArpIdentifyProcessor()	2023-02-10 17:23:47 +01:00
belliash	e645cf664c	Set process and thread information in processor control block	2023-02-09 17:30:24 +01:00
belliash	47f399e987	Set current process and thread in processor control block	2023-02-09 00:02:45 +01:00
belliash	67768ae7a3	Mark ArpIdentifyProcessor() as unimplemented	2023-02-06 16:15:24 +01:00
belliash	385f0e6de0	Not all AMD64 CPUs support large pages and global pages, unfortunately	2023-02-05 22:14:47 +01:00
belliash	911903d0eb	Add missing routine description	2023-02-05 10:08:49 +01:00
belliash	d6aac59199	Let kernel initialize stack on it's own without relying on boot loader	2023-02-05 09:55:59 +01:00
belliash	0b743a5f26	Add stub routine for identifying processor	2023-02-05 00:42:30 +01:00
belliash	c6cadbd655	Initialize MXCSR register	2023-02-05 00:30:12 +01:00
belliash	5eaf7d63a3	Initialize Page Attribute Table	2023-02-05 00:14:34 +01:00
belliash	55cdae7c83	Initialize AMD64 processor registers	2023-02-04 23:40:03 +01:00
belliash	f181215341	Initialize segment registers	2023-02-04 00:17:07 +01:00
belliash	b90f37dad4	Fill in Interrupt Descriptor Table (IDT)	2023-02-03 18:40:10 +01:00
belliash	269214ed34	Another improvements to GDT	2023-02-03 18:00:37 +01:00
belliash	404f2f85c6	Cleanup the Interrupt Stack Table	2023-02-01 23:47:57 +01:00
belliash	7fc1f04cd0	TSS entry is already put into GDT table, just initialize it	2023-02-01 23:37:12 +01:00
belliash	cbd21ced39	Use a size of the structure, not a pointer	2023-02-01 22:38:36 +01:00
belliash	3522539d4b	Initialize Interrupt Descriptor Table (IDT)	2023-02-01 21:56:17 +01:00
belliash	e2813bcdaa	Fix entries in Global Descriptor Table (GDT)	2023-02-01 20:24:55 +01:00
belliash	6f068513cd	Initial processor block initialization	2023-01-30 19:07:05 +01:00
belliash	7bf4a9ab8d	Initialize boot CPU structures inside kernel on AMD64	2023-01-29 00:45:17 +01:00