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94a40501d4
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Mask APIC ICR0 and disable APIC interrupts for initialization time by raising APIC TPR
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2024-05-24 23:39:06 +02:00 |
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c34b6ff6c1
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Take CPU number from processor block
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2024-05-08 21:59:18 +02:00 |
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f66e9aea9e
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Store CPU number and mask interrupts in processor block
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2024-05-07 16:21:38 +02:00 |
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ac0b8ab36a
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Allow to specify CPU number when initializing (A)PIC
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2024-05-07 16:16:49 +02:00 |
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40e0dd8c5e
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Mask LVTERR first to prevent local APIC errors
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2024-05-05 15:24:17 +02:00 |
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c70d2e2afa
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Routines with no prototype cannot use XTAPI calling convention
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2024-02-20 16:37:57 +01:00 |
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77bc796769
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Implement HlClearApicErrors() and HlSendEoi() routines, change HlDisableLegacyPic() calling convention
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2024-02-09 15:11:14 +01:00 |
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31b8cd8d3d
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Update HlDisablePic() description
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2023-11-29 22:43:57 +01:00 |
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Jozef Nagy
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c8a54e602b
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Disable legacy 8259 PIC before enabling APIC
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Reviewed-on: #5
Reviewed-by: Rafal Kupiec <belliash@noreply.codingworkshop.git>
Co-authored-by: Jozef Nagy <schkwve@gmail.com>
Co-committed-by: Jozef Nagy <schkwve@gmail.com>
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2023-11-29 20:07:16 +01:00 |
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9aafa63617
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Move CPU and PIC support into common for i686 and amd64 place
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2023-11-29 18:26:46 +01:00 |
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