perikiyoxd
a270c08dcf
feat: Add CPU vendor and features identification
...
Add functionality to identify the CPU vendor and features using the CPUID instruction.
The CPU vendor information is stored in the Processor Control Block (PRCB),
including the vendor name and a corresponding enumeration.
CPU features are also retrieved and stored in the PRCB.
Previously, the CPU vendor was not properly stored in the PRCB, caused by a missing type cast.
Using Rtl functions to copy the CPU vendor name to the PRCB.
Details:
- Introduced functions `ArpSetCpuVendor` and `ArpSetCpuFeatures` to set CPU vendor and features, respectively.
- Modified `ArpIdentifyProcessor` to call the new functions for vendor and features identification.
- Added `CPU_FEATURES` structure to `KPROCESSOR_CONTROL_BLOCK` structure to store CPU features.
Tests:
- Tested x86_64 on QEMU. Verified that the CPU vendor and features are correctly identified and stored in the PRCB.
2023-11-23 23:26:39 +01:00
belliash
71d0608643
Implement ArGetStackPointer() routine
Builds / ExectOS (amd64) (push) Successful in 30s
Builds / ExectOS (i686) (push) Successful in 28s
2023-11-19 00:09:16 +01:00
belliash
ccd0514416
Implement more CPU-related routines
Builds / ExectOS (amd64) (push) Successful in 29s
Builds / ExectOS (i686) (push) Successful in 26s
2023-11-15 14:52:18 +01:00
belliash
c5a9253ea8
Implement ArLoadLocalDescriptorTable() routine
ci/woodpecker/push/build Pipeline was successful
2023-03-02 23:04:36 +01:00
belliash
dfae0b4727
Implement ArSetGdtEntryBase() routine
ci/woodpecker/push/build Pipeline was successful
2023-03-02 22:51:57 +01:00
belliash
e41de62dab
Implement ArYieldProcessor() routine
ci/woodpecker/push/build Pipeline was successful
2023-02-27 17:28:20 +01:00
belliash
d427ca20fb
Always include xtos.h in kernel sources
ci/woodpecker/push/build Pipeline was successful
2023-02-20 00:21:52 +01:00
belliash
d72002187d
Partially implement ArpIdentifyProcessor()
ci/woodpecker/push/build Pipeline was successful
2023-02-10 17:23:47 +01:00
belliash
e645cf664c
Set process and thread information in processor control block
ci/woodpecker/push/build Pipeline was successful
2023-02-09 17:30:24 +01:00
belliash
47f399e987
Set current process and thread in processor control block
ci/woodpecker/push/build Pipeline was successful
2023-02-09 00:02:45 +01:00
belliash
75c519a70c
Use more generic name for this macro use pointer used behind it will point to kernel debugger after it gets initialized
ci/woodpecker/push/build Pipeline was successful
2023-02-07 19:37:44 +01:00
belliash
67768ae7a3
Mark ArpIdentifyProcessor() as unimplemented
ci/woodpecker/push/build Pipeline was successful
2023-02-06 16:15:24 +01:00
belliash
385f0e6de0
Not all AMD64 CPUs support large pages and global pages, unfortunately
ci/woodpecker/push/build Pipeline was successful
2023-02-05 22:14:47 +01:00
belliash
911903d0eb
Add missing routine description
ci/woodpecker/push/build Pipeline was successful
2023-02-05 10:08:49 +01:00
belliash
d6aac59199
Let kernel initialize stack on it's own without relying on boot loader
ci/woodpecker/push/build Pipeline was successful
2023-02-05 09:55:59 +01:00
belliash
0b743a5f26
Add stub routine for identifying processor
ci/woodpecker/push/build Pipeline was successful
2023-02-05 00:42:30 +01:00
belliash
c6cadbd655
Initialize MXCSR register
ci/woodpecker/push/build Pipeline was successful
2023-02-05 00:30:12 +01:00
belliash
5eaf7d63a3
Initialize Page Attribute Table
ci/woodpecker/push/build Pipeline was successful
2023-02-05 00:14:34 +01:00
belliash
55cdae7c83
Initialize AMD64 processor registers
ci/woodpecker/push/build Pipeline was successful
2023-02-04 23:40:03 +01:00
belliash
f181215341
Initialize segment registers
ci/woodpecker/push/build Pipeline was successful
2023-02-04 00:17:07 +01:00
belliash
b90f37dad4
Fill in Interrupt Descriptor Table (IDT)
ci/woodpecker/push/build Pipeline was successful
2023-02-03 18:40:10 +01:00
belliash
269214ed34
Another improvements to GDT
ci/woodpecker/push/build Pipeline was successful
2023-02-03 18:00:37 +01:00
belliash
a49d0804ce
Add trap handlers for both i686 and amd64
ci/woodpecker/push/build Pipeline was successful
2023-02-02 23:31:32 +01:00
belliash
404f2f85c6
Cleanup the Interrupt Stack Table
ci/woodpecker/push/build Pipeline was successful
2023-02-01 23:47:57 +01:00
belliash
7fc1f04cd0
TSS entry is already put into GDT table, just initialize it
ci/woodpecker/push/build Pipeline was successful
2023-02-01 23:37:12 +01:00
belliash
cbd21ced39
Use a size of the structure, not a pointer
ci/woodpecker/push/build Pipeline was successful
2023-02-01 22:38:36 +01:00
belliash
3522539d4b
Initialize Interrupt Descriptor Table (IDT)
ci/woodpecker/push/build Pipeline was successful
2023-02-01 21:56:17 +01:00
belliash
e2813bcdaa
Fix entries in Global Descriptor Table (GDT)
ci/woodpecker/push/build Pipeline was successful
2023-02-01 20:24:55 +01:00
belliash
a761d3125a
Architecture specific initialization prior to processor structures initialization
ci/woodpecker/push/build Pipeline was successful
2023-01-30 20:34:05 +01:00
belliash
6f068513cd
Initial processor block initialization
ci/woodpecker/push/build Pipeline was successful
2023-01-30 19:07:05 +01:00
belliash
ae60753e33
Add missing source files for i686 architecture
ci/woodpecker/push/build Pipeline was successful
2023-01-29 00:52:05 +01:00
belliash
7bf4a9ab8d
Initialize boot CPU structures inside kernel on AMD64
ci/woodpecker/push/build Pipeline was successful
2023-01-29 00:45:17 +01:00
belliash
8733a23b20
Include kernel top header
ci/woodpecker/push/build Pipeline was successful
2023-01-29 00:34:34 +01:00
belliash
27e2fdf4f2
Introduce architecture library as new kernel subsystem and move selected routines into new subsystem
ci/woodpecker/push/build Pipeline was successful
2023-01-28 10:34:55 +01:00