Refactor MMU for multi-paging support and add 5-Level paging #16
@ -190,7 +190,7 @@ MmMapHardwareMemory(IN PHYSICAL_ADDRESS PhysicalAddress,
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ReturnAddress = (PVOID)(ULONG_PTR)ReturnAddress + MM_PAGE_SIZE;
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ReturnAddress = (PVOID)(ULONG_PTR)ReturnAddress + MM_PAGE_SIZE;
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/* Check if PTE is valid */
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/* Check if PTE is valid */
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if(PtePointer->Valid)
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if(MmpPageMapRoutines->PteValid(PtePointer))
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{
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{
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/* PTE is not available, go to the next one */
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/* PTE is not available, go to the next one */
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BaseAddress = ReturnAddress;
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BaseAddress = ReturnAddress;
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@ -219,9 +219,7 @@ MmMapHardwareMemory(IN PHYSICAL_ADDRESS PhysicalAddress,
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PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(BaseAddress);
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PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(BaseAddress);
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/* Fill the PTE */
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/* Fill the PTE */
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PtePointer->PageFrameNumber = (PFN_NUMBER)(PhysicalAddress.QuadPart >> MM_PAGE_SHIFT);
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MmpPageMapRoutines->SetPte(PtePointer, (PFN_NUMBER)(PhysicalAddress.QuadPart >> MM_PAGE_SHIFT), TRUE);
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PtePointer->Valid = 1;
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PtePointer->Writable = 1;
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/* Advance to the next address */
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/* Advance to the next address */
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PhysicalAddress.QuadPart += MM_PAGE_SIZE;
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PhysicalAddress.QuadPart += MM_PAGE_SIZE;
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@ -268,8 +266,7 @@ MmMarkHardwareMemoryWriteThrough(IN PVOID VirtualAddress,
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for(Page = 0; Page < PageCount; Page++)
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for(Page = 0; Page < PageCount; Page++)
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{
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{
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/* Mark pages as CD/WT */
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/* Mark pages as CD/WT */
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PtePointer->CacheDisable = 1;
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MmpPageMapRoutines->SetPteCaching(PtePointer, TRUE, TRUE);
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PtePointer->WriteThrough = 1;
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PtePointer++;
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PtePointer++;
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}
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}
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}
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}
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@ -302,9 +299,7 @@ MmRemapHardwareMemory(IN PVOID VirtualAddress,
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PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(VirtualAddress);
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PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(VirtualAddress);
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/* Remap the PTE */
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/* Remap the PTE */
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PtePointer->PageFrameNumber = (PFN_NUMBER)(PhysicalAddress.QuadPart >> MM_PAGE_SHIFT);
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MmpPageMapRoutines->SetPte(PtePointer, (PFN_NUMBER)(PhysicalAddress.QuadPart >> MM_PAGE_SHIFT), TRUE);
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PtePointer->Valid = 1;
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PtePointer->Writable = 1;
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/* Check if TLB needs to be flushed */
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/* Check if TLB needs to be flushed */
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if(FlushTlb)
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if(FlushTlb)
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@ -356,11 +351,7 @@ MmUnmapHardwareMemory(IN PVOID VirtualAddress,
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for(Page = 0; Page < PageCount; Page++)
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for(Page = 0; Page < PageCount; Page++)
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{
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{
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/* Unmap the PTE and get the next one */
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/* Unmap the PTE and get the next one */
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PtePointer->CacheDisable = 0;
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MmpPageMapRoutines->ClearPte(PtePointer);
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PtePointer->Valid = 0;
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PtePointer->Writable = 0;
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PtePointer->WriteThrough = 0;
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PtePointer->PageFrameNumber = 0;
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PtePointer++;
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PtePointer++;
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}
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}
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