373 lines
9.8 KiB
ArmAsm
373 lines
9.8 KiB
ArmAsm
/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/ar/amd64/archsup.S
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* DESCRIPTION: Provides AMD64 architecture features not implementable in C
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* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
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* Aiken Harris <harraiken91@gmail.com>
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*/
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#include <xtkmapi.h>
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#include <xtadk.h>
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.altmacro
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.text
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/**
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* Creates a trap or interrupt handler for the specified vector.
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*
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* @param Vector
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* Supplies a trap/interrupt vector number.
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*
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* @param Type
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* Specifies whether the handler is designed to handle an interrupt or a trap.
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*
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* @return This macro does not return any value.
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*
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* @since XT 1.0
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*/
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.macro ArCreateHandler Vector Type
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.global Ar\Type\Vector
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Ar\Type\Vector:
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/* Check handler type */
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.ifc \Type,Trap
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/* Push fake error code for non-error vector traps */
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.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
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push $0
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.endif
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.else
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/* Push fake error code for interrupts */
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push $0
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.endif
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/* Push vector number */
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push $\Vector
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/* Push General Purpose Registers */
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push %rbp
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push %rdi
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push %rsi
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push %r15
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push %r14
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push %r13
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push %r12
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push %r11
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push %r10
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push %r9
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push %r8
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push %rdx
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push %rcx
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push %rbx
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push %rax
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/* Reserve space for other registers and point RBP to the trap frame */
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sub $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %rsp
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lea (%rsp), %rbp
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/* Store segment selectors */
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mov %gs, KTRAP_FRAME_SegGs(%rbp)
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mov %fs, KTRAP_FRAME_SegFs(%rbp)
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mov %es, KTRAP_FRAME_SegEs(%rbp)
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mov %ds, KTRAP_FRAME_SegDs(%rbp)
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/* Store debug registers */
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mov %dr7, %rax
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mov %rax, KTRAP_FRAME_Dr7(%rbp)
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mov %dr6, %rax
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mov %rax, KTRAP_FRAME_Dr6(%rbp)
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mov %dr3, %rax
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mov %rax, KTRAP_FRAME_Dr3(%rbp)
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mov %dr2, %rax
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mov %rax, KTRAP_FRAME_Dr2(%rbp)
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mov %dr1, %rax
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mov %rax, KTRAP_FRAME_Dr1(%rbp)
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mov %dr0, %rax
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mov %rax, KTRAP_FRAME_Dr0(%rbp)
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/* Store CR2 and CR3 */
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mov %cr3, %rax
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mov %rax, KTRAP_FRAME_Cr3(%rbp)
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mov %cr2, %rax
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mov %rax, KTRAP_FRAME_Cr2(%rbp)
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/* Store MxCsr register */
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stmxcsr KTRAP_FRAME_MxCsr(%rbp)
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/* Store XMM registers */
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movdqa %xmm15, KTRAP_FRAME_Xmm15(%rbp)
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movdqa %xmm14, KTRAP_FRAME_Xmm14(%rbp)
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movdqa %xmm13, KTRAP_FRAME_Xmm13(%rbp)
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movdqa %xmm12, KTRAP_FRAME_Xmm12(%rbp)
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movdqa %xmm11, KTRAP_FRAME_Xmm11(%rbp)
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movdqa %xmm10, KTRAP_FRAME_Xmm10(%rbp)
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movdqa %xmm9, KTRAP_FRAME_Xmm9(%rbp)
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movdqa %xmm8, KTRAP_FRAME_Xmm8(%rbp)
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movdqa %xmm7, KTRAP_FRAME_Xmm7(%rbp)
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movdqa %xmm6, KTRAP_FRAME_Xmm6(%rbp)
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movdqa %xmm5, KTRAP_FRAME_Xmm5(%rbp)
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movdqa %xmm4, KTRAP_FRAME_Xmm4(%rbp)
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movdqa %xmm3, KTRAP_FRAME_Xmm3(%rbp)
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movdqa %xmm2, KTRAP_FRAME_Xmm2(%rbp)
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movdqa %xmm1, KTRAP_FRAME_Xmm1(%rbp)
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movdqa %xmm0, KTRAP_FRAME_Xmm0(%rbp)
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/* Test previous mode and swap GS if needed */
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movl $0, KTRAP_FRAME_PreviousMode(%rbp)
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mov KTRAP_FRAME_SegCs(%rbp), %ax
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and $3, %al
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mov %al, KTRAP_FRAME_PreviousMode(%rbp)
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/* Skip swapgs as the interrupt originated from kernel mode */
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jz UserMode\Type\Vector
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swapgs
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UserMode\Type\Vector:
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/* Set up trap frame pointer for the dispatcher and clear the direction flag */
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mov %rsp, %rcx
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cld
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/* Preserve the original stack pointer */
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mov %rsp, %rbx
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/* Force stack alignment */
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and $-16, %rsp
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/* Allocate 32 bytes of shadow space */
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sub $32, %rsp
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.ifc \Type,Trap
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/* Pass to the trap dispatcher */
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call ArDispatchTrap
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.else
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/* Pass to the interrupt dispatcher */
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call ArDispatchTrap
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.endif
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/* Restore the original trap frame stack pointer */
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mov %rbx, %rsp
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/* Test previous mode and swapgs if needed */
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testb $1, KTRAP_FRAME_PreviousMode(%rbp)
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jz KernelModeReturn\Type\Vector
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cli
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swapgs
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KernelModeReturn\Type\Vector:
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/* Restore XMM registers */
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movdqa KTRAP_FRAME_Xmm0(%rbp), %xmm0
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movdqa KTRAP_FRAME_Xmm1(%rbp), %xmm1
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movdqa KTRAP_FRAME_Xmm2(%rbp), %xmm2
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movdqa KTRAP_FRAME_Xmm3(%rbp), %xmm3
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movdqa KTRAP_FRAME_Xmm4(%rbp), %xmm4
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movdqa KTRAP_FRAME_Xmm5(%rbp), %xmm5
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movdqa KTRAP_FRAME_Xmm6(%rbp), %xmm6
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movdqa KTRAP_FRAME_Xmm7(%rbp), %xmm7
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movdqa KTRAP_FRAME_Xmm8(%rbp), %xmm8
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movdqa KTRAP_FRAME_Xmm9(%rbp), %xmm9
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movdqa KTRAP_FRAME_Xmm10(%rbp), %xmm10
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movdqa KTRAP_FRAME_Xmm11(%rbp), %xmm11
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movdqa KTRAP_FRAME_Xmm12(%rbp), %xmm12
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movdqa KTRAP_FRAME_Xmm13(%rbp), %xmm13
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movdqa KTRAP_FRAME_Xmm14(%rbp), %xmm14
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movdqa KTRAP_FRAME_Xmm15(%rbp), %xmm15
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/* Load MxCsr register */
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ldmxcsr KTRAP_FRAME_MxCsr(%rbp)
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/* Free stack space */
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add $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %rsp
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/* Pop General Purpose Registers */
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pop %rax
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pop %rbx
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pop %rcx
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pop %rdx
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pop %r8
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pop %r9
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pop %r10
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pop %r11
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pop %r12
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pop %r13
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pop %r14
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pop %r15
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pop %rsi
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pop %rdi
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pop %rbp
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/* Skip error code and vector number, then return */
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add $(2 * 8), %rsp
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iretq
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.endm
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/* Populate common interrupt and trap handlers */
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.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
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.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
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ArCreateHandler 0x\i\j Interrupt
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ArCreateHandler 0x\i\j Trap
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.endr
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.endr
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/* Define array of pointers to the interrupt handlers */
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.global ArInterruptEntry
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ArInterruptEntry:
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.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
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.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
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.quad ArInterrupt0x\i\j
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.endr
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.endr
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/* Define array of pointers to the trap handlers */
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.global ArTrapEntry
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ArTrapEntry:
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.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
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.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
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.quad ArTrap0x\i\j
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.endr
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.endr
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/**
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* Enables eXtended Physical Addressing (XPA).
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*
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* @param PageMap
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* Supplies a pointer to the page map to be used.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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.global ArEnableExtendedPhysicalAddressing
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ArEnableExtendedPhysicalAddressing:
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/* Save the original CR4 register */
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movq %cr4, %rax
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/* Save the state of stack pointer and non-volatile registers */
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movq %rsp, XpaRegisterSaveArea(%rip)
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movq %rbp, XpaRegisterSaveArea+0x08(%rip)
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movq %rax, XpaRegisterSaveArea+0x10(%rip)
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movq %rbx, XpaRegisterSaveArea+0x18(%rip)
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/* Save the original CR0 register */
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movq %cr0, %rbp
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/* Load temporary GDT required for mode transitions */
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leaq XpaTemporaryGdtDesc(%rip), %rax
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movq %rax, XpaTemporaryGdtBase(%rip)
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lgdtq XpaTemporaryGdtSize(%rip)
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/* Load addresses for entering compatibility mode and re-entering long mode */
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leaq XpaEnterCompatMode(%rip), %rax
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leaq XpaEnterLongMode(%rip), %rbx
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/* Push the 32-bit code segment selector and the target address for a far jump */
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pushq $KGDT_R0_CMCODE
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pushq %rax
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/* Perform a far return to switch to 32-bit compatibility mode */
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lretq
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XpaEnterCompatMode:
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/* Enter 32-bit compatibility mode */
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.code32
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/* Store the PageMap pointer on the stack for future use */
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pushl %ecx
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/* Set the stack segment to the 32-bit data segment selector */
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movl $KGDT_R0_DATA, %eax
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movl %eax, %ss
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/* Disable PGE and PCIDE to ensure all TLB entries will be flushed */
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movl %cr4, %eax
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andl $~(CR4_PGE | CR4_PCIDE), %eax
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movl %eax, %cr4
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/* Temporarily disable paging */
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movl %ebp, %eax
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andl $~CR0_PG, %eax
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movl %eax, %cr0
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/* Disable Long Mode as prerequisite for enabling 5-level paging */
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movl $X86_MSR_EFER, %ecx
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rdmsr
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andl $~X86_MSR_EFER_LME, %eax
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wrmsr
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/* Transition to 5-level paging (PML5/LA57) */
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movl %cr4, %eax
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orl $CR4_LA57, %eax
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movl %eax, %cr4
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/* Restore the PageMap pointer from the stack and load it into CR3 */
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popl %ecx
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movl %ecx, %cr3
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/* Re-enable Long Mode */
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movl $X86_MSR_EFER, %ecx
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rdmsr
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orl $X86_MSR_EFER_LME, %eax
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wrmsr
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/* Restore CR0 with paging enabled and flush the instruction pipeline */
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movl %ebp, %cr0
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call XpaFlushInstructions
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XpaFlushInstructions:
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/* Push the 64-bit code segment selector and the target address for a far jump */
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pushl $KGDT_R0_CODE
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pushl %ebx
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/* Perform a far return to switch to 64-bit long mode */
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lretl
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XpaEnterLongMode:
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/* Enter 64-bit long mode */
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.code64
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/* Restore the stack pointer and non-volatile registers */
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movq XpaRegisterSaveArea(%rip), %rsp
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movq XpaRegisterSaveArea+8(%rip), %rbp
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movq XpaRegisterSaveArea+0x10(%rip), %rax
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movq XpaRegisterSaveArea+0x18(%rip), %rbx
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/* Restore the original CR4 register with LA57 bit set */
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orq $CR4_LA57, %rax
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movq %rax, %cr4
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/* Return to the caller */
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retq
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/* Data section for saving registers and temporary GDT */
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XpaRegisterSaveArea: .quad 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
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XpaTemporaryGdtSize: .short ArEnableExtendedPhysicalAddressingEnd - XpaTemporaryGdtDesc - 1
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XpaTemporaryGdtBase: .quad 0x0000000000000000
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XpaTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00AF9A000000FFFF, 0x00CF92000000FFFF
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.global ArEnableExtendedPhysicalAddressingEnd
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ArEnableExtendedPhysicalAddressingEnd:
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/**
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* Handles a spurious interrupt allowing it to end up.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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.global ArHandleSpuriousInterrupt
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ArHandleSpuriousInterrupt:
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iretq
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/**
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* Starts an application processor (AP). This is just a stub.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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.global ArStartApplicationProcessor
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ArStartApplicationProcessor:
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.global ArStartApplicationProcessorEnd
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ArStartApplicationProcessorEnd:
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