440 lines
12 KiB
C++
440 lines
12 KiB
C++
/**
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* PROJECT: ExectOS
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* COPYRIGHT: See COPYING.md in the top level directory
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* FILE: xtoskrnl/hl/x86/timer.cc
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* DESCRIPTION: APIC Timer support for x86 (i686/AMD64) support
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* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
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*/
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#include <xtos.hh>
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/**
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* Calibrates the Local APIC timer frequency.
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*
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* @return This routine returns a status code.
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*
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* @since XT 1.0
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*/
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XTAPI
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XTSTATUS
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HL::Timer::CalibrateApicTimer()
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{
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ULONG CurrentCount, Frequency, InitialCount;
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/* Get APIC timer frequency from the Core Crystal Clock */
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if(TimerCapabilities.Art && TimerCapabilities.TimerFrequency != 0)
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{
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/* CCC available, use it as the source of APIC timer frequency */
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Frequency = TimerCapabilities.TimerFrequency;
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}
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else
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{
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/* CCC unavailable, fallback to PIT calibration */
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InitialCount = 0xFFFFFFFF;
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/* Load the initial count into the APIC Timer and begin the countdown */
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HL::Pic::WriteApicRegister(APIC_TICR, InitialCount);
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/* Wait for 10ms */
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StallExecution(10000);
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/* Read current tick count from APIC timer and clear APIC timer */
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CurrentCount = HL::Pic::ReadApicRegister(APIC_TCCR);
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HL::Pic::WriteApicRegister(APIC_TICR, 0);
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/* Calculate APIC timer frequency based on ticks passed */
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Frequency = (InitialCount - CurrentCount) * 100;
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/* Verify APIC timer frequency */
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if(Frequency == 0)
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{
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/* Unable to calibrate APIC timer, return error */
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return STATUS_UNSUCCESSFUL;
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}
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}
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/* Save APIC timer frequency */
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TimerFrequency = Frequency;
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/* Print APIC timer frequency and return success */
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DebugPrint(L"APIC Timer calibrated: %u Ticks/s\n", TimerFrequency);
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return STATUS_SUCCESS;
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}
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/**
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* Initializes and calibrates the Local APIC Timer.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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HL::Timer::InitializeApicTimer(VOID)
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{
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XTSTATUS Status;
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/* Set APIC timer to divide by 1 */
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HL::Pic::WriteApicRegister(APIC_TDCR, TIMER_DivideBy1);
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/* Calibrate the APIC timer */
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Status = CalibrateApicTimer();
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if(Status != STATUS_SUCCESS)
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{
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/* System cannot operate without a calibrated system timer, raise kernel panic */
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KE::Crash::Panic(0);
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}
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/* Set the default system profile interval */
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HL::Timer::SetProfileInterval(1000);
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/* Program the APIC timer for periodic mode */
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StopProfileInterrupt(ProfileXtKernel);
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}
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/**
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* Performs a basic Timer initialization.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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HL::Timer::InitializeTimer(VOID)
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{
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/* Query timer capabilities */
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QueryTimerCapabilities();
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/* Initialize the APIC timer */
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InitializeApicTimer();
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}
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/**
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* Stalls the CPU execution for a specified duration (maximum 3 seconds) using the legacy PIT timer.
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*
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* @param MicroSeconds
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* Specifies the number of microseconds to stall execution.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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HL::Timer::PitStallExecution(IN ULONG MicroSeconds)
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{
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USHORT CurrentCount, PreviousCount;
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ULONG TargetTicks, TickCounter;
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/* Validate input parameter */
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if(MicroSeconds == 0)
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{
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/* Nothing to do */
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return;
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}
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else if(MicroSeconds > 3000000)
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{
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/* Cap execution stall to 3 seconds */
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MicroSeconds = 3000000;
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}
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/* Convert us to PIT ticks and initialize tick counter */
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TargetTicks = (MicroSeconds * 1193) / 1000;
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TickCounter = 0;
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/* Configure PIT Channel 0: Read/Write LSB then MSB, Mode 0 (Interrupt on Terminal Count) */
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HL::IoPort::WritePort8(PIT_COMMAND_PORT, 0x30);
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/* Initialize the PIT counter with the maximum possible value (0xFFFF) */
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HL::IoPort::WritePort8(PIT_DATA_PORT0, 0xFF);
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HL::IoPort::WritePort8(PIT_DATA_PORT0, 0xFF);
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/* Latch and read the initial counter value */
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HL::IoPort::WritePort8(PIT_COMMAND_PORT, 0x00);
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PreviousCount = HL::IoPort::ReadPort8(PIT_DATA_PORT0);
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PreviousCount |= (HL::IoPort::ReadPort8(PIT_DATA_PORT0) << 8);
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/* Poll the PIT */
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while(TickCounter < TargetTicks)
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{
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/* Latch the current counter value without stopping the timer */
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HL::IoPort::WritePort8(PIT_COMMAND_PORT, 0x00);
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CurrentCount = HL::IoPort::ReadPort8(PIT_DATA_PORT0);
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CurrentCount |= (HL::IoPort::ReadPort8(PIT_DATA_PORT0) << 8);
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/* Calculate elapsed ticks since the last read */
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TickCounter += (PreviousCount - CurrentCount) & 0xFFFF;
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/* Update the tracking variable */
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PreviousCount = CurrentCount;
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}
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}
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/**
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* Probes the processor via CPUID to detect available modern timing and clock generation features.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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HL::Timer::QueryTimerCapabilities(VOID)
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{
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CPUID_REGISTERS CpuRegisters;
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ULONG MaxStandardLeaf;
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ULONG MaxExtendedLeaf;
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/* Query maximum standard CPUID leaf */
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CpuRegisters.Leaf = CPUID_GET_VENDOR_STRING;
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CpuRegisters.SubLeaf = 0;
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CpuRegisters.Eax = 0;
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CpuRegisters.Ebx = 0;
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CpuRegisters.Ecx = 0;
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CpuRegisters.Edx = 0;
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AR::CpuFunc::CpuId(&CpuRegisters);
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/* Save maximum supported standard CPUID leaf */
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MaxStandardLeaf = CpuRegisters.Eax;
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/* Query maximum extended CPUID leaf */
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CpuRegisters.Leaf = CPUID_GET_EXTENDED_MAX;
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CpuRegisters.SubLeaf = 0;
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CpuRegisters.Eax = 0;
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CpuRegisters.Ebx = 0;
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CpuRegisters.Ecx = 0;
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CpuRegisters.Edx = 0;
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AR::CpuFunc::CpuId(&CpuRegisters);
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/* Save maximum supported extended CPUID leaf */
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MaxExtendedLeaf = CpuRegisters.Eax;
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/* Check TSC-Deadline mode if leaf supported */
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if(MaxStandardLeaf >= CPUID_GET_STANDARD1_FEATURES)
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{
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CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES;
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CpuRegisters.SubLeaf = 0;
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CpuRegisters.Eax = 0;
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CpuRegisters.Ebx = 0;
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CpuRegisters.Ecx = 0;
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CpuRegisters.Edx = 0;
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AR::CpuFunc::CpuId(&CpuRegisters);
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/* Verify TSC-Deadline support */
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if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_TSC_DEADLINE)
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{
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TimerCapabilities.TscDeadline = TRUE;
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}
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}
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/* Check Always Running APIC Timer - ARAT if leaf supported */
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if(MaxStandardLeaf >= CPUID_GET_POWER_MANAGEMENT)
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{
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CpuRegisters.Leaf = CPUID_GET_POWER_MANAGEMENT;
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CpuRegisters.SubLeaf = 0;
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CpuRegisters.Eax = 0;
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CpuRegisters.Ebx = 0;
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CpuRegisters.Ecx = 0;
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CpuRegisters.Edx = 0;
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AR::CpuFunc::CpuId(&CpuRegisters);
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/* Verify ARAT support */
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if(CpuRegisters.Eax & CPUID_FEATURES_EAX_ARAT)
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{
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TimerCapabilities.Arat = TRUE;
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}
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}
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/* Check Always Running Timer - ART if leaf supported */
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if(MaxStandardLeaf >= CPUID_GET_TSC_CRYSTAL_CLOCK)
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{
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CpuRegisters.Leaf = CPUID_GET_TSC_CRYSTAL_CLOCK;
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CpuRegisters.SubLeaf = 0;
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CpuRegisters.Eax = 0;
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CpuRegisters.Ebx = 0;
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CpuRegisters.Ecx = 0;
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CpuRegisters.Edx = 0;
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AR::CpuFunc::CpuId(&CpuRegisters);
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/* Verify ART support */
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if(CpuRegisters.Eax != 0 && CpuRegisters.Ebx != 0)
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{
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TimerCapabilities.Art = TRUE;
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/* Save the TSC scaling ratios */
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TimerCapabilities.TscDenominator = CpuRegisters.Eax;
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TimerCapabilities.TscNumerator = CpuRegisters.Ebx;
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/* Check if ECX contains the nominal frequency of the core crystal clock */
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if(CpuRegisters.Ecx != 0)
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{
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/* Save the base frequency for the APIC Timer */
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TimerCapabilities.TimerFrequency = CpuRegisters.Ecx;
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}
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}
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}
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/* Check RDTSCP instruction support if leaf supported */
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if(MaxExtendedLeaf >= CPUID_GET_EXTENDED_FEATURES)
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{
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CpuRegisters.Leaf = CPUID_GET_EXTENDED_FEATURES;
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CpuRegisters.SubLeaf = 0;
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CpuRegisters.Eax = 0;
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CpuRegisters.Ebx = 0;
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CpuRegisters.Ecx = 0;
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CpuRegisters.Edx = 0;
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AR::CpuFunc::CpuId(&CpuRegisters);
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/* Verify RDTSCP support */
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if(CpuRegisters.Edx & CPUID_FEATURES_EDX_RDTSCP)
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{
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TimerCapabilities.RDTSCP = TRUE;
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}
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}
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/* Check Invariant TSC if leaf supported */
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if(MaxExtendedLeaf >= CPUID_GET_ADVANCED_POWER_MANAGEMENT)
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{
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CpuRegisters.Leaf = CPUID_GET_ADVANCED_POWER_MANAGEMENT;
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CpuRegisters.SubLeaf = 0;
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CpuRegisters.Eax = 0;
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CpuRegisters.Ebx = 0;
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CpuRegisters.Ecx = 0;
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CpuRegisters.Edx = 0;
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AR::CpuFunc::CpuId(&CpuRegisters);
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/* Verify Invariant TSC support */
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if(CpuRegisters.Edx & CPUID_FEATURES_EDX_TSCI)
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{
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TimerCapabilities.InvariantTsc = TRUE;
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}
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}
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}
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/**
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* Sets the profile interrupt interval. The interval may be bounded by hardware capabilities.
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*
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* @param Interval
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* Supplies the requested profile interval in 100-nanosecond units.
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*
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* @return This routine returns the actual profile interval that was set.
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*
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* @since XT 1.0
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*/
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XTAPI
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ULONG_PTR
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HL::Timer::SetProfileInterval(IN ULONG_PTR Interval)
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{
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/* Validate and bound the requested profile interval against hardware limits */
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if(Interval < MIN_PROFILE_INTERVAL)
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{
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/* Enforce the minimum profile interval limit */
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Interval = MIN_PROFILE_INTERVAL;
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}
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else if(Interval > MAX_PROFILE_INTERVAL)
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{
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/* Enforce the maximum profile interval limit */
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Interval = MAX_PROFILE_INTERVAL;
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}
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/* Calculate the number of APIC timer ticks required for the requested interval */
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ProfilingInterval = (TimerFrequency / 10000) * (Interval / 1000);
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/* Update the APIC Timer Initial Count Register (TICR) to apply the new interval immediately */
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HL::Pic::WriteApicRegister(APIC_TICR, ProfilingInterval);
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/* Return the actual interval */
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return Interval;
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}
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/**
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* Stalls the CPU execution for a specified duration.
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*
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* @param MicroSeconds
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* Supplies the number of microseconds to stall execution.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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HL::Timer::StallExecution(IN ULONG MicroSeconds)
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{
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UNIMPLEMENTED;
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/* ACPI PM Timer not supported, fall back to PIT */
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PitStallExecution(MicroSeconds);
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}
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/**
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* Enables the profile interrupt for the specified profile source.
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*
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* @param ProfileSource
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* Supplies the source of the profile interrupt to start.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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HL::Timer::StartProfileInterrupt(IN KPROFILE_SOURCE ProfileSource)
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{
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APIC_LVT_REGISTER LvtRegister;
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/* Handle only ProfileTime and ProfileXtKernel */
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if(ProfileSource != ProfileTime && ProfileSource != ProfileXtKernel)
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{
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/* Invalid profile source, do nothing */
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return;
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}
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/* Set the interval */
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HL::Pic::WriteApicRegister(APIC_TICR, ProfilingInterval);
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/* Unmask interrupt */
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LvtRegister.Long = 0;
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LvtRegister.Mask = 0;
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LvtRegister.DeliveryMode = APIC_DM_FIXED;
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LvtRegister.TimerMode = 1;
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LvtRegister.TriggerMode = APIC_TGM_EDGE;
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LvtRegister.Vector = APIC_VECTOR_PROFILE;
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HL::Pic::WriteApicRegister(APIC_TMRLVTR, LvtRegister.Long);
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}
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/**
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* Disables the profile interrupt for the specified profile source.
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*
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* @param ProfileSource
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* Supplies the source of the profile interrupt to stop.
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*
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* @return This routine does not return any value.
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*
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* @since XT 1.0
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*/
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XTAPI
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VOID
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HL::Timer::StopProfileInterrupt(IN KPROFILE_SOURCE ProfileSource)
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{
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APIC_LVT_REGISTER LvtRegister;
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/* Handle only ProfileTime and ProfileXtKernel */
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if(ProfileSource != ProfileTime && ProfileSource != ProfileXtKernel)
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{
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/* Invalid profile source, do nothing */
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return;
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}
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/* Mask interrupt */
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LvtRegister.Long = 0;
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LvtRegister.Mask = 1;
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LvtRegister.DeliveryMode = APIC_DM_FIXED;
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LvtRegister.TimerMode = 1;
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LvtRegister.TriggerMode = APIC_TGM_EDGE;
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LvtRegister.Vector = APIC_VECTOR_PROFILE;
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HL::Pic::WriteApicRegister(APIC_TMRLVTR, LvtRegister.Long);
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}
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