Use virtual FAT disk images

CMakeLists.txt

@@ -44,7 +44,7 @@ set(CMAKE_TOOLCHAIN_FILE "sdk/cmake/toolchain.cmake")
 project(EXECTOS)
 
 # Load all the CMake SDK
-include(sdk/cmake/baseaddress.cmake)
+include(sdk/cmake/baseaddress/${ARCH}.cmake)
 include(sdk/cmake/emulation.cmake)
 include(sdk/cmake/functions.cmake)
 include(sdk/cmake/version.cmake)

IDEAS.md

@@ -11,15 +11,16 @@ This is a list of ideas that migh but not must be realized.
 ### XTLDR
  - [ ] Rewrite memory mapping and paging support in bootloader to make it more flexible and architecture independent.
        This should support paging levels, thus allowing to make a use of PML5 on modern AMD64 processors and increasing
-       the addressable virtual memory from 256TB to 128PB.
- - [ ] Find graphics card from all PCI devices and identify its framebuffer address when GOP is not supported by UEFI
-       firmware and UGA has to be used instead.
+       the addressable virtual memory from 256TB to 128PB. This is partially done.
+ - [ ] Implement a scrolling mechanism to boot menu allowing to show more boot entries than can fit in the box.
+       Currently, the limit is not set, nor check, thus adding more menu items will result in positions displayed under
+       the box.
+ - [ ] Implement editing boot menu entries directly from the boot menu. Changes should be runtime only (not stored on
+       disk).
 
 ### XTOSKRNL
  - [ ] Implement mechanism for detecting CPU features and checking hardware requirements. If CPU does not meet
        requirements, it should cause a kernel panic before any non-supported instruction is being used.
- - [ ] Design a mechanism of sharing common code between some architectures (i.e. both i686 and amd64 supports APIC,
-       while it is not available on ARM).
  - [ ] Finish framebuffer and terminal implementation. Initialization code is already prepared as well as routines for
        clearing the screen and drawing single points. Terminal should be instantiable (should be able to create many
        terminals and switch between them) and work on top of FB. It should define ANSI colors and scrollback buffer.

README.md

@@ -21,7 +21,7 @@
     <img alt="Sponsor" src="https://img.shields.io/badge/Sponsor-%E2%9D%A4-red?logo=GitHub">
   </a>
   <a href="https://discord.com/invite/zBzJ5qMGX7">
-    <img alt="Discord" src="https://img.shields.io/discord/723186294540206100?label=Chat">
+    <img alt="Discord" src="https://img.shields.io/badge/Chat-Join%20Discord-success">
   </a>
 </p>
 

sdk/cmake/baseaddress/amd64.cmake

@@ -0,0 +1,2 @@
+# Set base addresses for all modules
+set(BASEADDRESS_XTOSKRNL 0x0000000140000000)

sdk/cmake/baseaddress/i686.cmake

@@ -1,3 +1,2 @@
 # Set base addresses for all modules
-set(BASEADDRESS_XTLDR    0x00010000)
 set(BASEADDRESS_XTOSKRNL 0x00400000)

sdk/cmake/emulation.cmake

@@ -27,22 +27,22 @@ add_custom_target(bochsvm
 
 # This target starts up a QEMU+OVMF virtual machine using KVM accelerator
 add_custom_target(testkvm
-                  DEPENDS diskimg
+                  DEPENDS install
                   COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-KVM" -machine type=q35,kernel_irqchip=on,accel=kvm,mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
                                           -smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
                                           -drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_code_${ARCH}.fd,if=pflash,format=raw,unit=0,readonly=on
                                           -drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_vars_${ARCH}.fd,if=pflash,format=raw,unit=1
-                                          -hda ${EXECTOS_BINARY_DIR}/output/disk.img
+                                          -hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
                                           -boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
                   VERBATIM USES_TERMINAL)
 
 # This target starts up a QEMU+OVMF virtual machine using TCG accelerator
 add_custom_target(testtcg
-                  DEPENDS diskimg
+                  DEPENDS install
                   COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-TCG" -machine type=q35,accel=tcg -cpu max,-hypervisor
                                           -smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
                                           -drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_code_${ARCH}.fd,if=pflash,format=raw,unit=0,readonly=on
                                           -drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_vars_${ARCH}.fd,if=pflash,format=raw,unit=1
-                                          -hda ${EXECTOS_BINARY_DIR}/output/disk.img
+                                          -hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
                                           -boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
                   VERBATIM USES_TERMINAL)

sdk/cmake/xtchain.cmake

@@ -11,11 +11,10 @@ endif()
 
 # Set build optimisation
 if(BUILD_TYPE STREQUAL "DEBUG")
-    add_compiler_ccxxflags("/Zi")
-    add_compiler_ccxxflags("-Ob0 -Od")
+    add_compiler_ccxxflags("/GS- /Zi /Ob0 /Od")
     add_linker_flags("/DEBUG /INCREMENTAL /OPT:NOREF /OPT:NOICF /PDBSOURCEPATH:build")
 else()
-    add_compiler_ccxxflags("-Ob2 -Oy")
+    add_compiler_ccxxflags("/GS- /Ob2 /Ot /Ox /Oy")
     add_linker_flags("/INCREMENTAL:NO /OPT:REF /OPT:ICF")
 endif()
 

sdk/xtdk/amd64/artypes.h

@@ -93,29 +93,31 @@
 #define X86_MSR_EFER_SVME                               (1 << 12)
 
 /* X86 EFLAG bit masks definitions */
-#define X86_EFLAGS_CF_MASK                              0x00000001
-#define X86_EFLAGS_PF_MASK                              0x00000004
-#define X86_EFALGS_AF_MASK                              0x00000010
-#define X86_EFLAGS_ZF_MASK                              0x00000040
-#define X86_EFLAGS_SF_MASK                              0x00000080
-#define X86_EFLAGS_TF_MASK                              0x00000100
-#define X86_EFLAGS_IF_MASK                              0x00000200
-#define X86_EFLAGS_DF_MASK                              0x00000400
-#define X86_EFLAGS_OF_MASK                              0x00000800
-#define X86_EFLAGS_IOPL_MASK                            0x00003000
-#define X86_EFLAGS_NT_MASK                              0x00004000
-#define X86_EFLAGS_RF_MASK                              0x00010000
-#define X86_EFLAGS_VM_MASK                              0x00020000
-#define X86_EFLAGS_AC_MASK                              0x00040000
-#define X86_EFLAGS_VIF_MASK                             0x00080000
-#define X86_EFLAGS_VIP_MASK                             0x00100000
-#define X86_EFLAGS_ID_MASK                              0x00200000
+#define X86_EFLAGS_NF_MASK                              0x00000000 /* None */
+#define X86_EFLAGS_CF_MASK                              0x00000001 /* Carry */
+#define X86_EFLAGS_PF_MASK                              0x00000004 /* Parity */
+#define X86_EFALGS_AF_MASK                              0x00000010 /* Aux Carry */
+#define X86_EFLAGS_ZF_MASK                              0x00000040 /* Zero */
+#define X86_EFLAGS_SF_MASK                              0x00000080 /* Sign */
+#define X86_EFLAGS_TF_MASK                              0x00000100 /* Trap */
+#define X86_EFLAGS_IF_MASK                              0x00000200 /* Interrupt */
+#define X86_EFLAGS_DF_MASK                              0x00000400 /* Direction */
+#define X86_EFLAGS_OF_MASK                              0x00000800 /* Overflow */
+#define X86_EFLAGS_IOPL_MASK                            0x00003000 /* I/O Privilege */
+#define X86_EFLAGS_NT_MASK                              0x00004000 /* Nested Task */
+#define X86_EFLAGS_SIGN_MASK                            0x00008000 /* Sign */
+#define X86_EFLAGS_RF_MASK                              0x00010000 /* Resume */
+#define X86_EFLAGS_V86_MASK                             0x00020000 /* Virtual 8086 */
+#define X86_EFLAGS_AC_MASK                              0x00040000 /* Alignment Check */
+#define X86_EFLAGS_VIF_MASK                             0x00080000 /* Virtual Interrupt */
+#define X86_EFLAGS_VIP_MASK                             0x00100000 /* Virtual Interrupt Pending */
+#define X86_EFLAGS_ID_MASK                              0x00200000 /* Identification */
 
 /* CPU vendor enumeration list */
 typedef enum _CPU_VENDOR
 {
     CPU_VENDOR_AMD = 0x68747541,
-    CPU_VENDOR_INTEL = 0x756e6547,
+    CPU_VENDOR_INTEL = 0x756E6547,
     CPU_VENDOR_UNKNOWN = 0xFFFFFFFF
 } CPU_VENDOR, *PCPU_VENDOR;
 

sdk/xtdk/amd64/hltypes.h

@@ -43,36 +43,152 @@
 #define APIC_DF_CLUSTER                                 0x0FFFFFFF
 
 /* APIC delivery modes */
-#define APIC_DM_FIXED                                   0
-#define APIC_DM_LOWPRIO                                 1
-#define APIC_DM_SMI                                     2
-#define APIC_DM_REMOTE                                  3
-#define APIC_DM_NMI                                     4
-#define APIC_DM_INIT                                    5
-#define APIC_DM_STARTUP                                 6
-#define APIC_DM_EXTINT                                  7
+#define APIC_DM_FIXED                                   0x00000000
+#define APIC_DM_LOWPRIO                                 0x00000100
+#define APIC_DM_SMI                                     0x00000200
+#define APIC_DM_REMOTE                                  0x00000300
+#define APIC_DM_NMI                                     0x00000400
+#define APIC_DM_INIT                                    0x00000500
+#define APIC_DM_STARTUP                                 0x00000600
+#define APIC_DM_EXTINT                                  0x00000700
 
 /* APIC trigger modes */
 #define APIC_TGM_EDGE                                   0
 #define APIC_TGM_LEVEL                                  1
 
+/* APIC LDR (Logical Destination Register) shifts */
+#define APIC_X2APIC_LDR_SHIFT                           16
+#define APIC_XAPIC_LDR_SHIFT                            24
+
+/* Maximum number of I/O APICs */
+#define APIC_MAX_IOAPICS                                64
+
 /* 8259/ISP PIC ports definitions */
 #define PIC1_CONTROL_PORT                               0x20
 #define PIC1_DATA_PORT                                  0x21
-#define PIC1_ELCR_PORT                                  0x04D0
 #define PIC2_CONTROL_PORT                               0xA0
 #define PIC2_DATA_PORT                                  0xA1
-#define PIC2_ELCR_PORT                                  0x04D1
 
 /* PIC vector definitions */
 #define PIC1_VECTOR_SPURIOUS                            0x37
 
-/* Serial port I/O addresses */
-#define COMPORT_ADDRESSES                               {0x000, 0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
+/* Serial ports information */
+#define COMPORT_ADDRESS                                 {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
+#define COMPORT_COUNT                                   8
 
 /* Initial stall factor */
 #define INITIAL_STALL_FACTOR                            100
 
+/* APIC Register Address Map */
+typedef enum _APIC_REGISTER
+{
+    APIC_ID       = 0x02, /* APIC ID Register */
+    APIC_VER      = 0x03, /* APIC Version Register */
+    APIC_TPR      = 0x08, /* Task Priority Register */
+    APIC_APR      = 0x09, /* Arbitration Priority Register */
+    APIC_PPR      = 0x0A, /* Processor Priority Register (R) */
+    APIC_EOI      = 0x0B, /* EOI Register */
+    APIC_RRR      = 0x0C, /* Remote Read Register */
+    APIC_LDR      = 0x0D, /* Logical Destination Register */
+    APIC_DFR      = 0x0E, /* Destination Format Register (not available in extended mode) */
+    APIC_SIVR     = 0x0F, /* Spurious Interrupt Vector Register */
+    APIC_ISR      = 0x10, /* Interrupt Service Register*/
+    APIC_TMR      = 0x18, /* Trigger Mode Register */
+    APIC_IRR      = 0x20, /* Interrupt Request Register */
+    APIC_ESR      = 0x28, /* Error Status Register */
+    APIC_ICR0     = 0x30, /* Interrupt Command Register */
+    APIC_ICR1     = 0x31, /* Interrupt Command Register (not available in extended mode) */
+    APIC_TMRLVTR  = 0x32, /* Timer Local Vector Table */
+    APIC_THRMLVTR = 0x33, /* Thermal Local Vector Table */
+    APIC_PCLVTR   = 0x34, /* Performance Counter Local Vector Table */
+    APIC_LINT0    = 0x35, /* LINT0 Local Vector Table */
+    APIC_LINT1    = 0x36, /* LINT1 Local Vector Table */
+    APIC_ERRLVTR  = 0x37, /* Error Local Vector Table */
+    APIC_TICR     = 0x38, /* Initial Count Register for Timer */
+    APIC_TCCR     = 0x39, /* Current Count Register for Timer */
+    APIC_TDCR     = 0x3E, /* Timer Divide Configuration Register */
+    APIC_EAFR     = 0x40, /* extended APIC Feature register */
+    APIC_EACR     = 0x41, /* Extended APIC Control Register */
+    APIC_SEOI     = 0x42, /* Specific End Of Interrupt Register */
+    APIC_EXT0LVTR = 0x50, /* Extended Interrupt 0 Local Vector Table */
+    APIC_EXT1LVTR = 0x51, /* Extended Interrupt 1 Local Vector Table */
+    APIC_EXT2LVTR = 0x52, /* Extended Interrupt 2 Local Vector Table */
+    APIC_EXT3LVTR = 0x53  /* Extended Interrupt 3 Local Vector Table */
+} APIC_REGISTER, *PAPIC_REGISTER;
+
+/* APIC mode list */
+typedef enum _APIC_MODE
+{
+    APIC_MODE_COMPAT,
+    APIC_MODE_X2APIC
+} APIC_MODE, *PAPIC_MODE;
+
+/* APIC destination short-hand enumeration list */
+typedef enum _APIC_DSH
+{
+    APIC_DSH_Destination,
+    APIC_DSH_Self,
+    APIC_DSH_AllIncludingSelf,
+    APIC_DSH_AllExclusingSelf
+} APIC_DSH, *PAPIC_DSH;
+
+/* APIC message type enumeration list */
+typedef enum _APIC_MT
+{
+    APIC_MT_Fixed,
+    APIC_MT_LowestPriority,
+    APIC_MT_SMI,
+    APIC_MT_RemoteRead,
+    APIC_MT_NMI,
+    APIC_MT_INIT,
+    APIC_MT_Startup,
+    APIC_MT_ExtInt,
+} APIC_MT, *PAPIC_MT;
+
+/* I8259 PIC interrupt mode enumeration list */
+typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE
+{
+    EdgeTriggered,
+    LevelTriggered
+} PIC_I8259_ICW1_INTERRUPT_MODE, *PPIC_I8259_ICW1_INTERRUPT_MODE;
+
+/* I8259 PIC interval enumeration list */
+typedef enum _PIC_I8259_ICW1_INTERVAL
+{
+    Interval8,
+    Interval4
+} PIC_I8259_ICW1_INTERVAL, *PPIC_I8259_ICW1_INTERVAL;
+
+/* I8259 PIC operating mode enumeration list */
+typedef enum _PIC_I8259_ICW1_OPERATING_MODE
+{
+    Cascade,
+    Single
+} PIC_I8259_ICW1_OPERATING_MODE, *PPIC_I8259_ICW1_OPERATING_MODE;
+
+/* I8259 PIC buffered mode enumeration list */
+typedef enum _PIC_I8259_ICW4_BUFFERED_MODE
+{
+    NonBuffered,
+    NonBuffered2,
+    BufferedSlave,
+    BufferedMaster
+} PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
+
+/* I8259 PIC End Of Interrupt (EOI) mode enumeration list */
+typedef enum _PIC_I8259_ICW4_EOI_MODE
+{
+    NormalEoi,
+    AutomaticEoi
+} PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
+
+/* I8259 PIC system mode enumeration list */
+typedef enum _PIC_I8259_ICW4_SYSTEM_MODE
+{
+    Mcs8085Mode,
+    New8086Mode
+} PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
+
 /* APIC Base Register */
 typedef union _APIC_BASE_REGISTER
 {
@@ -89,6 +205,31 @@ typedef union _APIC_BASE_REGISTER
     };
 } APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
 
+/* APIC Command Register */
+typedef union _APIC_COMMAND_REGISTER
+{
+    ULONGLONG LongLong;
+    struct
+    {
+        ULONG Long0;
+        ULONG Long1;
+    };
+    struct
+    {
+        ULONGLONG Vector:8;
+        ULONGLONG MessageType:3;
+        ULONGLONG DestinationMode:1;
+        ULONGLONG DeliveryStatus:1;
+        ULONGLONG ReservedMBZ:1;
+        ULONGLONG Level:1;
+        ULONGLONG TriggerMode:1;
+        ULONGLONG RemoteReadStatus:2;
+        ULONGLONG DestinationShortHand:2;
+        ULONGLONG Reserved2MBZ:36;
+        ULONGLONG Destination:8;
+    };
+} APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
+
 /* APIC Local Vector Table (LVT) Register */
 typedef union _APIC_LVT_REGISTER
 {
@@ -121,14 +262,69 @@ typedef union _APIC_SPURIOUS_REGISTER
     };
 } APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
 
-/* Processor identity structure */
-typedef struct _HAL_PROCESSOR_IDENTITY
+/* I8259 PIC register structure */
+typedef union _PIC_I8259_ICW1
 {
-    UCHAR ProcessorId;
-    UCHAR LApicId;
-    BOOLEAN Bsp;
-    BOOLEAN Started;
-    PKPROCESSOR_BLOCK ProcessorBlock;
-} HAL_PROCESSOR_IDENTITY, *PHAL_PROCESSOR_IDENTITY;
+    struct
+    {
+        UCHAR NeedIcw4:1;
+        UCHAR OperatingMode:1;
+        UCHAR Interval:1;
+        UCHAR InterruptMode:1;
+        UCHAR Init:1;
+        UCHAR InterruptVectorAddress:3;
+    };
+    UCHAR Bits;
+} PIC_I8259_ICW1, *PPIC_I8259_ICW1;
+
+/* I8259 PIC register structure */
+typedef union _PIC_I8259_ICW2
+{
+    struct
+    {
+        UCHAR Sbz:3;
+        UCHAR InterruptVector:5;
+    };
+    UCHAR Bits;
+} PIC_I8259_ICW2, *PPIC_I8259_ICW2;
+
+/* I8259 PIC register structure */
+typedef union _PIC_I8259_ICW3
+{
+    union
+    {
+        struct
+        {
+            UCHAR SlaveIrq0:1;
+            UCHAR SlaveIrq1:1;
+            UCHAR SlaveIrq2:1;
+            UCHAR SlaveIrq3:1;
+            UCHAR SlaveIrq4:1;
+            UCHAR SlaveIrq5:1;
+            UCHAR SlaveIrq6:1;
+            UCHAR SlaveIrq7:1;
+        };
+        struct
+        {
+            UCHAR SlaveId:3;
+            UCHAR Reserved:5;
+        };
+    };
+    UCHAR Bits;
+} PIC_I8259_ICW3, *PPIC_I8259_ICW3;
+
+/* I8259 PIC register structure */
+typedef union _PIC_I8259_ICW4
+{
+    struct
+    {
+        UCHAR SystemMode:1;
+        UCHAR EoiMode:1;
+        UCHAR BufferedMode:2;
+        UCHAR SpecialFullyNestedMode:1;
+        UCHAR Reserved:3;
+    };
+    UCHAR Bits;
+} PIC_I8259_ICW4, *PPIC_I8259_ICW4;
 
 #endif /* __XTDK_AMD64_HLTYPES_H */

sdk/xtdk/amd64/ketypes.h

@@ -67,31 +67,6 @@
 #define AMD64_INTERRUPT_GATE                      0xE
 #define AMD64_TRAP_GATE                           0xF
 
-/* EFLAGS bits definitions */
-#define EFLAGS_NF_MASK                            0x00000000L /* None */
-#define EFLAGS_CF_MASK                            0x00000001L /* Carry */
-#define EFLAGS_PF_MASK                            0x00000004L /* Parity */
-#define EFLAGS_AF_MASK                            0x00000010L /* Aux Carry */
-#define EFLAGS_ZF_MASK                            0x00000040L /* Zero */
-#define EFLAGS_SF_MASK                            0x00000080L /* Sign */
-#define EFLAGS_TF                                 0x00000100L /* Trap */
-#define EFLAGS_INTERRUPT_MASK                     0x00000200L /* Interrupt */
-#define EFLAGS_DF_MASK                            0x00000400L /* Direction */
-#define EFLAGS_OF_MASK                            0x00000800L /* Overflow */
-#define EFLAGS_IOPL_MASK                          0x00003000L /* I/O Privilege */
-#define EFLAGS_NT                                 0x00004000L /* Nested Task */
-#define EFLAGS_SIGN_MASK                          0x00008000L /* Sign */
-#define EFLAGS_RF                                 0x00010000L /* Resume */
-#define EFLAGS_V86_MASK                           0x00020000L /* Virtual 8086 */
-#define EFLAGS_ALIGN_CHECK                        0x00040000L /* Alignment Check */
-#define EFLAGS_VIF                                0x00080000L /* Virtual Interrupt */
-#define EFLAGS_VIP                                0x00100000L /* Virtual Interrupt Pending */
-#define EFLAGS_ID_MASK                            0x00200000L /* Identification */
-
-/* EFLAGS sanitize masks */
-#define EFLAGS_KERNELMODE                         0x00210FD5L
-#define EFLAGS_USERMODE                           0x00010DD5L
-
 /* Context control flags */
 #define CONTEXT_ARCHITECTURE                      0x00100000
 #define CONTEXT_CONTROL                           (CONTEXT_ARCHITECTURE | 0x01)
@@ -142,6 +117,10 @@
 /* XTOS Kernel stack guard pages */
 #define KERNEL_STACK_GUARD_PAGES          1
 
+/* Processor structures size */
+#define KPROCESSOR_STRUCTURES_SIZE        ((2 * KERNEL_STACK_SIZE) + sizeof(ArInitialGdt) + sizeof(ArInitialTss) + \
+                                          sizeof(ArInitialProcessorBlock) + MM_PAGE_SIZE)
+
 /* Kernel frames */
 #define KEXCEPTION_FRAME_SIZE             sizeof(KEXCEPTION_FRAME)
 #define KSWITCH_FRAME_SIZE                sizeof(KSWITCH_FRAME)
@@ -314,7 +293,7 @@ typedef struct _KTSS
     ULONG64 Reserved1;
     USHORT Reserved2;
     USHORT IoMapBase;
-} PACK KTSS, *PKTSS;
+} PACKED KTSS, *PKTSS;
 
 /* Exception frame definition */
 typedef struct _KEXCEPTION_FRAME
@@ -491,7 +470,7 @@ typedef struct _KPROCESSOR_STATE
 typedef struct _KPROCESSOR_CONTROL_BLOCK
 {
     ULONG MxCsr;
-    UCHAR Number;
+    UCHAR CpuNumber;
     PKTHREAD CurrentThread;
     PKTHREAD IdleThread;
     PKTHREAD NextThread;
@@ -526,8 +505,13 @@ typedef struct _KPROCESSOR_BLOCK
     PKIDTENTRY IdtBase;
     KRUNLEVEL RunLevel;
     KPROCESSOR_CONTROL_BLOCK Prcb;
+    ULONG Irr;
+    ULONG IrrActive;
+    ULONG Idr;
     ULONG ContextSwitches;
+    KAFFINITY SetMember;
     ULONG StallScaleFactor;
+    UCHAR CpuNumber;
 } KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;
 
 /* Thread Environment Block (TEB) structure definition */

sdk/xtdk/amd64/mmtypes.h

@@ -14,22 +14,28 @@
 
 
 /* Pages related definitions */
-#define MM_PAGE_MASK                               0xFFF
+#define MM_PAGE_MASK                               (MM_PAGE_SIZE - 1)
 #define MM_PAGE_SHIFT                              12L
 #define MM_PAGE_SIZE                               4096
 
+/* Page directory and page base addresses */
 #define MM_PTE_BASE                                0xFFFFF68000000000UI64
 #define MM_PDE_BASE                                0xFFFFF6FB40000000UI64
 #define MM_PPE_BASE                                0xFFFFF6FB7DA00000UI64
 #define MM_PXE_BASE                                0xFFFFF6FB7DBED000UI64
 
+/* PTE shift values */
+#define MM_PTE_SHIFT                               3
 #define MM_PTI_SHIFT                               12
 #define MM_PDI_SHIFT                               21
 #define MM_PPI_SHIFT                               30
 #define MM_PXI_SHIFT                               39
+#define MM_LA57_SHIFT                              48
 
-#define MM_PTE_SHIFT                               3
-
+/* Number of PTEs per page */
+#define MM_PTE_PER_PAGE                            512
+#define MM_PDE_PER_PAGE                            512
+#define MM_PPE_PER_PAGE                            512
 #define MM_PXE_PER_PAGE                            512
 
 /* Minimum number of physical pages needed by the system */
@@ -38,6 +44,18 @@
 /* Default number of secondary colors */
 #define MM_DEFAULT_SECONDARY_COLORS                64
 
+/* Number of HAL allocation descriptors */
+#define MM_HARDWARE_ALLOCATION_DESCRIPTORS         64
+
+/* Kernel HAL heap initial start address */
+#define MM_HARDWARE_HEAP_START_ADDRESS             ((PVOID)(((ULONG_PTR)MM_HARDWARE_VA_START) + 1024 * 1024))
+
+/* HAL memory pool virtual address start */
+#define MM_HARDWARE_VA_START                       0xFFFFFFFFFFC00000ULL
+
+/* Maximum physical address used by HAL allocations */
+#define MM_MAXIMUM_PHYSICAL_ADDRESS                0x00000000FFFFFFFF
+
 /* Page size enumeration list */
 typedef enum _PAGE_SIZE
 {

sdk/xtdk/amd64/xtstruct.h

@@ -13,10 +13,20 @@
 
 
 /* Architecture-specific enumeration lists forward references */
+typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH;
+typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE;
+typedef enum _APIC_MT APIC_MT, *PAPIC_MT;
+typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER;
 typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR;
 typedef enum _CPUID_FEATURES CPUID_FEATURES, *PCPUID_FEATURES;
 typedef enum _CPUID_REQUESTS CPUID_REQUESTS, *PCPUID_REQUESTS;
 typedef enum _PAGE_SIZE PAGE_SIZE, *PPAGE_SIZE;
+typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE PIC_I8259_ICW1_INTERRUPT_MODE, *PPIC_I8259_ICW1_INTERRUPT_MODE;
+typedef enum _PIC_I8259_ICW1_INTERVAL PIC_I8259_ICW1_INTERVAL, *PPIC_I8259_ICW1_INTERVAL;
+typedef enum _PIC_I8259_ICW1_OPERATING_MODE PIC_I8259_ICW1_OPERATING_MODE, *PPIC_I8259_ICW1_OPERATING_MODE;
+typedef enum _PIC_I8259_ICW4_BUFFERED_MODE PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
+typedef enum _PIC_I8259_ICW4_EOI_MODE PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
+typedef enum _PIC_I8259_ICW4_SYSTEM_MODE PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
 
 /* Architecture-specific structures forward references */
 typedef struct _CONTEXT CONTEXT, *PCONTEXT;
@@ -49,9 +59,17 @@ typedef struct _MMPTE_TRANSITION MMPTE_TRANSITION, *PMMPTE_TRANSITION;
 typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
 
 /* Unions forward references */
+typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
+typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
+typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER;
+typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
 typedef union _MMPTE MMPDE, *PMMPDE;
 typedef union _MMPTE MMPPE, *PMMPPE;
 typedef union _MMPTE MMPTE, *PMMPTE;
 typedef union _MMPTE MMPXE, *PMMPXE;
+typedef union _PIC_I8259_ICW1 PIC_I8259_ICW1, *PPIC_I8259_ICW1;
+typedef union _PIC_I8259_ICW2 PIC_I8259_ICW2, *PPIC_I8259_ICW2;
+typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3;
+typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4;
 
 #endif /* __XTDK_AMD64_XTSTRUCT_H */

sdk/xtdk/bltypes.h

@@ -40,7 +40,7 @@
 #define XTBL_TUI_MAX_DIALOG_WIDTH                                   100
 
 /* XTLDR Routine pointers */
-typedef LONG (*PBL_GET_MEMTYPE_ROUTINE)(IN LONG EfiMemoryType);
+typedef LONG (*PBL_GET_MEMTYPE_ROUTINE)(IN EFI_MEMORY_TYPE EfiMemoryType);
 
 /* Boot Loader protocol routine pointers */
 typedef EFI_STATUS (*PBL_ALLOCATE_PAGES)(IN ULONGLONG Size, OUT PEFI_PHYSICAL_ADDRESS Memory);
@@ -84,7 +84,7 @@ typedef EFI_STATUS (*PBL_INVOKE_BOOT_PROTOCOL)(IN PWCHAR ShortName, IN PLIST_ENT
 typedef EFI_STATUS (*PBL_LOCATE_PROTOCOL_HANDLES)(OUT PEFI_HANDLE *Handles, OUT PUINT_PTR Count, IN PEFI_GUID ProtocolGuid);
 typedef EFI_STATUS (*PBL_LOAD_EFI_IMAGE)(IN PEFI_DEVICE_PATH_PROTOCOL DevicePath, IN PVOID ImageData, IN SIZE_T ImageSize, OUT PEFI_HANDLE ImageHandle);
 typedef EFI_STATUS (*PBL_MAP_EFI_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN OUT PVOID *MemoryMapAddress, IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
-typedef EFI_STATUS (*PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN UINT_PTR VirtualAddress, IN UINT_PTR PhysicalAddress, IN UINT NumberOfPages);
+typedef EFI_STATUS (*PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR VirtualAddress, IN ULONG_PTR PhysicalAddress, IN ULONG NumberOfPages);
 typedef EFI_STATUS (*PBL_MAP_VIRTUAL_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN PVOID VirtualAddress, IN PVOID PhysicalAddress, IN ULONGLONG NumberOfPages, IN LOADER_MEMORY_TYPE MemoryType);
 typedef EFI_STATUS (*PBL_OPEN_VOLUME)(IN PEFI_DEVICE_PATH_PROTOCOL DevicePath, OUT PEFI_HANDLE DiskHandle, OUT PEFI_FILE_HANDLE *FsHandle);
 typedef EFI_STATUS (*PBL_OPEN_PROTOCOL)(OUT PEFI_HANDLE Handle, OUT PVOID *ProtocolHandler, IN PEFI_GUID ProtocolGuid);
@@ -110,6 +110,7 @@ typedef VOID (XTAPI *PBL_ZERO_MEMORY)(OUT PVOID Destination, IN SIZE_T Length);
 
 /* Module protocols routine pointers */
 typedef EFI_STATUS (*PBL_ACPI_GET_ACPI_DESCRIPTION_POINTER)(OUT PVOID *AcpiTable);
+typedef EFI_STATUS (*PBL_ACPI_GET_ACPI_TABLE)(IN CONST UINT Signature, IN PVOID PreviousTable, OUT PVOID *AcpiTable);
 typedef EFI_STATUS (*PBL_ACPI_GET_APIC_BASE)(OUT PVOID *ApicBase);
 typedef EFI_STATUS (*PBL_ACPI_GET_RSDP_TABLE)(OUT PVOID *AcpiTable);
 typedef EFI_STATUS (*PBL_ACPI_GET_SMBIOS_TABLE)(OUT PVOID *SmBiosTable);
@@ -269,14 +270,14 @@ typedef struct _XTBL_FRAMEBUFFER_MODE_INFORMATION
     EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
     struct
     {
-        USHORT BlueMask;
         USHORT BlueShift;
-        USHORT GreenMask;
+        USHORT BlueSize;
         USHORT GreenShift;
-        USHORT RedMask;
+        USHORT GreenSize;
         USHORT RedShift;
-        USHORT ReservedMask;
+        USHORT RedSize;
         USHORT ReservedShift;
+        USHORT ReservedSize;
     } PixelInformation;
 } XTBL_FRAMEBUFFER_MODE_INFORMATION, *PXTBL_FRAMEBUFFER_MODE_INFORMATION;
 
@@ -301,6 +302,7 @@ typedef struct _XTBL_FRAMEBUFFER_INFORMATION
 typedef struct _XTBL_ACPI_PROTOCOL
 {
     PBL_ACPI_GET_ACPI_DESCRIPTION_POINTER GetAcpiDescriptionPointer;
+    PBL_ACPI_GET_ACPI_TABLE GetAcpiTable;
     PBL_ACPI_GET_APIC_BASE GetApicBase;
     PBL_ACPI_GET_RSDP_TABLE GetRsdpTable;
     PBL_ACPI_GET_SMBIOS_TABLE GetSMBiosTable;

sdk/xtdk/hlfuncs.h

@@ -23,7 +23,6 @@ HlComPortPutByte(IN PCPPORT Port,
 XTCDECL
 XTSTATUS
 HlInitializeComPort(IN OUT PCPPORT Port,
-                    IN ULONG PortNumber,
                     IN PUCHAR PortAddress,
                     IN ULONG BaudRate);
 

sdk/xtdk/hltypes.h

@@ -9,9 +9,98 @@
 #ifndef __XTDK_HLTYPES_H
 #define __XTDK_HLTYPES_H
 
+#include <xtbase.h>
+#include <xtdefs.h>
 #include <xttypes.h>
+#include ARCH_HEADER(hltypes.h)
 
 
+/* ACPI Root System Description Pointer (RSDP) signature */
+#define ACPI_RSDP_SIGNATURE                         0x2052545020445352
+
+/* ACPI table signatures */
+#define ACPI_BERT_SIGNATURE                         0x54524542 /* Boot Error Record Table */
+#define ACPI_BGRT_SIGNATURE                         0x54524742 /* Boot Graphics Record Table */
+#define ACPI_BOOT_SIGNATURE                         0x544F4F42 /* ACPI BOOT Table */
+#define ACPI_CPEP_SIGNATURE                         0x50455043 /* Corrected Platform Error Polling Table */
+#define ACPI_DBG2_SIGNATURE                         0x32474244 /* Debug Port Table v2 */
+#define ACPI_DBGP_SIGNATURE                         0x50474244 /* Debug Port Table */
+#define ACPI_DMAR_SIGNATURE                         0x52414D44 /* DMA Remapping Table */
+#define ACPI_DSDT_SIGNATURE                         0x54445344 /* Differentiated System Description Table */
+#define ACPI_ECDT_SIGNATURE                         0x54444345 /* Embedded Controller Description Table */
+#define ACPI_ERST_SIGNATURE                         0x54535245 /* Error Record Serialization Table */
+#define ACPI_FACS_SIGNATURE                         0x53434146 /* Firmware ACPI Control Structure */
+#define ACPI_FADT_SIGNATURE                         0x50434146 /* Fixed ACPI Description Table */
+#define ACPI_FBPT_SIGNATURE                         0x54504246 /* Firmware Boot Performance Table */
+#define ACPI_FPDT_SIGNATURE                         0x54445046 /* Firmware Performance Data Table */
+#define ACPI_GTDT_SIGNATURE                         0x54445447 /* Generic Timer Description Table */
+#define ACPI_HPET_SIGNATURE                         0x54455048 /* High Precision Event Timer */
+#define ACPI_IVRS_SIGNATURE                         0x53525649 /* AMD IOMMU Resource Table */
+#define ACPI_MADT_SIGNATURE                         0x43495041 /* MADT/APIC Description Table */
+#define ACPI_MCFG_SIGNATURE                         0x4746434D /* Memory Mapped Configuration Space Access Table */
+#define ACPI_MPST_SIGNATURE                         0x5453504D /* Memory Power State Table*/
+#define ACPI_MSCT_SIGNATURE                         0x5443534D /* Maximum System Characteristics Table */
+#define ACPI_NFIT_SIGNATURE                         0x5449464E /* NVDIMM Firmware Interface Table */
+#define ACPI_PMMT_SIGNATURE                         0x544D4D50 /* Platform Memory Topology Table */
+#define ACPI_PSDT_SIGNATURE                         0x54445350 /* Persistent System Description Table */
+#define ACPI_RAS2_SIGNATURE                         0x32534152 /* ACPI RAS2 Feature Table */
+#define ACPI_RASF_SIGNATURE                         0x46534152 /* ACPI RAS Feature Table */
+#define ACPI_RSDT_SIGNATURE                         0x54445352 /* Root System Description Table */
+#define ACPI_SBST_SIGNATURE                         0x54534253 /* Smart Battery Subsystem Table */
+#define ACPI_SDEV_SIGNATURE                         0x56454453 /* Secure Device Table */
+#define ACPI_SLIT_SIGNATURE                         0x54494C53 /* System Locality Distance Information Table */
+#define ACPI_SPCR_SIGNATURE                         0x52435053 /* Serial Port Console Redirection Table */
+#define ACPI_SRAT_SIGNATURE                         0x54415253 /* Static Resource Affinity Table */
+#define ACPI_SSDT_SIGNATURE                         0x54445353 /* Secondary System Descriptor Table */
+#define ACPI_TPM2_SIGNATURE                         0x324D5054 /* ACPI TPM 2.0 Table */
+#define ACPI_WAET_SIGNATURE                         0x54454157 /* Windows ACPI Enlightenment Table */
+#define ACPI_WDAT_SIGNATURE                         0x54414457 /* Watch Dog Action Table */
+#define ACPI_WDTT_SIGNATURE                         0x54524457 /* Watchdog Timer Resource Table */
+#define ACPI_WPBT_SIGNATURE                         0x54425057 /* Windows Platform Binary Table */
+#define ACPI_WSMT_SIGNATURE                         0x544D5357 /* Windows SMM Security Mitigation Table */
+#define ACPI_XSDT_SIGNATURE                         0x54445358 /* eXtended System Descriptor Table */
+
+/* ACPI FADT flags masks */
+#define ACPI_FADT_32BIT_TIMER                       (1<<8)
+
+/* ACPI Timer bit masks */
+#define ACPI_FADT_TIMER_32BIT                       0x80000000
+#define ACPI_FADT_TIMER_24BIT                       0x00800000
+
+/* ACPI MADT subtable type definitions */
+#define ACPI_MADT_TYPE_LOCAL_APIC                   0
+#define ACPI_MADT_TYPE_IOAPIC                       1
+#define ACPI_MADT_TYPE_INT_OVERRIDE                 2
+#define ACPI_MADT_TYPE_NMI_SOURCE                   3
+#define ACPI_MADT_TYPE_LOCAL_APIC_NMI               4
+#define ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE          5
+#define ACPI_MADT_TYPE_IO_SAPIC                     6
+#define ACPI_MADT_TYPE_LOCAL_SAPIC                  7
+#define ACPI_MADT_TYPE_INTERRUPT_SOURCE             8
+#define ACPI_MADT_TYPE_LOCAL_X2APIC                 9
+#define ACPI_MADT_TYPE_LOCAL_X2APIC_NMI             10
+#define ACPI_MADT_TYPE_GENERIC_INTERRUPT            11
+#define ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR          12
+#define ACPI_MADT_TYPE_GENERIC_MSI_FRAME            13
+#define ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR        14
+#define ACPI_MADT_TYPE_GENERIC_TRANSLATOR           15
+#define ACPI_MADT_TYPE_MULTIPROC_WAKEUP             16
+#define ACPI_MADT_TYPE_CORE_PIC                     17
+#define ACPI_MADT_TYPE_LIO_PIC                      18
+#define ACPI_MADT_TYPE_HT_PIC                       19
+#define ACPI_MADT_TYPE_EIO_PIC                      20
+#define ACPI_MADT_TYPE_MSI_PIC                      21
+#define ACPI_MADT_TYPE_BIO_PIC                      22
+#define ACPI_MADT_TYPE_LPC_PIC                      23
+#define ACPI_MADT_TYPE_RINTC                        24
+#define ACPI_MADT_TYPE_IMSIC                        25
+#define ACPI_MADT_TYPE_APLIC                        26
+#define ACPI_MADT_TYPE_PLIC                         27
+
+/* ACPI MADT Processor Local APIC Flags */
+#define ACPI_MADT_PLACE_ENABLED                     0 /* Processor Local APIC CPU Enabled */
+#define ACPI_MADT_PLAOC_ENABLED                     1 /* Processor Local APIC Online Capable */
+
 /* Default serial port settings */
 #define COMPORT_CLOCK_RATE                          0x1C200
 #define COMPORT_WAIT_TIMEOUT                        204800
@@ -90,49 +179,183 @@
 #define COMPORT_REG_MSR                             0x06 /* Modem Status Register */
 #define COMPORT_REG_SR                              0x07 /* Scratch Register */
 
-/* APIC Register Address Map */
-typedef enum _APIC_REGISTER
+/* Generic Address structure */
+typedef struct _GENERIC_ADDRESS
 {
-    APIC_ID                       = 0x02, /* APIC ID Register */
-    APIC_VER                      = 0x03, /* APIC Version Register */
-    APIC_TPR                      = 0x08, /* Task Priority Register */
-    APIC_APR                      = 0x09, /* Arbitration Priority Register */
-    APIC_PPR                      = 0x0A, /* Processor Priority Register (R) */
-    APIC_EOI                      = 0x0B, /* EOI Register */
-    APIC_RRR                      = 0x0C, /* Remote Read Register */
-    APIC_LDR                      = 0x0D, /* Logical Destination Register */
-    APIC_DFR                      = 0x0E, /* Destination Format Register (not available in extended mode) */
-    APIC_SIVR                     = 0x0F, /* Spurious Interrupt Vector Register */
-    APIC_ISR                      = 0x10, /* Interrupt Service Register*/
-    APIC_TMR                      = 0x18, /* Trigger Mode Register */
-    APIC_IRR                      = 0x20, /* Interrupt Request Register */
-    APIC_ESR                      = 0x28, /* Error Status Register */
-    APIC_ICR0                     = 0x30, /* Interrupt Command Register */
-    APIC_ICR1                     = 0x31, /* Interrupt Command Register (not available in extended mode) */
-    APIC_TMRLVTR                  = 0x32, /* Timer Local Vector Table */
-    APIC_THRMLVTR                 = 0x33, /* Thermal Local Vector Table */
-    APIC_PCLVTR                   = 0x34, /* Performance Counter Local Vector Table */
-    APIC_LINT0                    = 0x35, /* LINT0 Local Vector Table */
-    APIC_LINT1                    = 0x36, /* LINT1 Local Vector Table */
-    APIC_ERRLVTR                  = 0x37, /* Error Local Vector Table */
-    APIC_TICR                     = 0x38, /* Initial Count Register for Timer */
-    APIC_TCCR                     = 0x39, /* Current Count Register for Timer */
-    APIC_TDCR                     = 0x3E, /* Timer Divide Configuration Register */
-    APIC_EAFR                     = 0x40, /* extended APIC Feature register */
-    APIC_EACR                     = 0x41, /* Extended APIC Control Register */
-    APIC_SEOI                     = 0x42, /* Specific End Of Interrupt Register */
-    APIC_EXT0LVTR                 = 0x50, /* Extended Interrupt 0 Local Vector Table */
-    APIC_EXT1LVTR                 = 0x51, /* Extended Interrupt 1 Local Vector Table */
-    APIC_EXT2LVTR                 = 0x52, /* Extended Interrupt 2 Local Vector Table */
-    APIC_EXT3LVTR                 = 0x53  /* Extended Interrupt 3 Local Vector Table */
-} APIC_REGISTER, *PAPIC_REGISTER;
+    UCHAR AddressSpaceID;
+    UCHAR BitWidth;
+    UCHAR BitOffset;
+    UCHAR Reserved;
+    PHYSICAL_ADDRESS Address;
+} PACKED GENERIC_ADDRESS, *PGENERIC_ADDRESS;
 
-/* APIC mode list */
-typedef enum _HAL_APIC_MODE
+/* Each ACPI table description header structure */
+typedef struct _ACPI_DESCRIPTION_HEADER
 {
-    APIC_MODE_COMPAT,
-    APIC_MODE_X2APIC
-} HAL_APIC_MODE, *PHAL_APIC_MODE;
+    ULONG Signature;
+    ULONG Length;
+    UCHAR Revision;
+    UCHAR Checksum;
+    UCHAR OemId[6];
+    UCHAR OemTableID[8];
+    ULONG OemRevision;
+    UCHAR CreatorID[4];
+    ULONG CreatorRev;
+} PACKED ACPI_DESCRIPTION_HEADER, *PACPI_DESCRIPTION_HEADER;
+
+/* Each ACPI subtable description header structure */
+typedef struct _ACPI_SUBTABLE_HEADER
+{
+    UCHAR Type;
+    UCHAR Length;
+} PACKED ACPI_SUBTABLE_HEADER, *PACPI_SUBTABLE_HEADER;
+
+/* ACPI cache list structure */
+typedef struct _ACPI_CACHE_LIST
+{
+    LIST_ENTRY ListEntry;
+    ACPI_DESCRIPTION_HEADER Header;
+} ACPI_CACHE_LIST, *PACPI_CACHE_LIST;
+
+/* ACPI Root System Description Table Pointer (RSDP) structure */
+typedef struct _ACPI_RSDP
+{
+    ULONGLONG Signature;
+    UCHAR Checksum;
+    UCHAR OemId[6];
+    UCHAR Revision;
+    ULONG RsdtAddress;
+    ULONG Length;
+    ULONGLONG XsdtAddress;
+    UCHAR XChecksum;
+    UCHAR Reserved[3];
+} PACKED ACPI_RSDP, *PACPI_RSDP;
+
+/* ACPI Root System Description Table (RSDT) structure */
+typedef struct _ACPI_RSDT
+{
+    ACPI_DESCRIPTION_HEADER Header;
+    ULONG Tables[];
+} PACKED ACPI_RSDT, *PACPI_RSDT;
+
+/* ACPI eXtended Root System Description Table (XSDT) structure */
+typedef struct _ACPI_XSDT
+{
+    ACPI_DESCRIPTION_HEADER Header;
+    ULONGLONG Tables[];
+} PACKED ACPI_XSDT, *PACPI_XSDT;
+
+/* Fixed ACPI Description Table (FADT) structure */
+typedef struct _ACPI_FADT
+{
+    ACPI_DESCRIPTION_HEADER Header;
+    ULONG FirmwareCtrl;
+    ULONG Dsdt;
+    UCHAR IntModel;
+    UCHAR PmProfile;
+    USHORT SciIntVector;
+    ULONG SmiCmdIoPort;
+    UCHAR AcpiOnValue;
+    UCHAR AcpiOffValue;
+    UCHAR S4BiosReq;
+    UCHAR PStateControl;
+    ULONG Pm1aEvtBlkIoPort;
+    ULONG Pm1bEvtBlkIoPort;
+    ULONG Pm1aCtrlBlkIoPort;
+    ULONG Pm1bCtrlBlkIoPort;
+    ULONG Pm2CtrlBlkIoPort;
+    ULONG PmTmrBlkIoPort;
+    ULONG Gp0BlkIoPort;
+    ULONG Gp1BlkIoPort;
+    UCHAR Pm1EvtLen;
+    UCHAR Pm1CtrlLen;
+    UCHAR Pm2CtrlLen;
+    UCHAR PmTmrLen;
+    UCHAR Gp0BlkLen;
+    UCHAR Gp1BlkLen;
+    UCHAR Gp1Base;
+    UCHAR CStateControl;
+    USHORT Lvl2Latency;
+    USHORT Lvl3Latency;
+    USHORT FlushSize;
+    USHORT FlushStride;
+    UCHAR DutyOffset;
+    UCHAR DutyWidth;
+    UCHAR DayAlarmIndex;
+    UCHAR MonthAlarmIndex;
+    UCHAR CenturyAlarmIndex;
+    USHORT BootArch;
+    UCHAR Reserved0;
+    ULONG Flags;
+    GENERIC_ADDRESS ResetReg;
+    UCHAR ResetVal;
+    USHORT ArmBootArch;
+    UCHAR Reserved1;
+    PHYSICAL_ADDRESS XFirmwareCtrl;
+    PHYSICAL_ADDRESS XDsdt;
+    GENERIC_ADDRESS XPm1aEvtBlk;
+    GENERIC_ADDRESS XPm1bEvtBlk;
+    GENERIC_ADDRESS XPm1aCtrlBlk;
+    GENERIC_ADDRESS XPm1bCtrlBlk;
+    GENERIC_ADDRESS XPm2CtrlBlk;
+    GENERIC_ADDRESS XPmTmrBlk;
+    GENERIC_ADDRESS XGp0Blk;
+    GENERIC_ADDRESS XGp1Blk;
+    GENERIC_ADDRESS SleepControlReg;
+    GENERIC_ADDRESS SleepStatusReg;
+} PACKED ACPI_FADT, *PACPI_FADT;
+
+/* ACPI Multiple APIC Description Table (MADT) structure */
+typedef struct _ACPI_MADT
+{
+    ACPI_DESCRIPTION_HEADER Header;
+    ULONG LocalApicAddress;
+    ULONG Flags;
+    ULONG ApicTables[];
+} PACKED ACPI_MADT, *PACPI_MADT;
+
+/* ACPI Local APIC MADT subtable structure */
+typedef struct _ACPI_MADT_LOCAL_APIC
+{
+    ACPI_SUBTABLE_HEADER Header;
+    UCHAR AcpiId;
+    UCHAR ApicId;
+    ULONG Flags;
+} PACKED ACPI_MADT_LOCAL_APIC, *PACPI_MADT_LOCAL_APIC;
+
+/* ACPI Local X2APIC MADT subtable structure */
+typedef struct _ACPI_MADT_LOCAL_X2APIC
+{
+    ACPI_SUBTABLE_HEADER Header;
+    USHORT Reserved;
+    ULONG ApicId;
+    ULONG Flags;
+    ULONG AcpiId;
+} PACKED ACPI_MADT_LOCAL_X2APIC, *PACPI_MADT_LOCAL_X2APIC;
+
+/* ACPI System Information structure */
+typedef struct _ACPI_SYSTEM_INFO
+{
+    ULONG CpuCount;
+    ULONG RunningCpus;
+    ULONG BusCount;
+    ULONG IoApicCount;
+    ULONG IntiCount;
+    ULONG LintiCount;
+    BOOLEAN ImcrPresent;
+    ULONG ApicBase;
+    PPROCESSOR_IDENTITY CpuInfo;
+    ULONG IoApicPhysicalBase[APIC_MAX_IOAPICS];
+    ULONG IoApicVirtualBase[APIC_MAX_IOAPICS];
+    ULONG IoApicVectorBase[APIC_MAX_IOAPICS];
+} ACPI_SYSTEM_INFO, *PACPI_SYSTEM_INFO;
+
+/* ACPI Timer information structure */
+typedef struct _ACPI_TIMER_INFO
+{
+    ULONG TimerPort;
+    ULONG MsbMask;
+} ACPI_TIMER_INFO, *PACPI_TIMER_INFO;
 
 /* Serial (COM) port initial state */
 typedef struct _CPPORT
@@ -154,8 +377,29 @@ typedef struct _HAL_FRAMEBUFFER_DATA
     UINT BitsPerPixel;
     UINT Pitch;
     PVOID Font;
+    struct
+    {
+        USHORT BlueShift;
+        USHORT BlueSize;
+        USHORT GreenShift;
+        USHORT GreenSize;
+        USHORT RedShift;
+        USHORT RedSize;
+        USHORT ReservedShift;
+        USHORT ReservedSize;
+    } Pixels;
 } HAL_FRAMEBUFFER_DATA, *PHAL_FRAMEBUFFER_DATA;
 
+/* Processor identity structure */
+typedef struct _PROCESSOR_IDENTITY
+{
+    ULONG AcpiId;
+    ULONG ApicId;
+    USHORT CpuNumber;
+    BOOLEAN Bsp;
+    BOOLEAN Started;
+} PROCESSOR_IDENTITY, *PPROCESSOR_IDENTITY;
+
 /* SMBIOS table header structure */
 typedef struct _SMBIOS_TABLE_HEADER
 {

sdk/xtdk/i686/artypes.h

@@ -62,6 +62,27 @@
 #define SEGMENT_FS                                      0x64
 #define SEGMENT_GS                                      0x65
 
+/* X86 EFLAG bit masks definitions */
+#define X86_EFLAGS_NF_MASK                              0x00000000 /* None */
+#define X86_EFLAGS_CF_MASK                              0x00000001 /* Carry */
+#define X86_EFLAGS_PF_MASK                              0x00000004 /* Parity */
+#define X86_EFALGS_AF_MASK                              0x00000010 /* Aux Carry */
+#define X86_EFLAGS_ZF_MASK                              0x00000040 /* Zero */
+#define X86_EFLAGS_SF_MASK                              0x00000080 /* Sign */
+#define X86_EFLAGS_TF_MASK                              0x00000100 /* Trap */
+#define X86_EFLAGS_IF_MASK                              0x00000200 /* Interrupt */
+#define X86_EFLAGS_DF_MASK                              0x00000400 /* Direction */
+#define X86_EFLAGS_OF_MASK                              0x00000800 /* Overflow */
+#define X86_EFLAGS_IOPL_MASK                            0x00003000 /* I/O Privilege */
+#define X86_EFLAGS_NT_MASK                              0x00004000 /* Nested Task */
+#define X86_EFLAGS_SIGN_MASK                            0x00008000 /* Sign */
+#define X86_EFLAGS_RF_MASK                              0x00010000 /* Resume */
+#define X86_EFLAGS_V86_MASK                             0x00020000 /* Virtual 8086 */
+#define X86_EFLAGS_AC_MASK                              0x00040000 /* Alignment Check */
+#define X86_EFLAGS_VIF_MASK                             0x00080000 /* Virtual Interrupt */
+#define X86_EFLAGS_VIP_MASK                             0x00100000 /* Virtual Interrupt Pending */
+#define X86_EFLAGS_ID_MASK                              0x00200000 /* Identification */
+
 /* CPU vendor enumeration list */
 typedef enum _CPU_VENDOR
 {

sdk/xtdk/i686/hltypes.h

@@ -48,19 +48,26 @@
 #define APIC_DF_CLUSTER                                 0x0FFFFFFF
 
 /* APIC delivery modes */
-#define APIC_DM_FIXED                                   0
-#define APIC_DM_LOWPRIO                                 1
-#define APIC_DM_SMI                                     2
-#define APIC_DM_REMOTE                                  3
-#define APIC_DM_NMI                                     4
-#define APIC_DM_INIT                                    5
-#define APIC_DM_STARTUP                                 6
-#define APIC_DM_EXTINT                                  7
+#define APIC_DM_FIXED                                   0x00000000
+#define APIC_DM_LOWPRIO                                 0x00000100
+#define APIC_DM_SMI                                     0x00000200
+#define APIC_DM_REMOTE                                  0x00000300
+#define APIC_DM_NMI                                     0x00000400
+#define APIC_DM_INIT                                    0x00000500
+#define APIC_DM_STARTUP                                 0x00000600
+#define APIC_DM_EXTINT                                  0x00000700
 
 /* APIC trigger modes */
 #define APIC_TGM_EDGE                                   0
 #define APIC_TGM_LEVEL                                  1
 
+/* APIC LDR (Logical Destination Register) shifts */
+#define APIC_X2APIC_LDR_SHIFT                           16
+#define APIC_XAPIC_LDR_SHIFT                            24
+
+/* Maximum number of I/O APICs */
+#define APIC_MAX_IOAPICS                                64
+
 /* 8259/ISP PIC ports definitions */
 #define PIC1_CONTROL_PORT                               0x20
 #define PIC1_DATA_PORT                                  0x21
@@ -72,12 +79,123 @@
 /* PIC vector definitions */
 #define PIC1_VECTOR_SPURIOUS                            0x37
 
-/* Serial port I/O addresses */
-#define COMPORT_ADDRESSES                               {0x000, 0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
+/* Serial ports information */
+#define COMPORT_ADDRESS                                 {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
+#define COMPORT_COUNT                                   8
 
 /* Initial stall factor */
 #define INITIAL_STALL_FACTOR                            100
 
+/* APIC Register Address Map */
+typedef enum _APIC_REGISTER
+{
+    APIC_ID       = 0x02, /* APIC ID Register */
+    APIC_VER      = 0x03, /* APIC Version Register */
+    APIC_TPR      = 0x08, /* Task Priority Register */
+    APIC_APR      = 0x09, /* Arbitration Priority Register */
+    APIC_PPR      = 0x0A, /* Processor Priority Register (R) */
+    APIC_EOI      = 0x0B, /* EOI Register */
+    APIC_RRR      = 0x0C, /* Remote Read Register */
+    APIC_LDR      = 0x0D, /* Logical Destination Register */
+    APIC_DFR      = 0x0E, /* Destination Format Register (not available in extended mode) */
+    APIC_SIVR     = 0x0F, /* Spurious Interrupt Vector Register */
+    APIC_ISR      = 0x10, /* Interrupt Service Register*/
+    APIC_TMR      = 0x18, /* Trigger Mode Register */
+    APIC_IRR      = 0x20, /* Interrupt Request Register */
+    APIC_ESR      = 0x28, /* Error Status Register */
+    APIC_ICR0     = 0x30, /* Interrupt Command Register */
+    APIC_ICR1     = 0x31, /* Interrupt Command Register (not available in extended mode) */
+    APIC_TMRLVTR  = 0x32, /* Timer Local Vector Table */
+    APIC_THRMLVTR = 0x33, /* Thermal Local Vector Table */
+    APIC_PCLVTR   = 0x34, /* Performance Counter Local Vector Table */
+    APIC_LINT0    = 0x35, /* LINT0 Local Vector Table */
+    APIC_LINT1    = 0x36, /* LINT1 Local Vector Table */
+    APIC_ERRLVTR  = 0x37, /* Error Local Vector Table */
+    APIC_TICR     = 0x38, /* Initial Count Register for Timer */
+    APIC_TCCR     = 0x39, /* Current Count Register for Timer */
+    APIC_TDCR     = 0x3E, /* Timer Divide Configuration Register */
+    APIC_EAFR     = 0x40, /* extended APIC Feature register */
+    APIC_EACR     = 0x41, /* Extended APIC Control Register */
+    APIC_SEOI     = 0x42, /* Specific End Of Interrupt Register */
+    APIC_EXT0LVTR = 0x50, /* Extended Interrupt 0 Local Vector Table */
+    APIC_EXT1LVTR = 0x51, /* Extended Interrupt 1 Local Vector Table */
+    APIC_EXT2LVTR = 0x52, /* Extended Interrupt 2 Local Vector Table */
+    APIC_EXT3LVTR = 0x53  /* Extended Interrupt 3 Local Vector Table */
+} APIC_REGISTER, *PAPIC_REGISTER;
+
+/* APIC mode list */
+typedef enum _APIC_MODE
+{
+    APIC_MODE_COMPAT,
+    APIC_MODE_X2APIC
+} APIC_MODE, *PAPIC_MODE;
+
+/* APIC destination short-hand enumeration list */
+typedef enum _APIC_DSH
+{
+    APIC_DSH_Destination,
+    APIC_DSH_Self,
+    APIC_DSH_AllIncludingSelf,
+    APIC_DSH_AllExclusingSelf
+} APIC_DSH, *PAPIC_DSH;
+
+/* APIC message type enumeration list */
+typedef enum _APIC_MT
+{
+    APIC_MT_Fixed,
+    APIC_MT_LowestPriority,
+    APIC_MT_SMI,
+    APIC_MT_RemoteRead,
+    APIC_MT_NMI,
+    APIC_MT_INIT,
+    APIC_MT_Startup,
+    APIC_MT_ExtInt,
+} APIC_MT, *PAPIC_MT;
+
+/* I8259 PIC interrupt mode enumeration list */
+typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE
+{
+    EdgeTriggered,
+    LevelTriggered
+} PIC_I8259_ICW1_INTERRUPT_MODE, *PPIC_I8259_ICW1_INTERRUPT_MODE;
+
+/* I8259 PIC interval enumeration list */
+typedef enum _PIC_I8259_ICW1_INTERVAL
+{
+    Interval8,
+    Interval4
+} PIC_I8259_ICW1_INTERVAL, *PPIC_I8259_ICW1_INTERVAL;
+
+/* I8259 PIC operating mode enumeration list */
+typedef enum _PIC_I8259_ICW1_OPERATING_MODE
+{
+    Cascade,
+    Single
+} PIC_I8259_ICW1_OPERATING_MODE, *PPIC_I8259_ICW1_OPERATING_MODE;
+
+/* I8259 PIC buffered mode enumeration list */
+typedef enum _PIC_I8259_ICW4_BUFFERED_MODE
+{
+    NonBuffered,
+    NonBuffered2,
+    BufferedSlave,
+    BufferedMaster
+} PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
+
+/* I8259 PIC End Of Interrupt (EOI) mode enumeration list */
+typedef enum _PIC_I8259_ICW4_EOI_MODE
+{
+    NormalEoi,
+    AutomaticEoi
+} PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
+
+/* I8259 PIC system mode enumeration list */
+typedef enum _PIC_I8259_ICW4_SYSTEM_MODE
+{
+    Mcs8085Mode,
+    New8086Mode
+} PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
+
 /* APIC Base Register */
 typedef union _APIC_BASE_REGISTER
 {
@@ -94,6 +212,31 @@ typedef union _APIC_BASE_REGISTER
     };
 } APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
 
+/* APIC Command Register */
+typedef union _APIC_COMMAND_REGISTER
+{
+    ULONGLONG LongLong;
+    struct
+    {
+        ULONG Long0;
+        ULONG Long1;
+    };
+    struct
+    {
+        ULONGLONG Vector:8;
+        ULONGLONG MessageType:3;
+        ULONGLONG DestinationMode:1;
+        ULONGLONG DeliveryStatus:1;
+        ULONGLONG ReservedMBZ:1;
+        ULONGLONG Level:1;
+        ULONGLONG TriggerMode:1;
+        ULONGLONG RemoteReadStatus:2;
+        ULONGLONG DestinationShortHand:2;
+        ULONGLONG Reserved2MBZ:36;
+        ULONGLONG Destination:8;
+    };
+} APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
+
 /* APIC Local Vector Table (LVT) Register */
 typedef union _APIC_LVT_REGISTER
 {
@@ -126,14 +269,69 @@ typedef union _APIC_SPURIOUS_REGISTER
     };
 } APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
 
-/* Processor identity structure */
-typedef struct _HAL_PROCESSOR_IDENTITY
+/* I8259 PIC register structure */
+typedef union _PIC_I8259_ICW1
 {
-    UCHAR ProcessorId;
-    UCHAR LApicId;
-    BOOLEAN Bsp;
-    BOOLEAN Started;
-    PKPROCESSOR_BLOCK ProcessorBlock;
-} HAL_PROCESSOR_IDENTITY, *PHAL_PROCESSOR_IDENTITY;
+    struct
+    {
+        UCHAR NeedIcw4:1;
+        UCHAR OperatingMode:1;
+        UCHAR Interval:1;
+        UCHAR InterruptMode:1;
+        UCHAR Init:1;
+        UCHAR InterruptVectorAddress:3;
+    };
+    UCHAR Bits;
+} PIC_I8259_ICW1, *PPIC_I8259_ICW1;
+
+/* I8259 PIC register structure */
+typedef union _PIC_I8259_ICW2
+{
+    struct
+    {
+        UCHAR Sbz:3;
+        UCHAR InterruptVector:5;
+    };
+    UCHAR Bits;
+} PIC_I8259_ICW2, *PPIC_I8259_ICW2;
+
+/* I8259 PIC register structure */
+typedef union _PIC_I8259_ICW3
+{
+    union
+    {
+        struct
+        {
+            UCHAR SlaveIrq0:1;
+            UCHAR SlaveIrq1:1;
+            UCHAR SlaveIrq2:1;
+            UCHAR SlaveIrq3:1;
+            UCHAR SlaveIrq4:1;
+            UCHAR SlaveIrq5:1;
+            UCHAR SlaveIrq6:1;
+            UCHAR SlaveIrq7:1;
+        };
+        struct
+        {
+            UCHAR SlaveId:3;
+            UCHAR Reserved:5;
+        };
+    };
+    UCHAR Bits;
+} PIC_I8259_ICW3, *PPIC_I8259_ICW3;
+
+/* I8259 PIC register structure */
+typedef union _PIC_I8259_ICW4
+{
+    struct
+    {
+        UCHAR SystemMode:1;
+        UCHAR EoiMode:1;
+        UCHAR BufferedMode:2;
+        UCHAR SpecialFullyNestedMode:1;
+        UCHAR Reserved:3;
+    };
+    UCHAR Bits;
+} PIC_I8259_ICW4, *PPIC_I8259_ICW4;
 
 #endif /* __XTDK_I686_HLTYPES_H */

sdk/xtdk/i686/ketypes.h

@@ -95,31 +95,6 @@
 #define I686_INTERRUPT_GATE               0xE
 #define I686_TRAP_GATE                    0xF
 
-/* EFlags bits definitions */
-#define EFLAGS_NF_MASK                    0x00000000L /* None */
-#define EFLAGS_CF_MASK                    0x00000001L /* Carry */
-#define EFLAGS_PF_MASK                    0x00000004L /* Parity */
-#define EFLAGS_AF_MASK                    0x00000010L /* Aux Carry */
-#define EFLAGS_ZF_MASK                    0x00000040L /* Zero */
-#define EFLAGS_SF_MASK                    0x00000080L /* Sign */
-#define EFLAGS_TF                         0x00000100L /* Trap */
-#define EFLAGS_INTERRUPT_MASK             0x00000200L /* Interrupt */
-#define EFLAGS_DF_MASK                    0x00000400L /* Direction */
-#define EFLAGS_OF_MASK                    0x00000800L /* Overflow */
-#define EFLAGS_IOPL_MASK                  0x00003000L /* I/O Privilege */
-#define EFLAGS_NT                         0x00004000L /* Nested Task */
-#define EFLAGS_SIGN_MASK                  0x00008000L /* Sign */
-#define EFLAGS_RF                         0x00010000L /* Resume */
-#define EFLAGS_V86_MASK                   0x00020000L /* Virtual 8086 */
-#define EFLAGS_ALIGN_CHECK                0x00040000L /* Alignment Check */
-#define EFLAGS_VIF                        0x00080000L /* Virtual Interrupt */
-#define EFLAGS_VIP                        0x00100000L /* Virtual Interrupt Pending */
-#define EFLAGS_ID_MASK                    0x00200000L /* Identification */
-
-/* EFLAGS sanitize masks */
-#define EFLAGS_KERNELMODE                 0x003F0FD7L
-#define EFLAGS_USERMODE                   0x003F4DD7L
-
 /* Context control flags */
 #define CONTEXT_ARCHITECTURE              0x00010000
 #define CONTEXT_CONTROL                   (CONTEXT_ARCHITECTURE | 0x01)
@@ -168,6 +143,10 @@
 /* XTOS Kernel stack guard pages */
 #define KERNEL_STACK_GUARD_PAGES          1
 
+/* Processor structures size */
+#define KPROCESSOR_STRUCTURES_SIZE        ((2 * KERNEL_STACK_SIZE) + sizeof(ArInitialGdt) + sizeof(ArInitialTss) + \
+                                          sizeof(ArInitialProcessorBlock) + MM_PAGE_SIZE)
+
 /* Kernel frames */
 #define KTRAP_FRAME_ALIGN                 0x08
 #define KTRAP_FRAME_SIZE                  sizeof(KTRAP_FRAME)
@@ -453,7 +432,7 @@ typedef struct _KPROCESSOR_CONTROL_BLOCK
     PKTHREAD CurrentThread;
     PKTHREAD IdleThread;
     PKTHREAD NextThread;
-    UCHAR Number;
+    UCHAR CpuNumber;
     ULONG_PTR SetMember;
     CPU_IDENTIFICATION CpuId;
     KPROCESSOR_STATE ProcessorState;
@@ -469,17 +448,28 @@ typedef struct _KPROCESSOR_CONTROL_BLOCK
 
 /* Processor Block structure definition */
 typedef struct _KPROCESSOR_BLOCK
+{
+    union
     {
         THREAD_INFORMATION_BLOCK ThreadInformationBlock;
-    PKPROCESSOR_BLOCK Self;
-    PKPROCESSOR_CONTROL_BLOCK CurrentPrcb;
-    KRUNLEVEL RunLevel;
-    PKIDTENTRY IdtBase;
+        struct
+        {
             PKGDTENTRY GdtBase;
             PKTSS TssBase;
+            PKPROCESSOR_BLOCK Self;
+            PKPROCESSOR_CONTROL_BLOCK CurrentPrcb;
+        };
+    };
+    PKIDTENTRY IdtBase;
+    KRUNLEVEL RunLevel;
     KPROCESSOR_CONTROL_BLOCK Prcb;
+    ULONG Irr;
+    ULONG IrrActive;
+    ULONG Idr;
     ULONG ContextSwitches;
+    KAFFINITY SetMember;
     ULONG StallScaleFactor;
+    UCHAR CpuNumber;
 } KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;
 
 /* Thread Environment Block (TEB) structure definition */

sdk/xtdk/i686/mmtypes.h

@@ -14,16 +14,42 @@
 
 
 /* Pages related definitions */
-#define MM_PAGE_MASK                               0xFFF
+#define MM_PAGE_MASK                               (MM_PAGE_SIZE - 1)
 #define MM_PAGE_SHIFT                              12
 #define MM_PAGE_SIZE                               4096
 
+/* Page directory and page base addresses */
+#define MM_PTE_BASE                                0xC0000000
+#define MM_PDE_BASE                                0xC0600000
+
+/* PTE shift values */
+#define MM_PTE_SHIFT                               3
+#define MM_PTI_SHIFT                               12
+#define MM_PDI_SHIFT                               21
+#define MM_PPI_SHIFT                               30
+
+/* PTE legacy shift values */
+#define MM_PDI_LEGACY_SHIFT                        22
+
 /* Minimum number of physical pages needed by the system */
 #define MM_MINIMUM_PHYSICAL_PAGES                  1100
 
 /* Default number of secondary colors */
 #define MM_DEFAULT_SECONDARY_COLORS                64
 
+/* Number of HAL allocation descriptors */
+#define MM_HARDWARE_ALLOCATION_DESCRIPTORS         64
+
+/* Kernel HAL heap initial start address */
+#define MM_HARDWARE_HEAP_START_ADDRESS             ((PVOID)(((ULONG_PTR)MM_HARDWARE_VA_START) + 1024 * 1024))
+
+/* HAL memory pool virtual address start */
+#define MM_HARDWARE_VA_START                       0xFFC00000
+
+/* Maximum physical address used by HAL allocations */
+#define MM_MAXIMUM_PHYSICAL_ADDRESS                0xFFFFFFFF
+
+
 /* Page size enumeration list */
 typedef enum _PAGE_SIZE
 {
@@ -166,95 +192,6 @@ typedef struct _HARDWARE_LEGACY_PTE
     ULONG PageFrameNumber:20;
 } HARDWARE_LEGACY_PTE, *PHARDWARE_LEGACY_PTE;
 
-/* Legacy Page Table Entry on non-PAE system */
-typedef struct _MMPTE_LEGACY_HARDWARE
-{
-    ULONG Valid:1;
-    ULONG Writable:1;
-    ULONG Owner:1;
-    ULONG WriteThrough:1;
-    ULONG CacheDisable:1;
-    ULONG Accessed:1;
-    ULONG Dirty:1;
-    ULONG LargePage:1;
-    ULONG Global:1;
-    ULONG CopyOnWrite:1;
-    ULONG Prototype:1;
-    ULONG Write:1;
-    ULONG PageFrameNumber:20;
-} MMPTE_LEGACY_HARDWARE, *PMMPTE_LEGACY_HARDWARE;
-
-/* Legacy Page Table Entry list structure definition (without PAE support) */
-typedef struct _MMPTE_LEGACY_LIST
-{
-    ULONG Valid:1;
-    ULONG OneEntry:1;
-    ULONG Reserved1:8;
-    ULONG Prototype:1;
-    ULONG Reserved2:1;
-    ULONG NextEntry:20;
-} MMPTE_LEGACY_LIST, *PMMPTE_LEGACY_LIST;
-
-/* Legacy Page Table Entry prototype structure definition (without PAE support) */
-typedef struct _MMPTE_LEGACY_PROTOTYPE
-{
-    ULONG Valid:1;
-    ULONG ProtoAddressLow:7;
-    ULONG ReadOnly:1;
-    ULONG WhichPool:1;
-    ULONG Prototype:1;
-    ULONG ProtoAddressHigh:21;
-} MMPTE_LEGACY_PROTOTYPE, *PMMPTE_LEGACY_PROTOTYPE;
-
-/* Legacy Page Table Entry software structure definition (without PAE support) */
-typedef struct _MMPTE_LEGACY_SOFTWARE
-{
-    ULONG Valid:1;
-    ULONG PageFileLow:4;
-    ULONG Protection:5;
-    ULONG Prototype:1;
-    ULONG Transition:1;
-    ULONG PageFileHigh:20;
-} MMPTE_LEGACY_SOFTWARE, *PMMPTE_LEGACY_SOFTWARE;
-
-/* Legacy Page Table Entry subsection structure definition (without PAE support) */
-typedef struct _MMPTE_LEGACY_SUBSECTION
-{
-    ULONG Valid:1;
-    ULONG SubsectionAddressLow:4;
-    ULONG Protection:5;
-    ULONG Prototype:1;
-    ULONG SubsectionAddressHigh:20;
-    ULONG WhichPool:1;
-} MMPTE_LEGACY_SUBSECTION, *PMMPTE_LEGACY_SUBSECTION;
-
-/* Legacy Page Table Entry transition structure definition (without PAE support) */
-typedef struct _MMPTE_LEGACY_TRANSITION
-{
-    ULONG Valid:1;
-    ULONG Write:1;
-    ULONG Owner:1;
-    ULONG WriteThrough:1;
-    ULONG CacheDisable:1;
-    ULONG Protection:5;
-    ULONG Prototype:1;
-    ULONG Transition:1;
-    ULONG PageFrameNumber:20;
-} MMPTE_LEGACY_TRANSITION, *PMMPTE_LEGACY_TRANSITION;
-
-/* Legacy Page Table Entry structure definition (without PAE support) */
-typedef union _MMPTE_LEGACY
-{
-    ULONG Long;
-    HARDWARE_LEGACY_PTE Flush;
-    MMPTE_LEGACY_HARDWARE Hardware;
-    MMPTE_LEGACY_PROTOTYPE Prototype;
-    MMPTE_LEGACY_SOFTWARE Software;
-    MMPTE_LEGACY_TRANSITION Transition;
-    MMPTE_LEGACY_SUBSECTION Subsection;
-    MMPTE_LEGACY_LIST List;
-} MMPTE_LEGACY, *PMMPTE_LEGACY;
-
 /* Page Frame Number structure definition */
 typedef struct _MMPFN
 {

sdk/xtdk/i686/xtstruct.h

@@ -13,10 +13,20 @@
 
 
 /* Architecture-specific enumeration lists forward references */
+typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH;
+typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE;
+typedef enum _APIC_MT APIC_MT, *PAPIC_MT;
+typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER;
 typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR;
 typedef enum _CPUID_FEATURES CPUID_FEATURES, *PCPUID_FEATURES;
 typedef enum _CPUID_REQUESTS CPUID_REQUESTS, *PCPUID_REQUESTS;
 typedef enum _PAGE_SIZE PAGE_SIZE, *PPAGE_SIZE;
+typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE PIC_I8259_ICW1_INTERRUPT_MODE, *PPIC_I8259_ICW1_INTERRUPT_MODE;
+typedef enum _PIC_I8259_ICW1_INTERVAL PIC_I8259_ICW1_INTERVAL, *PPIC_I8259_ICW1_INTERVAL;
+typedef enum _PIC_I8259_ICW1_OPERATING_MODE PIC_I8259_ICW1_OPERATING_MODE, *PPIC_I8259_ICW1_OPERATING_MODE;
+typedef enum _PIC_I8259_ICW4_BUFFERED_MODE PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
+typedef enum _PIC_I8259_ICW4_EOI_MODE PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
+typedef enum _PIC_I8259_ICW4_SYSTEM_MODE PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
 
 /* Architecture-specific structures forward references */
 typedef struct _CONTEXT CONTEXT, *PCONTEXT;
@@ -44,12 +54,6 @@ typedef struct _KTRAP_FRAME KTRAP_FRAME, *PKTRAP_FRAME;
 typedef struct _KTSS KTSS, *PKTSS;
 typedef struct _MMPFN MMPFN, *PMMPFN;
 typedef struct _MMPTE_HARDWARE MMPTE_HARDWARE, *PMMPTE_HARDWARE;
-typedef struct _MMPTE_LEGACY_HARDWARE MMPTE_LEGACY_HARDWARE, *PMMPTE_LEGACY_HARDWARE;
-typedef struct _MMPTE_LEGACY_LIST MMPTE_LEGACY_LIST, *PMMPTE_LEGACY_LIST;
-typedef struct _MMPTE_LEGACY_PROTOTYPE MMPTE_LEGACY_PROTOTYPE, *PMMPTE_LEGACY_PROTOTYPE;
-typedef struct _MMPTE_LEGACY_SOFTWARE MMPTE_LEGACY_SOFTWARE, *PMMPTE_LEGACY_SOFTWARE;
-typedef struct _MMPTE_LEGACY_SUBSECTION MMPTE_LEGACY_SUBSECTION, *PMMPTE_LEGACY_SUBSECTION;
-typedef struct _MMPTE_LEGACY_TRANSITION MMPTE_LEGACY_TRANSITION, *PMMPTE_LEGACY_TRANSITION;
 typedef struct _MMPTE_LIST MMPTE_LIST, *PMMPTE_LIST;
 typedef struct _MMPTE_PROTOTYPE MMPTE_PROTOTYPE, *PMMPTE_PROTOTYPE;
 typedef struct _MMPTE_SOFTWARE MMPTE_SOFTWARE, *PMMPTE_SOFTWARE;
@@ -58,9 +62,16 @@ typedef struct _MMPTE_TRANSITION MMPTE_TRANSITION, *PMMPTE_TRANSITION;
 typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
 
 /* Unions forward references */
+typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
+typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
+typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER;
+typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
 typedef union _MMPTE MMPDE, *PMMPDE;
 typedef union _MMPTE MMPTE, *PMMPTE;
-typedef union _MMPTE_LEGACY MMPDE_LEGACY, *PMMPDE_LEGACY;
-typedef union _MMPTE_LEGACY MMPTE_LEGACY, *PMMPTE_LEGACY;
+typedef union _PIC_I8259_ICW1 PIC_I8259_ICW1, *PPIC_I8259_ICW1;
+typedef union _PIC_I8259_ICW2 PIC_I8259_ICW2, *PPIC_I8259_ICW2;
+typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3;
+typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4;
+
 
 #endif /* __XTDK_I686_XTSTRUCT_H */

sdk/xtdk/kefuncs.h

@@ -24,6 +24,11 @@ XTFASTCALL
 VOID
 KeAcquireSpinLock(IN OUT PKSPIN_LOCK SpinLock);
 
+XTAPI
+XTSTATUS
+KeAcquireSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
+                        OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader);
+
 XTAPI
 BOOLEAN
 KeCancelTimer(IN PKTIMER Timer);
@@ -32,6 +37,11 @@ XTFASTCALL
 KRUNLEVEL
 KeGetCurrentRunLevel(VOID);
 
+XTAPI
+XTSTATUS
+KeGetSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
+                    OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader);
+
 XTAPI
 BOOLEAN
 KeGetTimerState(IN PKTIMER Timer);
@@ -101,6 +111,10 @@ XTFASTCALL
 VOID
 KeReleaseSpinLock(IN OUT PKSPIN_LOCK SpinLock);
 
+XTAPI
+VOID
+KeReleaseSystemResource(IN PSYSTEM_RESOURCE_HEADER ResourceHeader);
+
 XTAPI
 VOID
 KeSetTargetProcessorDpc(IN PKDPC Dpc,

sdk/xtdk/ketypes.h

@@ -183,6 +183,14 @@ typedef enum _MODE
     MaximumMode
 } MODE, *PMODE;
 
+/* System resource types */
+typedef enum _SYSTEM_RESOURCE_TYPE
+{
+    SystemResourceInvalid,
+    SystemResourceAcpi,
+    SystemResourceFrameBuffer
+} SYSTEM_RESOURCE_TYPE, *PSYSTEM_RESOURCE_TYPE;
+
 /* Wait type */
 typedef enum _WAIT_TYPE
 {
@@ -190,6 +198,14 @@ typedef enum _WAIT_TYPE
     WaitAny
 } WAIT_TYPE, *PWAIT_TYPE;
 
+/* Kernel UBSAN data types enumeration list */
+typedef enum _KUBSAN_DATA_TYPE
+{
+    DataTypeInt,
+    DataTypeFloat,
+    DataTypeUnknown = 0xFFFF
+} KUBSAN_DATA_TYPE, *PKUBSAN_DATA_TYPE;
+
 /* Kernel routine callbacks */
 typedef EXCEPTION_DISPOSITION (XTCDECL *PEXCEPTION_ROUTINE)(IN PEXCEPTION_RECORD ExceptionRecord, IN PVOID EstablisherFrame, IN OUT PCONTEXT ContextRecord, IN OUT PVOID DispatcherContext);
 typedef VOID (XTAPI *PKDEFERRED_ROUTINE)(IN PKDPC Dpc, IN PVOID DeferredContext, IN PVOID SystemArgument1, IN PVOID SystemArgument2);
@@ -365,25 +381,35 @@ typedef struct _KPROCESS
     LIST_ENTRY ProfileListHead;
     ULONG_PTR DirectoryTable[2];
     USHORT IopmOffset;
+    UCHAR Iopl;
     VOLATILE KAFFINITY ActiveProcessors;
+    ULONG KernelTime;
+    ULONG UserTime;
     LIST_ENTRY ReadyListHead;
+    SINGLE_LIST_ENTRY SwapListEntry;
+    PVOID VdmTrapHandler;
     LIST_ENTRY ThreadListHead;
+    KSPIN_LOCK ProcessLock;
     KAFFINITY Affinity;
     union
     {
         struct
         {
-            LONG AutoAlignment:1;
-            LONG DisableBoost:1;
-            LONG DisableQuantum:1;
+            BOOLEAN AutoAlignment;
+            BOOLEAN DisableBoost;
+            BOOLEAN DisableQuantum;
             LONG ReservedFlags:29;
         };
         LONG ProcessFlags;
     };
+    ULONG_PTR StackCount;
     SCHAR BasePriority;
     SCHAR Quantum;
     UCHAR State;
-    ULONG_PTR StackCount;
+    UCHAR ThreadSeed;
+    UCHAR PowerState;
+    UCHAR IdealNode;
+    UCHAR Spare;
 } KPROCESS, *PKPROCESS;
 
 /* Thread control block structure definition */
@@ -396,7 +422,13 @@ typedef struct _KTHREAD
     PVOID StackBase;
     PVOID StackLimit;
     KSPIN_LOCK ThreadLock;
-    volatile UCHAR State;
+
+    ULONG ContextSwitches;
+    VOLATILE UCHAR State;
+    UCHAR NpxState;
+    KRUNLEVEL WaitRunLevel;
+    KPROCESSOR_MODE WaitMode;
+    PTHREAD_ENVIRONMENT_BLOCK EnvironmentBlock;
     union
     {
         KAPC_STATE ApcState;
@@ -411,13 +443,8 @@ typedef struct _KTHREAD
         };
     };
     KSPIN_LOCK ApcQueueLock;
-    ULONG ContextSwitches;
     LONG_PTR WaitStatus;
-    union
-    {
     PKWAIT_BLOCK WaitBlockList;
-        PKGATE GateObject;
-    };
     BOOLEAN Alertable;
     BOOLEAN WaitNext;
     UCHAR WaitReason;
@@ -431,43 +458,191 @@ typedef struct _KTHREAD
         SINGLE_LIST_ENTRY SwapListEntry;
     };
     PKQUEUE Queue;
-    CHAR PreviousMode;
+    ULONG WaitTime;
+    union
+    {
+        struct
+        {
+            SHORT KernelApcDisable;
             SHORT SpecialApcDisable;
-    PTHREAD_ENVIRONMENT_BLOCK EnvironmentBlock;
-    union
-    {
+        };
+        ULONG CombinedApcDisable;
+    };
     KTIMER Timer;
-        struct
-        {
-            UCHAR TimerFill[KTIMER_LENGTH];
-            union
-            {
-                struct
-                {
-                    LONG AutoAlignment:1;
-                    LONG DisableBoost:1;
-                    LONG ReservedFlags:30;
-                };
-                LONG ThreadFlags;
-            };
-        };
-    };
     KWAIT_BLOCK WaitBlock[KTHREAD_WAIT_BLOCK + 1];
-    UCHAR NpxState;
-    KRUNLEVEL WaitRunLevel;
     LIST_ENTRY QueueListEntry;
-    PKTRAP_FRAME TrapFrame;
-    PVOID CallbackStack;
-    PVOID ServiceTable;
-    ULONG KernelLimit;
     UCHAR ApcStateIndex;
-    BOOLEAN StackResident;
+    BOOLEAN Preempted;
+    BOOLEAN ProcessReadyQueue;
+    BOOLEAN KernelStackResident;
+    CHAR Saturation;
+    UCHAR IdealProcessor;
+    SCHAR BasePriority;
+    UCHAR Spare4;
+    SCHAR PriorityDecrement;
+    SCHAR Quantum;
+    BOOLEAN SystemAffinityActive;
+    CHAR PreviousMode;
+    UCHAR ResourceIndex;
+    UCHAR DisableBoost;
+    KAFFINITY UserAffinity;
     PKPROCESS Process;
     KAFFINITY Affinity;
+    PVOID ServiceTable;
     PKAPC_STATE ApcStatePointer[2];
     KAPC_STATE SavedApcState;
+    PVOID CallbackStack;
+    PVOID SubSystemThread;
+    PKTRAP_FRAME TrapFrame;
+    ULONG KernelTime;
+    ULONG UserTime;
     KAPC SuspendApc;
     KSEMAPHORE SuspendSemaphore;
+    PVOID TlsArray;
+    PVOID LegoData;
+    LIST_ENTRY ThreadListEntry;
+    UCHAR LargeStack;
+    UCHAR PowerState;
+    UCHAR NpxIrql;
+    UCHAR Spare5;
+    BOOLEAN AutoAlignment;
+    UCHAR Iopl;
+    CCHAR FreezeCount;
+    CCHAR SuspendCount;
+    UCHAR Spare0[1];
+    UCHAR UserIdealProcessor;
+    UCHAR Spare2[3];
+    ULONG KernelLimit;
+    BOOLEAN StackResident;
 } KTHREAD, *PKTHREAD;
 
+/* System resource common header structure definition */
+typedef struct _SYSTEM_RESOURCE_HEADER
+{
+    LIST_ENTRY ListEntry;
+    SYSTEM_RESOURCE_TYPE ResourceType;
+    BOOLEAN ResourceLocked;
+    ULONG ResourceSize;
+    PVOID PhysicalAddress;
+    PVOID VirtualAddress;
+} SYSTEM_RESOURCE_HEADER, *PSYSTEM_RESOURCE_HEADER;
+
+/* ACPI system resource structure definition */
+typedef struct _SYSTEM_RESOURCE_ACPI
+{
+    SYSTEM_RESOURCE_HEADER Header;
+    PVOID ApicBase;
+} SYSTEM_RESOURCE_ACPI, *PSYSTEM_RESOURCE_ACPI;
+
+/* FrameBuffer system resource structure definition */
+typedef struct _SYSTEM_RESOURCE_FRAMEBUFFER
+{
+    SYSTEM_RESOURCE_HEADER Header;
+    ULONG_PTR BufferSize;
+    UINT Width;
+    UINT Height;
+    UINT Depth;
+    UINT PixelsPerScanLine;
+    UINT BitsPerPixel;
+    UINT Pitch;
+    PVOID Font;
+    struct
+    {
+        USHORT BlueShift;
+        USHORT BlueSize;
+        USHORT GreenShift;
+        USHORT GreenSize;
+        USHORT RedShift;
+        USHORT RedSize;
+        USHORT ReservedShift;
+        USHORT ReservedSize;
+    } Pixels;
+} SYSTEM_RESOURCE_FRAMEBUFFER, *PSYSTEM_RESOURCE_FRAMEBUFFER;
+
+/* Kernel UBSAN source location structure definition */
+typedef struct _KUBSAN_SOURCE_LOCATION
+{
+    PCCHAR FileName;
+    union
+    {
+        ULONG Reported;
+        struct
+        {
+            UINT Line;
+            UINT Column;
+        };
+    };
+} KUBSAN_SOURCE_LOCATION, *PKUBSAN_SOURCE_LOCATION;
+
+/* Kernel UBSAN type descriptor structure definition */
+typedef struct _KUBSAN_TYPE_DESCRIPTOR
+{
+    USHORT DataType;
+    USHORT TypeInfo;
+    CHAR TypeName[1];
+} KUBSAN_TYPE_DESCRIPTOR, *PKUBSAN_TYPE_DESCRIPTOR;
+
+/* Kernel UBSAN float cast overflow data structure definition */
+typedef struct _KUBSAN_FLOAT_CAST_OVERFLOW_DATA
+{
+    KUBSAN_SOURCE_LOCATION Location;
+    PKUBSAN_TYPE_DESCRIPTOR LhsType;
+    PKUBSAN_TYPE_DESCRIPTOR RhsType;
+} KUBSAN_FLOAT_CAST_OVERFLOW_DATA, *PKUBSAN_FLOAT_CAST_OVERFLOW_DATA;
+
+/* Kernel UBSAN function type mismatch data structure definition */
+typedef struct _KUBSAN_FUNCTION_TYPE_MISMATCH_DATA
+{
+    KUBSAN_SOURCE_LOCATION Location;
+    PKUBSAN_TYPE_DESCRIPTOR Type;
+} KUBSAN_FUNCTION_TYPE_MISMATCH_DATA, *PKUBSAN_FUNCTION_TYPE_MISMATCH_DATA;
+
+/* Kernel UBSAN invalid builtin data structure definition */
+typedef struct _KUBSAN_INVALID_BUILTIN_DATA
+{
+    KUBSAN_SOURCE_LOCATION Location;
+    UCHAR Kind;
+} KUBSAN_INVALID_BUILTIN_DATA, *PKUBSAN_INVALID_BUILTIN_DATA;
+
+/* Kernel UBSAN shift out of bounds data structure definition */
+typedef struct _KUBSAN_SHIFT_OUT_OF_BOUNDS_DATA
+{
+    KUBSAN_SOURCE_LOCATION Location;
+    PKUBSAN_TYPE_DESCRIPTOR LhsType;
+    PKUBSAN_TYPE_DESCRIPTOR RhsType;
+} KUBSAN_SHIFT_OUT_OF_BOUNDS_DATA, *PKUBSAN_SHIFT_OUT_OF_BOUNDS_DATA;
+
+/* Kernel UBSAN out of bounds data structure definition */
+typedef struct _KUBSAN_OUT_OF_BOUNDS_DATA
+{
+    KUBSAN_SOURCE_LOCATION Location;
+    PKUBSAN_TYPE_DESCRIPTOR ArrayType;
+    PKUBSAN_TYPE_DESCRIPTOR IndexType;
+} KUBSAN_OUT_OF_BOUNDS_DATA, *PKUBSAN_OUT_OF_BOUNDS_DATA;
+
+/* Kernel UBSAN overflow data structure definition */
+typedef struct _KUBSAN_OVERFLOW_DATA
+{
+    KUBSAN_SOURCE_LOCATION Location;
+    PKUBSAN_TYPE_DESCRIPTOR Type;
+} KUBSAN_OVERFLOW_DATA, *PKUBSAN_OVERFLOW_DATA;
+
+/* Kernel UBSAN type mismatch data structure definition */
+typedef struct _KUBSAN_TYPE_MISMATCH_DATA
+{
+    KUBSAN_SOURCE_LOCATION Location;
+    PKUBSAN_TYPE_DESCRIPTOR Type;
+    ULONG Alignment;
+    UCHAR TypeCheckKind;
+} KUBSAN_TYPE_MISMATCH_DATA, *PKUBSAN_TYPE_MISMATCH_DATA;
+
+/* Kernel UBSAN type mismatch data structure definition */
+typedef struct _KUBSAN_TYPE_MISMATCH_DATA_V1
+{
+    KUBSAN_SOURCE_LOCATION Location;
+    PKUBSAN_TYPE_DESCRIPTOR Type;
+    UCHAR LogAlignment;
+    UCHAR TypeCheckKind;
+} KUBSAN_TYPE_MISMATCH_DATA_V1, *PKUBSAN_TYPE_MISMATCH_DATA_V1;
+
 #endif /* __XTDK_KEFUNCS_H */

sdk/xtdk/potypes.h

@@ -15,16 +15,77 @@
 
 
 /* Power Manager routine callbacks */
-typedef VOID (XTFASTCALL *PPROCESSOR_IDLE_FUNCTION)(PPROCESSOR_POWER_STATE PowerState);
+typedef VOID (XTFASTCALL *PPROCESSOR_IDLE_FUNCTION)(IN PPROCESSOR_POWER_STATE PowerState);
+typedef XTSTATUS (XTFASTCALL *PSET_PROCESSOR_THROTTLE)(IN UCHAR Throttle);
+
+/* Processor IDLE times structure definition */
+typedef struct _PROCESSOR_IDLE_TIMES
+{
+    ULONGLONG StartTime;
+    ULONGLONG EndTime;
+    ULONG IdleHandlerReserved[4];
+} PROCESSOR_IDLE_TIMES, *PPROCESSOR_IDLE_TIMES;
+
+/* Processor performance state structure definition */
+typedef struct _PROCESSOR_PERF_STATE
+{
+    UCHAR PercentFrequency;
+    UCHAR MinCapacity;
+    USHORT Power;
+    UCHAR IncreaseLevel;
+    UCHAR DecreaseLevel;
+    USHORT Flags;
+    ULONG IncreaseTime;
+    ULONG DecreaseTime;
+    ULONG IncreaseCount;
+    ULONG DecreaseCount;
+    ULONGLONG PerformanceTime;
+} PROCESSOR_PERF_STATE, *PPROCESSOR_PERF_STATE;
 
 /* Processor power state structure definition */
 typedef struct _PROCESSOR_POWER_STATE
 {
     PPROCESSOR_IDLE_FUNCTION IdleFunction;
     ULONG Idle0TimeLimit;
+    ULONG Idle0LastTime;
+    PVOID IdleHandlers;
+    PVOID IdleState;
+    ULONG IdleHandlersCount;
+    ULONGLONG LastCheck;
+    PROCESSOR_IDLE_TIMES IdleTimes;
+    ULONG IdleTime1;
+    ULONG PromotionCheck;
+    ULONG IdleTime2;
     UCHAR CurrentThrottle;
+    UCHAR ThermalThrottleLimit;
+    UCHAR CurrentThrottleIndex;
+    UCHAR ThermalThrottleIndex;
+    ULONG PerfSystemTime;
+    ULONG PerfIdleTime;
+    ULONG LastSysTime;
+    ULONGLONG TotalIdleStateTime[3];
+    ULONG TotalIdleTransitions[3];
+    ULONGLONG PreviousC3StateTime;
+    UCHAR KneeThrottleIndex;
+    UCHAR ThrottleLimitIndex;
+    UCHAR PerfStatesCount;
+    UCHAR ProcessorMinThrottle;
+    UCHAR ProcessorMaxThrottle;
+    UCHAR LastBusyPercentage;
+    UCHAR LastC3Percentage;
+    UCHAR LastAdjustedBusyPercentage;
+    ULONG PromotionCount;
+    ULONG DemotionCount;
+    ULONG ErrorCount;
+    ULONG RetryCount;
+    ULONG Flags;
+    LARGE_INTEGER PerfCounterFrequency;
+    ULONG PerfTickCount;
     KTIMER PerfTimer;
     KDPC PerfDpc;
+    PPROCESSOR_PERF_STATE PerfStates;
+    PSET_PROCESSOR_THROTTLE PerfSetThrottle;
+    ULONG LastC3UserTime;
 } PROCESSOR_POWER_STATE, *PPROCESSOR_POWER_STATE;
 
 #endif /* __XTDK_POTYPES_H */

sdk/xtdk/xtbase.h

@@ -32,6 +32,9 @@ typedef ULONG_PTR KSPIN_LOCK, *PKSPIN_LOCK;
 /* Page Frame Number */
 typedef ULONG_PTR PFN_NUMBER, *PPFN_NUMBER;
 
+/* Physical address */
+typedef LARGE_INTEGER PHYSICAL_ADDRESS, *PPHYSICAL_ADDRESS;
+
 /* 128-bit buffer containing a unique identifier value */
 typedef struct _GUID
 {

sdk/xtdk/xtdebug.h

@@ -11,11 +11,11 @@
 
 
 /* Debugging macros */
-#define CHECKPOINT                      DebugPrint(L"Checkpoint reached at %s:%d\n", __FILE__, __LINE__);
+#define CHECKPOINT                      DebugPrint(L"Checkpoint reached at %s:%d\n", __RELFILE__, __LINE__);
 #define DEPRECATED                      DebugPrint(L"Called deprecated routine '%s()' at %s:%d\n", \
-                                                 __FUNCTION__, __FILE__, __LINE__);
+                                                 __FUNCTION__, __RELFILE__, __LINE__);
 #define UNIMPLEMENTED                   DebugPrint(L"Called unimplemented routine '%s()' at %s:%d\n", \
-                                                 __FUNCTION__, __FILE__, __LINE__);
+                                                 __FUNCTION__, __RELFILE__, __LINE__);
 
 /* XTOS platform debugging macros */
 #ifdef DBG

sdk/xtdk/xtdefs.h

@@ -16,6 +16,7 @@
 #define XTAPI                                  __stdcall
 #define XTCDECL                                __cdecl
 #define XTFASTCALL                             __fastcall
+#define XTVECTORCALL                           __vectorcall
 #define XTINLINE                               __inline
 #define XTASSEMBLY                             __attribute__((naked))
 #define XTINTERRUPT                            __attribute__((interrupt))
@@ -54,32 +55,29 @@
 
 /* Preprocessor macros for defining an additional compiler attributes */
 #define ALIGN(Alignment)                       __attribute__((aligned(Alignment)))
-#define PACK                                   __attribute__((packed))
+#define PACKED                                 __attribute__((packed))
 #define SEGMENT(Segment)                       __attribute__((section(Segment)))
 #define USED                                   __attribute__((__used__))
 
 /* Macro for calculating size of an array */
 #define ARRAY_SIZE(Array)                      (sizeof(Array) / sizeof(*Array))
 
-/* Macro for concatenating two strings */
+/* Macros for concatenating two strings */
 #define CONCAT_STRING(Str1, Str2)              Str1##Str2
 #define CONCATENATE(Str1, Str2)                CONCAT_STRING(Str1, Str2)
 
 /* Macro for accessing the base address of a structure from a structure member */
-#define CONTAIN_RECORD(Address, Type, Field)   ((Type *)(((ULONG_PTR)Address) - (ULONG_PTR)(&(((Type *)0)->Field))))
+#define CONTAIN_RECORD(Address, Type, Field)   ((Type *)((char *)(Address) - FIELD_OFFSET(Type, Field)))
 
 /* EFI size to pages conversion macro */
 #define EFI_SIZE_TO_PAGES(Size)                (((Size) >> EFI_PAGE_SHIFT) + (((Size) & EFI_PAGE_MASK) ? 1 : 0))
 
 /* Macro for calculating byte offset of a field in the structure */
-#define FIELD_OFFSET(Structure, Field)         ((LONG)(LONG_PTR)&(((Structure *)0)->Field))
+#define FIELD_OFFSET(Structure, Field)         __builtin_offsetof(Structure, Field)
 
 /* Macro for calculating size of a field in the structure */
 #define FIELD_SIZE(Structure, Field)           (sizeof(((Structure *)0)->Field))
 
-/* Macro that yields field type in the structure */
-#define FIELD_TYPE(Structure, Field)           (((Structure*)0)->Field)
-
 /* Macro that page-aligns a virtual address */
 #define PAGE_ALIGN(VirtualAddress)             ((PVOID)((ULONG_PTR)VirtualAddress & ~MM_PAGE_MASK))
 
@@ -97,7 +95,8 @@
 #define SIGNATURE32(A, B, C, D)                (SIGNATURE16(A, B) | (SIGNATURE16(C, D) << 16))
 #define SIGNATURE64(A, B, C, D, E, F, G, H)    (SIGNATURE32(A, B, C, D) | ((UINT64)(SIGNATURE32(E, F, G, H)) << 32))
 
-/* XT size to pages conversion macro */
+/* XT size <-> pages conversion macro */
+#define PAGES_TO_SIZE(Pages)                   ((Pages) << MM_PAGE_SHIFT)
 #define SIZE_TO_PAGES(Size)                    (((Size) >> MM_PAGE_SHIFT) + (((Size) & (MM_PAGE_MASK)) ? 1 : 0))
 
 /* Macros for concatenating strings */

sdk/xtdk/xtfw.h

@@ -48,7 +48,7 @@ typedef enum _LOADER_MEMORY_TYPE
     LoaderBBTMemory,
     LoaderReserve,
     LoaderXIPRom,
-    LoaderHALCachedMemory,
+    LoaderHardwareCachedMemory,
     LoaderMaximum
 } LOADER_MEMORY_TYPE, *PLOADER_MEMORY_TYPE;
 
@@ -61,11 +61,6 @@ typedef enum _SYSTEM_FIRMWARE_TYPE
     SystemFirmwarePcat
 } SYSTEM_FIRMWARE_TYPE, *PSYSTEM_FIRMWARE_TYPE;
 
-/* Hardware information block */
-typedef struct _HARDWARE_INFORMATION_BLOCK
-{
-} HARDWARE_INFORMATION_BLOCK, *PHARDWARE_INFORMATION_BLOCK;
-
 /* PCAT Firmware information block */
 typedef struct _PCAT_FIRMWARE_INFORMATION
 {
@@ -90,36 +85,21 @@ typedef struct _FIRMWARE_INFORMATION_BLOCK
     };
 } FIRMWARE_INFORMATION_BLOCK, *PFIRMWARE_INFORMATION_BLOCK;
 
-/* Boot Loader FrameBuffer information block */
-typedef struct _LOADER_GRAPHICS_INFORMATION_BLOCK
-{
-    BOOLEAN Initialized;
-    PVOID Address;
-    ULONG_PTR BufferSize;
-    UINT Width;
-    UINT Height;
-    UINT PixelsPerScanLine;
-    UINT BitsPerPixel;
-    UINT Pitch;
-    PVOID Font;
-} LOADER_GRAPHICS_INFORMATION_BLOCK, *PLOADER_GRAPHICS_INFORMATION_BLOCK;
-
 /* Boot Loader information block */
 typedef struct _LOADER_INFORMATION_BLOCK
 {
     PVOID DbgPrint;
     ULONG PageMapLevel;
-    LOADER_GRAPHICS_INFORMATION_BLOCK FrameBuffer;
 } LOADER_INFORMATION_BLOCK, *PLOADER_INFORMATION_BLOCK;
 
 /* Boot Loader memory mapping information */
-typedef struct _LOADER_MEMORY_MAPPING
+typedef struct _LOADER_MEMORY_DESCRIPTOR
 {
     LIST_ENTRY ListEntry;
     LOADER_MEMORY_TYPE MemoryType;
     ULONG BasePage;
     ULONG PageCount;
-} LOADER_MEMORY_MAPPING, *PLOADER_MEMORY_MAPPING;
+} LOADER_MEMORY_DESCRIPTOR, *PLOADER_MEMORY_DESCRIPTOR;
 
 /* Loader provided information needed by the kernel to initialize */
 typedef struct _KERNEL_INITIALIZATION_BLOCK
@@ -131,7 +111,7 @@ typedef struct _KERNEL_INITIALIZATION_BLOCK
     LIST_ENTRY LoadOrderListHead;
     LIST_ENTRY MemoryDescriptorListHead;
     LIST_ENTRY BootDriverListHead;
-    HARDWARE_INFORMATION_BLOCK HardwareInformation;
+    LIST_ENTRY SystemResourcesListHead;
     LOADER_INFORMATION_BLOCK LoaderInformation;
     FIRMWARE_INFORMATION_BLOCK FirmwareInformation;
 } KERNEL_INITIALIZATION_BLOCK, *PKERNEL_INITIALIZATION_BLOCK;

sdk/xtdk/xtstatus.h

@@ -48,11 +48,21 @@
 
 /* XT status code definitions */
 #define STATUS_SUCCESS                                                     ((XTSTATUS) 0x00000000L)
+#define STATUS_END_OF_MEDIA                                                ((XTSTATUS) 0x8000001EL)
+#define STATUS_RESOURCE_LOCKED                                             ((XTSTATUS) 0xC0000000L)
 #define STATUS_UNSUCCESSFUL                                                ((XTSTATUS) 0xC0000001L)
 #define STATUS_NOT_IMPLEMENTED                                             ((XTSTATUS) 0xC0000002L)
+#define STATUS_ACCESS_VIOLATION                                            ((XTSTATUS) 0xC0000005L)
+#define STATUS_IN_PAGE_ERROR                                               ((XTSTATUS) 0xC0000006L)
+#define STATUS_INVALID_HANDLE                                              ((XTSTATUS) 0xC0000008L)
+#define STATUS_BAD_INITIAL_STACK                                           ((XTSTATUS) 0xC0000009L)
 #define STATUS_INVALID_PARAMETER                                           ((XTSTATUS) 0xC000000DL)
+#define STATUS_END_OF_FILE                                                 ((XTSTATUS) 0xC0000011L)
+#define STATUS_NO_MEMORY                                                   ((XTSTATUS) 0xC0000017L)
+#define STATUS_CRC_ERROR                                                   ((XTSTATUS) 0xC000003FL)
 #define STATUS_INSUFFICIENT_RESOURCES                                      ((XTSTATUS) 0xC000009AL)
 #define STATUS_DEVICE_NOT_READY                                            ((XTSTATUS) 0xC00000A3L)
+#define STATUS_NOT_SUPPORTED                                               ((XTSTATUS) 0xC00000BBL)
 #define STATUS_TIMEOUT                                                     ((XTSTATUS) 0x00000102L)
 #define STATUS_IO_DEVICE_ERROR                                             ((XTSTATUS) 0xC0000185L)
 #define STATUS_NOT_FOUND                                                   ((XTSTATUS) 0xC0000225L)

sdk/xtdk/xtstruct.h

@@ -39,6 +39,7 @@ typedef enum _EFI_TIMER_DELAY EFI_TIMER_DELAY, *PEFI_TIMER_DELAY;
 typedef enum _EFI_UART_PARITY_TYPE EFI_UART_PARITY_TYPE, *PEFI_UART_PARITY_TYPE;
 typedef enum _EFI_UART_STOP_BITS_TYPE EFI_UART_STOP_BITS_TYPE, *PEFI_UART_STOP_BITS_TYPE;
 typedef enum _EFI_UNIVERSA_GRAPHICS_BLT_OPERATION EFI_UNIVERSA_GRAPHICS_BLT_OPERATION, *PEFI_UNIVERSA_GRAPHICS_BLT_OPERATION;
+typedef enum _HAL_APIC_MODE HAL_APIC_MODE, *PHAL_APIC_MODE;
 typedef enum _KAPC_ENVIRONMENT KAPC_ENVIRONMENT, *PKAPC_ENVIRONMENT;
 typedef enum _KDPC_IMPORTANCE KDPC_IMPORTANCE, *PKDPC_IMPORTANCE;
 typedef enum _KEVENT_TYPE KEVENT_TYPE, *PKEVENT_TYPE;
@@ -46,12 +47,24 @@ typedef enum _KOBJECTS KOBJECTS, *PKOBJECTS;
 typedef enum _KPROCESS_STATE KPROCESS_STATE, *PKPROCESS_STATE;
 typedef enum _KTHREAD_STATE KTHREAD_STATE, *PKTHREAD_STATE;
 typedef enum _KTIMER_TYPE KTIMER_TYPE, *PKTIMER_TYPE;
+typedef enum _KUBSAN_DATA_TYPE KUBSAN_DATA_TYPE, *PKUBSAN_DATA_TYPE;
 typedef enum _LOADER_MEMORY_TYPE LOADER_MEMORY_TYPE, *PLOADER_MEMORY_TYPE;
 typedef enum _MODE MODE, *PMODE;
 typedef enum _SYSTEM_FIRMWARE_TYPE SYSTEM_FIRMWARE_TYPE, *PSYSTEM_FIRMWARE_TYPE;
 typedef enum _WAIT_TYPE WAIT_TYPE, *PWAIT_TYPE;
 
 /* Structures forward references */
+typedef struct _ACPI_CACHE_LIST ACPI_CACHE_LIST, *PACPI_CACHE_LIST;
+typedef struct _ACPI_DESCRIPTION_HEADER ACPI_DESCRIPTION_HEADER, *PACPI_DESCRIPTION_HEADER;
+typedef struct _ACPI_FADT ACPI_FADT, *PACPI_FADT;
+typedef struct _ACPI_MADT ACPI_MADT, *PACPI_MADT;
+typedef struct _ACPI_MADT_TABLE_LOCAL_APIC ACPI_MADT_TABLE_LOCAL_APIC, *PACPI_MADT_TABLE_LOCAL_APIC;
+typedef struct _ACPI_RSDP ACPI_RSDP, *PACPI_RSDP;
+typedef struct _ACPI_RSDT ACPI_RSDT, *PACPI_RSDT;
+typedef struct _ACPI_SUBTABLE_HEADER ACPI_SUBTABLE_HEADER, *PACPI_SUBTABLE_HEADER;
+typedef struct _ACPI_SYSTEM_INFO ACPI_SYSTEM_INFO, *PACPI_SYSTEM_INFO;
+typedef struct _ACPI_TIMER_INFO ACPI_TIMER_INFO, *PACPI_TIMER_INFO;
+typedef struct _ACPI_XSDT ACPI_XSDT, *PACPI_XSDT;
 typedef struct _ANSI_STRING ANSI_STRING, *PANSI_STRING;
 typedef struct _ANSI_STRING32 ANSI_STRING32, *PANSI_STRING32;
 typedef struct _ANSI_STRING64 ANSI_STRING64, *PANSI_STRING64;
@@ -218,7 +231,9 @@ typedef struct _EXCEPTION_RECORD EXCEPTION_RECORD, *PEXCEPTION_RECORD;
 typedef struct _EXCEPTION_REGISTRATION_RECORD EXCEPTION_REGISTRATION_RECORD, *PEXCEPTION_REGISTRATION_RECORD;
 typedef struct _FIRMWARE_INFORMATION_BLOCK FIRMWARE_INFORMATION_BLOCK, *PFIRMWARE_INFORMATION_BLOCK;
 typedef struct _FLOAT128 FLOAT128, *PFLOAT128;
+typedef struct _GENERIC_ADDRESS GENERIC_ADDRESS, *PGENERIC_ADDRESS;
 typedef struct _GUID GUID, *PGUID;
+typedef struct _HAL_FRAMEBUFFER_DATA HAL_FRAMEBUFFER_DATA, *PHAL_FRAMEBUFFER_DATA;
 typedef struct _KAPC KAPC, *PKAPC;
 typedef struct _KAPC_STATE KAPC_STATE, *PKAPC_STATE;
 typedef struct _KDPC KDPC, *PKDPC;
@@ -234,6 +249,16 @@ typedef struct _KSERVICE_DESCRIPTOR_TABLE KSERVICE_DESCRIPTOR_TABLE, *PKSERVICE_
 typedef struct _KSPIN_LOCK_QUEUE KSPIN_LOCK_QUEUE, *PKSPIN_LOCK_QUEUE;
 typedef struct _KTHREAD KTHREAD, *PKTHREAD;
 typedef struct _KTIMER KTIMER, *PKTIMER;
+typedef struct _KUBSAN_FLOAT_CAST_OVERFLOW_DATA KUBSAN_FLOAT_CAST_OVERFLOW_DATA, *PKUBSAN_FLOAT_CAST_OVERFLOW_DATA;
+typedef struct _KUBSAN_FUNCTION_TYPE_MISMATCH_DATA KUBSAN_FUNCTION_TYPE_MISMATCH_DATA, *PKUBSAN_FUNCTION_TYPE_MISMATCH_DATA;
+typedef struct _KUBSAN_INVALID_BUILTIN_DATA KUBSAN_INVALID_BUILTIN_DATA, *PKUBSAN_INVALID_BUILTIN_DATA;
+typedef struct _KUBSAN_OUT_OF_BOUNDS_DATA KUBSAN_OUT_OF_BOUNDS_DATA, *PKUBSAN_OUT_OF_BOUNDS_DATA;
+typedef struct _KUBSAN_OVERFLOW_DATA KUBSAN_OVERFLOW_DATA, *PKUBSAN_OVERFLOW_DATA;
+typedef struct _KUBSAN_SHIFT_OUT_OF_BOUNDS_DATA KUBSAN_SHIFT_OUT_OF_BOUNDS_DATA, *PKUBSAN_SHIFT_OUT_OF_BOUNDS_DATA;
+typedef struct _KUBSAN_SOURCE_LOCATION KUBSAN_SOURCE_LOCATION, *PKUBSAN_SOURCE_LOCATION;
+typedef struct _KUBSAN_TYPE_DESCRIPTOR KUBSAN_TYPE_DESCRIPTOR, *PKUBSAN_TYPE_DESCRIPTOR;
+typedef struct _KUBSAN_TYPE_MISMATCH_DATA KUBSAN_TYPE_MISMATCH_DATA, *PKUBSAN_TYPE_MISMATCH_DATA;
+typedef struct _KUBSAN_TYPE_MISMATCH_DATA_V1 KUBSAN_TYPE_MISMATCH_DATA_V1, *PKUBSAN_TYPE_MISMATCH_DATA_V1;
 typedef struct _KWAIT_BLOCK KWAIT_BLOCK, *PKWAIT_BLOCK;
 typedef struct _LDR_DATA_TABLE_ENTRY LDR_DATA_TABLE_ENTRY, *PLDR_DATA_TABLE_ENTRY;
 typedef struct _LIST_ENTRY LIST_ENTRY, *PLIST_ENTRY;
@@ -241,7 +266,7 @@ typedef struct _LIST_ENTRY32 LIST_ENTRY32, *PLIST_ENTRY32;
 typedef struct _LIST_ENTRY64 LIST_ENTRY64, *PLIST_ENTRY64;
 typedef struct _LOADER_GRAPHICS_INFORMATION_BLOCK LOADER_GRAPHICS_INFORMATION_BLOCK, *PLOADER_GRAPHICS_INFORMATION_BLOCK;
 typedef struct _LOADER_INFORMATION_BLOCK LOADER_INFORMATION_BLOCK, *PLOADER_INFORMATION_BLOCK;
-typedef struct _LOADER_MEMORY_MAPPING LOADER_MEMORY_MAPPING, *PLOADER_MEMORY_MAPPING;
+typedef struct _LOADER_MEMORY_DESCRIPTOR LOADER_MEMORY_DESCRIPTOR, *PLOADER_MEMORY_DESCRIPTOR;
 typedef struct _M128 M128, *PM128;
 typedef struct _MMCOLOR_TABLES MMCOLOR_TABLES, *PMMCOLOR_TABLES;
 typedef struct _MMPFNENTRY MMPFNENTRY, *PMMPFNENTRY;
@@ -273,8 +298,11 @@ typedef struct _PECOFF_IMAGE_ROM_HEADER PECOFF_IMAGE_ROM_HEADER, *PPECOFF_IMAGE_
 typedef struct _PECOFF_IMAGE_ROM_OPTIONAL_HEADER PECOFF_IMAGE_ROM_OPTIONAL_HEADER, *PPECOFF_IMAGE_ROM_OPTIONAL_HEADER;
 typedef struct _PECOFF_IMAGE_SECTION_HEADER PECOFF_IMAGE_SECTION_HEADER, *PPECOFF_IMAGE_SECTION_HEADER;
 typedef struct _PECOFF_IMAGE_VXD_HEADER PECOFF_IMAGE_VXD_HEADER, *PPECOFF_IMAGE_VXD_HEADER;
+typedef struct _PROCESSOR_IDENTITY PROCESSOR_IDENTITY, *PPROCESSOR_IDENTITY;
 typedef struct _PROCESSOR_POWER_STATE PROCESSOR_POWER_STATE, *PPROCESSOR_POWER_STATE;
 typedef struct _SINGLE_LIST_ENTRY SINGLE_LIST_ENTRY, *PSINGLE_LIST_ENTRY;
+typedef struct _SMBIOS_TABLE_HEADER SMBIOS_TABLE_HEADER, *PSMBIOS_TABLE_HEADER;
+typedef struct _SMBIOS3_TABLE_HEADER SMBIOS3_TABLE_HEADER, *PSMBIOS3_TABLE_HEADER;
 typedef struct _STRING STRING, *PSTRING;
 typedef struct _STRING32 STRING32, *PSTRING32;
 typedef struct _STRING64 STRING64, *PSTRING64;

xtldr/CMakeLists.txt

@@ -49,6 +49,5 @@ set_install_target(xtldr efi/boot)
 
 # Set loader entrypoint and subsystem
 set_entrypoint(xtldr "BlStartXtLoader")
-set_imagebase(xtldr ${BASEADDRESS_XTLDR})
 set_linker_map(xtldr TRUE)
 set_subsystem(xtldr efi_application)

xtldr/arch/amd64/memory.c

@@ -149,9 +149,9 @@ BlBuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
 XTCDECL
 EFI_STATUS
 BlMapPage(IN PXTBL_PAGE_MAPPING PageMap,
-          IN UINT_PTR VirtualAddress,
-          IN UINT_PTR PhysicalAddress,
-          IN UINT NumberOfPages)
+          IN ULONG_PTR VirtualAddress,
+          IN ULONG_PTR PhysicalAddress,
+          IN ULONG NumberOfPages)
 {
     SIZE_T Pml1Entry, Pml2Entry, Pml3Entry, Pml4Entry, Pml5Entry;
     PHARDWARE_PTE Pml1, Pml2, Pml3, Pml4, Pml5;
@@ -165,11 +165,11 @@ BlMapPage(IN PXTBL_PAGE_MAPPING PageMap,
     while(NumberOfPages > 0)
     {
         /* Calculate the indices in the various Page Tables from the virtual address */
-        Pml5Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 48)) >> 48;
-        Pml4Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 39)) >> 39;
-        Pml3Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 30)) >> 30;
-        Pml2Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 21)) >> 21;
-        Pml1Entry = (VirtualAddress & ((ULONGLONG)0x1FF << 12)) >> 12;
+        Pml5Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_LA57_SHIFT)) >> MM_LA57_SHIFT;
+        Pml4Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_PXI_SHIFT)) >> MM_PXI_SHIFT;
+        Pml3Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_PPI_SHIFT)) >> MM_PPI_SHIFT;
+        Pml2Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_PDI_SHIFT)) >> MM_PDI_SHIFT;
+        Pml1Entry = (VirtualAddress & ((ULONGLONG)0x1FF << MM_PTI_SHIFT)) >> MM_PTI_SHIFT;
 
         /* Check page map level */
         if(PageMap->PageMapLevel == 5)
@@ -262,7 +262,7 @@ BlpSelfMapPml(IN PXTBL_PAGE_MAPPING PageMap,
     else
     {
         /* Calculate PML index based on provided self map address */
-        PmlIndex = (SelfMapAddress >> 39) & 0x1FF;
+        PmlIndex = (SelfMapAddress >> MM_PXI_SHIFT) & 0x1FF;
 
         /* Add self-mapping for PML4 */
         ((PHARDWARE_PTE)PageMap->PtePointer)[PmlIndex].PageFrameNumber = (UINT_PTR)PageMap->PtePointer / EFI_PAGE_SIZE;

xtldr/arch/i686/memory.c

@@ -169,9 +169,9 @@ BlBuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
 XTCDECL
 EFI_STATUS
 BlMapPage(IN PXTBL_PAGE_MAPPING PageMap,
-          IN UINT_PTR VirtualAddress,
-          IN UINT_PTR PhysicalAddress,
-          IN UINT NumberOfPages)
+          IN ULONG_PTR VirtualAddress,
+          IN ULONG_PTR PhysicalAddress,
+          IN ULONG NumberOfPages)
 {
     SIZE_T Pml1Entry, Pml2Entry, Pml3Entry;
     PHARDWARE_PTE Pml1, Pml2, Pml3;
@@ -260,10 +260,10 @@ BlpSelfMapPml(IN PXTBL_PAGE_MAPPING PageMap,
     if(PageMap->PageMapLevel == 3)
     {
         /* Calculate PML index based on provided self map address */
-        PmlIndex = (SelfMapAddress >> 21) & 0x1FF;
+        PmlIndex = (SelfMapAddress >> MM_PDI_SHIFT) & 0x1FF;
 
         /* Get Page Directory */
-        Pml = (PHARDWARE_PTE)(((PHARDWARE_PTE)PageMap->PtePointer)[SelfMapAddress >> 30].PageFrameNumber * EFI_PAGE_SIZE);
+        Pml = (PHARDWARE_PTE)(((PHARDWARE_PTE)PageMap->PtePointer)[SelfMapAddress >> MM_PPI_SHIFT].PageFrameNumber * EFI_PAGE_SIZE);
 
         /* Add self-mapping for PML3 (PAE enabled) */
         for(Index = 0; Index < 4; Index++)
@@ -276,7 +276,7 @@ BlpSelfMapPml(IN PXTBL_PAGE_MAPPING PageMap,
     else
     {
         /* Calculate PML index based on provided self map address */
-        PmlIndex = (SelfMapAddress >> 22);
+        PmlIndex = (SelfMapAddress >> MM_PDI_LEGACY_SHIFT);
 
         /* Add self-mapping for PML2 (PAE disabled) */
         ((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[PmlIndex].PageFrameNumber = (UINT_PTR)PageMap->PtePointer / EFI_PAGE_SIZE;

xtldr/debug.c

@@ -232,18 +232,35 @@ BlpInitializeSerialPort(IN ULONG PortNumber,
     EFI_STATUS EfiStatus;
     XTSTATUS Status;
 
-    /* Print debug message depending on port settings */
-    if(PortAddress)
+    /* Check if custom COM port address supplied */
+    if(!PortAddress)
     {
-        BlConsolePrint(L"Initializing serial console at COM port address: 0x%lX\n", PortAddress);
+        /* We support only a pre-defined number of ports */
+        if(PortNumber > COMPORT_COUNT)
+        {
+            /* Fail if wrong/unsupported port used */
+            return STATUS_INVALID_PARAMETER;
+        }
+
+        /* Check if serial port is set */
+        if(PortNumber == 0)
+        {
+            /* Use COM1 by default */
+            PortNumber = 1;
+        }
+
+        /* Set custom port address based on the port number and print debug message */
+        PortAddress = BlComPortList[PortNumber - 1];
+        BlConsolePrint(L"Initializing serial console at port COM%d\n", PortNumber);
     }
     else
     {
-        BlConsolePrint(L"Initializing serial console at port COM%d\n", PortNumber);
+        /* Custom port address supplied, print debug message */
+        BlConsolePrint(L"Initializing serial console at COM port address: 0x%lX\n", PortAddress);
     }
 
     /* Initialize COM port */
-    Status = HlInitializeComPort(&BlpStatus.SerialPort, PortNumber, UlongToPtr(PortAddress), BaudRate);
+    Status = HlInitializeComPort(&BlpStatus.SerialPort, UlongToPtr(PortAddress), BaudRate);
 
     /* Port not found under supplied address */
     if(Status == STATUS_NOT_FOUND && PortAddress)
@@ -254,7 +271,7 @@ BlpInitializeSerialPort(IN ULONG PortNumber,
         {
             /* Try to reinitialize COM port */
             BlConsolePrint(L"Enabled I/O space access for all PCI(E) serial controllers found\n");
-            Status = HlInitializeComPort(&BlpStatus.SerialPort, PortNumber, UlongToPtr(PortAddress), BaudRate);
+            Status = HlInitializeComPort(&BlpStatus.SerialPort, UlongToPtr(PortAddress), BaudRate);
         }
     }
 

xtldr/globals.c

@@ -12,6 +12,9 @@
 /* XT Boot Loader registered boot protocol list */
 LIST_ENTRY BlpBootProtocols;
 
+/* XT Boot Loader serial ports list */
+ULONG BlComPortList[COMPORT_COUNT] = COMPORT_ADDRESS;
+
 /* XT Boot Loader configuration list */
 LIST_ENTRY BlpConfig;
 

xtldr/includes/globals.h

@@ -15,6 +15,9 @@
 /* XT Boot Loader registered boot protocol list */
 EXTERN LIST_ENTRY BlpBootProtocols;
 
+/* XT Boot Loader serial ports list */
+EXTERN ULONG BlComPortList[COMPORT_COUNT];
+
 /* XT Boot Loader configuration list */
 EXTERN LIST_ENTRY BlpConfig;
 

xtldr/includes/xtldr.h

@@ -18,7 +18,7 @@
 /* XTLDR routines forward references */
 XTCDECL
 EFI_STATUS
-BlAllocateMemoryPages(IN ULONGLONG Pages,
+BlAllocateMemoryPages(IN ULONGLONG NumberOfPages,
                       OUT PEFI_PHYSICAL_ADDRESS Memory);
 
 XTCDECL
@@ -121,7 +121,7 @@ BlFindVolumeDevicePath(IN PEFI_DEVICE_PATH_PROTOCOL FsHandle,
 
 XTCDECL
 EFI_STATUS
-BlFreeMemoryPages(IN ULONGLONG Pages,
+BlFreeMemoryPages(IN ULONGLONG NumberOfPages,
                   IN EFI_PHYSICAL_ADDRESS Memory);
 
 XTCDECL
@@ -249,9 +249,9 @@ BlMapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
 XTCDECL
 EFI_STATUS
 BlMapPage(IN PXTBL_PAGE_MAPPING PageMap,
-          IN UINT_PTR VirtualAddress,
-          IN UINT_PTR PhysicalAddress,
-          IN UINT NumberOfPages);
+          IN ULONG_PTR VirtualAddress,
+          IN ULONG_PTR PhysicalAddress,
+          IN ULONG NumberOfPages);
 
 XTCDECL
 EFI_STATUS
@@ -465,7 +465,7 @@ BlpFindParentBlockDevice(IN PLIST_ENTRY BlockDevices,
                          OUT PEFI_BLOCK_DEVICE_DATA ParentNode);
 
 XTCDECL
-LOADER_MEMORY_TYPE
+LONG
 BlpGetLoaderMemoryType(IN EFI_MEMORY_TYPE EfiMemoryType);
 
 XTCDECL

xtldr/memory.c

@@ -12,7 +12,7 @@
 /**
  * This routine allocates one or more 4KB pages.
  *
- * @param Pages
+ * @param NumberOfPages
  *        The number of contiguous 4KB pages to allocate.
  *
  * @param Memory
@@ -24,10 +24,10 @@
  */
 XTCDECL
 EFI_STATUS
-BlAllocateMemoryPages(IN ULONGLONG Pages,
+BlAllocateMemoryPages(IN ULONGLONG NumberOfPages,
                       OUT PEFI_PHYSICAL_ADDRESS Memory)
 {
-    return EfiSystemTable->BootServices->AllocatePages(AllocateAnyPages, EfiLoaderData, Pages, Memory);
+    return EfiSystemTable->BootServices->AllocatePages(AllocateAnyPages, EfiLoaderData, NumberOfPages, Memory);
 }
 
 /**
@@ -55,7 +55,7 @@ BlAllocateMemoryPool(IN UINT_PTR Size,
 /**
  * This routine frees memory pages.
  *
- * @param Pages
+ * @param NumberOfPages
  *        The number of contiguous 4 KB pages to free.
  *
  * @param Memory
@@ -67,10 +67,10 @@ BlAllocateMemoryPool(IN UINT_PTR Size,
  */
 XTCDECL
 EFI_STATUS
-BlFreeMemoryPages(IN ULONGLONG Pages,
+BlFreeMemoryPages(IN ULONGLONG NumberOfPages,
                   IN EFI_PHYSICAL_ADDRESS Memory)
 {
-    return EfiSystemTable->BootServices->FreePages(Memory, Pages);
+    return EfiSystemTable->BootServices->FreePages(Memory, NumberOfPages);
 }
 
 /**
@@ -292,7 +292,7 @@ BlMapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
     if(GetMemoryTypeRoutine == NULL)
     {
         /* Use default memory type routine */
-        GetMemoryTypeRoutine = (PBL_GET_MEMTYPE_ROUTINE)BlpGetLoaderMemoryType;
+        GetMemoryTypeRoutine = BlpGetLoaderMemoryType;
     }
 
     /* Allocate and zero-fill buffer for EFI memory map */
@@ -454,7 +454,7 @@ BlMapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
     Mapping1->MemoryType = MemoryType;
 
     /* Calculate the end of the physical address */
-    PhysicalAddressEnd = (PUCHAR)PhysicalAddress + (NumberOfPages * EFI_PAGE_SIZE) - 1;
+    PhysicalAddressEnd = (PVOID)((ULONG_PTR)PhysicalAddress + (NumberOfPages * EFI_PAGE_SIZE) - 1);
 
     /* Iterate through all the mappings already set to insert new mapping at the correct place */
     ListEntry = PageMap->MemoryMap.Flink;
@@ -462,7 +462,7 @@ BlMapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
     {
         /* Take a mapping from the list and calculate its end of physical address */
         Mapping2 = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
-        PhysicalAddress2End = (PUCHAR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1 ;
+        PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
 
         /* Check if new mapping is a subset of an existing mapping */
         if(Mapping1->PhysicalAddress >= Mapping2->PhysicalAddress && PhysicalAddressEnd <= PhysicalAddress2End)
@@ -508,7 +508,7 @@ BlMapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
             /* Calculate number of pages and the end of the physical address */
             Mapping2->NumberOfPages = ((PUCHAR)PhysicalAddressEnd + 1 -
                                        (PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE;
-            PhysicalAddress2End = (PUCHAR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1;
+            PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
         }
 
         /* Check if they overlap */
@@ -544,7 +544,7 @@ BlMapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
             /* Calculate number of pages and the end of the physical address */
             Mapping2->NumberOfPages = ((PUCHAR)Mapping1->PhysicalAddress -
                                        (PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE;
-            PhysicalAddress2End = (PUCHAR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1;
+            PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
         }
 
         /* Check if mapping is really needed */
@@ -659,16 +659,6 @@ BlPhysicalListToVirtual(IN PXTBL_PAGE_MAPPING PageMap,
         NextEntry = ListEntry->Flink;
 
         /* Convert the address of this element to VirtualAddress */
-        if(ListEntry->Flink == ListHead)
-        {
-            /* Convert list head */
-            ListEntry->Flink = ListHead->Flink->Blink;
-        }
-        else
-        {
-            /* Convert list entry */
-            ListEntry->Flink = BlPhysicalAddressToVirtual(ListEntry->Flink, (PVOID)PhysicalBase, VirtualBase);
-        }
         if(ListEntry->Blink == ListHead)
         {
             /* Find virtual address of list head */
@@ -679,14 +669,24 @@ BlPhysicalListToVirtual(IN PXTBL_PAGE_MAPPING PageMap,
             /* Convert list entry */
             ListEntry->Blink = BlPhysicalAddressToVirtual(ListEntry->Blink, (PVOID)PhysicalBase, VirtualBase);
         }
+        if(ListEntry->Flink == ListHead)
+        {
+            /* Convert list head */
+            ListEntry->Flink = ListHead->Flink->Blink;
+        }
+        else
+        {
+            /* Convert list entry */
+            ListEntry->Flink = BlPhysicalAddressToVirtual(ListEntry->Flink, (PVOID)PhysicalBase, VirtualBase);
+        }
 
         /* Get to the next element*/
         ListEntry = NextEntry;
     }
 
     /* Convert list head */
-    ListHead->Flink = BlPhysicalAddressToVirtual(ListHead->Flink, (PVOID)PhysicalBase, VirtualBase);
     ListHead->Blink = BlPhysicalAddressToVirtual(ListHead->Blink, (PVOID)PhysicalBase, VirtualBase);
+    ListHead->Flink = BlPhysicalAddressToVirtual(ListHead->Flink, (PVOID)PhysicalBase, VirtualBase);
 
     /* Return success */
     return STATUS_EFI_SUCCESS;
@@ -703,7 +703,7 @@ BlPhysicalListToVirtual(IN PXTBL_PAGE_MAPPING PageMap,
  * @since XT 1.0
  */
 XTCDECL
-LOADER_MEMORY_TYPE
+LONG
 BlpGetLoaderMemoryType(IN EFI_MEMORY_TYPE EfiMemoryType)
 {
     LOADER_MEMORY_TYPE MemoryType;

xtldr/modules/acpi/acpi.c

@@ -51,6 +51,126 @@ AcGetAcpiDescriptionPointer(OUT PVOID *AcpiTable)
     return STATUS_EFI_NOT_FOUND;
 }
 
+/**
+ * Finds ACPI description table with given signature.
+ *
+ * @param Signature
+ *        Supplies the signature of the desired ACPI table.
+ *
+ * @param PreviousTable
+ *        Supplies a pointer to the table to start searching from.
+ *
+ * @param AcpiTable
+ *        Supplies a pointer to memory area where ACPI table address will be stored, or NULL if not found.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+EFI_STATUS
+AcGetAcpiTable(IN CONST UINT Signature,
+               IN PVOID PreviousTable,
+               OUT PVOID *AcpiTable)
+{
+    PACPI_DESCRIPTION_HEADER TableHeader;
+    SIZE_T RsdtIndex, TableIndex;
+    EFI_STATUS Status;
+    SIZE_T TableCount;
+    PACPI_RSDP Rsdp;
+    PACPI_RSDT Rsdt;
+    BOOLEAN Xsdp;
+
+    /* Return NULL address by default if requested table not found */
+    *AcpiTable = NULL;
+
+    /* Get Root System Description Table Pointer */
+    Status = AcGetAcpiDescriptionPointer((PVOID)&Rsdp);
+    if(Status != STATUS_EFI_SUCCESS)
+    {
+        /* ACPI tables not found, return error */
+        return Status;
+    }
+
+    /* Check if it is XSDP (ACPI 2.0) or RSDP (ACPI 1.0) */
+    if(Rsdp->Revision >= 2 && Rsdp->XsdtAddress)
+    {
+        /* XSDP (ACPI 2.0) */
+        Xsdp = TRUE;
+        Rsdt = (PACPI_RSDT)(UINT_PTR)Rsdp->XsdtAddress;
+        TableCount = (Rsdt->Header.Length - sizeof(ACPI_DESCRIPTION_HEADER)) / 8;
+    }
+    else
+    {
+        /* RSDP (ACPI 1.0) */
+        Xsdp = FALSE;
+        Rsdt = (PACPI_RSDT)(UINT_PTR)Rsdp->RsdtAddress;
+        TableCount = (Rsdt->Header.Length - sizeof(ACPI_DESCRIPTION_HEADER)) / 4;
+    }
+
+    /* Iterate over all ACPI tables */
+    for(TableIndex = 0; TableIndex < TableCount; TableIndex++)
+    {
+        /* Get table headers in reverse order */
+        RsdtIndex = TableCount - TableIndex - 1;
+
+        /* Check if XSDP or RSDT is used */
+        if(Xsdp)
+        {
+            /* Get table header from XSDT */
+            TableHeader = (PACPI_DESCRIPTION_HEADER)(ULONG_PTR)((PULONGLONG)Rsdt->Tables)[RsdtIndex];
+        }
+        else
+        {
+            /* Get table header from RSDT */
+            TableHeader = (PACPI_DESCRIPTION_HEADER)(ULONG_PTR)((PULONG)Rsdt->Tables)[RsdtIndex];
+        }
+
+        /* Check if previous table provided */
+        if(PreviousTable != NULL)
+        {
+            /* Check if this is a table previously found */
+            if(TableHeader == (PVOID)PreviousTable)
+            {
+                /* Unset previous table */
+                PreviousTable = NULL;
+            }
+
+            /* Skip to next ACPI table */
+            continue;
+        }
+
+        /* Verify table signature */
+        if((TableHeader->Signature == Signature))
+        {
+            /* Found requested ACPI table */
+            break;
+        }
+    }
+
+    /* Make sure table was found */
+    if(TableHeader->Signature != Signature)
+    {
+        /* ACPI table not found, return error */
+        return STATUS_EFI_NOT_FOUND;
+    }
+
+    /* Don't validate FADT on old, broken firmwares with ACPI 2.0 or older */
+    if(TableHeader->Signature != ACPI_FADT_SIGNATURE || TableHeader->Revision > 2)
+    {
+        /* Validate table checksum */
+        if(!AcpValidateAcpiTable(TableHeader, TableHeader->Length))
+        {
+            /* Checksum mismatch, return error */
+            return STATUS_EFI_CRC_ERROR;
+        }
+    }
+
+    /* Found valid ACPI table, return success */
+    *AcpiTable = TableHeader;
+    return STATUS_EFI_SUCCESS;
+}
+
 /**
  * Gets the Advanced Programmable Interrupt Controller (APIC) base address.
  *
@@ -110,7 +230,7 @@ AcGetRsdpTable(OUT PVOID *AcpiTable)
 
     /* Get RSDP (ACPI 1.0) table from system configuration tables */
     Status = XtLdrProtocol->Util.GetConfigurationTable(&AcpiGuid, &RsdpTable);
-    if(Status != STATUS_EFI_SUCCESS || AcpChecksumTable(RsdpTable, 20) != 0)
+    if(Status != STATUS_EFI_SUCCESS || !AcpValidateAcpiTable(RsdpTable, 20))
     {
         /* RSDP not found or checksum mismatch */
         *AcpiTable = NULL;
@@ -142,7 +262,7 @@ AcGetSMBiosTable(OUT PVOID *SmBiosTable)
 
     /* Get SMBIOS table from system configuration tables */
     Status = XtLdrProtocol->Util.GetConfigurationTable(&SmBiosGuid, (PVOID)&SmBios);
-    if(Status != STATUS_EFI_SUCCESS || AcpChecksumTable(SmBios, SmBios->Length) != 0)
+    if(Status != STATUS_EFI_SUCCESS || !AcpValidateAcpiTable(SmBios, SmBios->Length))
     {
         /* SMBIOS not found or checksum mismatch */
         *SmBiosTable = NULL;
@@ -174,7 +294,7 @@ AcGetSMBios3Table(OUT PVOID *SmBiosTable)
 
     /* Get SMBIOS3 table from system configuration tables */
     Status = XtLdrProtocol->Util.GetConfigurationTable(&SmBios3Guid, (PVOID)&SmBios);
-    if(Status != STATUS_EFI_SUCCESS || AcpChecksumTable(SmBios, SmBios->Length) != 0)
+    if(Status != STATUS_EFI_SUCCESS || !AcpValidateAcpiTable(SmBios, SmBios->Length))
     {
         /* SMBIOS3 not found or checksum mismatch */
         *SmBiosTable = NULL;
@@ -206,7 +326,7 @@ AcGetXsdpTable(OUT PVOID *AcpiTable)
 
     /* Get XSDP (ACPI 2.0) from system configuration tables */
     Status = XtLdrProtocol->Util.GetConfigurationTable(&AcpiGuid, &XsdpTable);
-    if(Status != STATUS_EFI_SUCCESS || AcpChecksumTable(XsdpTable, 36) != 0)
+    if(Status != STATUS_EFI_SUCCESS || !AcpValidateAcpiTable(XsdpTable, 36))
     {
         /* XSDP not found or checksum mismatch */
         *AcpiTable = NULL;
@@ -219,7 +339,7 @@ AcGetXsdpTable(OUT PVOID *AcpiTable)
 }
 
 /**
- * Checksums a given ACPI table.
+ * Validates given ACPI table by calculating its checksum.
  *
  * @param Buffer
  *        Supplies a pointer to the table to checksum.
@@ -227,11 +347,13 @@ AcGetXsdpTable(OUT PVOID *AcpiTable)
  * @param Size
  *        Supplies the size of the table, in bytes.
  *
- * @return This routine returns the calculated checksum.
+ * @return This routine returns TRUE if the table is valid, or FALSE otherwise.
+ *
+ * @since XT 1.0
  */
 XTCDECL
-UCHAR
-AcpChecksumTable(IN PVOID Buffer,
+BOOLEAN
+AcpValidateAcpiTable(IN PVOID Buffer,
                      IN UINT_PTR Size)
 {
     PUCHAR Pointer;
@@ -250,7 +372,7 @@ AcpChecksumTable(IN PVOID Buffer,
     }
 
     /* Return calculated checksum */
-    return Sum;
+    return (Sum == 0) ? TRUE : FALSE;
 }
 
 /**
@@ -284,6 +406,7 @@ XtLdrModuleMain(IN EFI_HANDLE ImageHandle,
 
     /* Set routines available via ACPI protocol */
     AcpAcpiProtocol.GetAcpiDescriptionPointer = AcGetAcpiDescriptionPointer;
+    AcpAcpiProtocol.GetAcpiTable = AcGetAcpiTable;
     AcpAcpiProtocol.GetApicBase = AcGetApicBase;
     AcpAcpiProtocol.GetRsdpTable = AcGetRsdpTable;
     AcpAcpiProtocol.GetSMBiosTable = AcGetSMBiosTable;

xtldr/modules/acpi/includes/acpi.h

@@ -18,6 +18,12 @@ XTCDECL
 EFI_STATUS
 AcGetAcpiDescriptionPointer(OUT PVOID *AcpiTable);
 
+XTCDECL
+EFI_STATUS
+AcGetAcpiTable(IN CONST UINT Signature,
+               IN PVOID PreviousTable,
+               OUT PVOID *AcpiTable);
+
 XTCDECL
 EFI_STATUS
 AcGetApicBase(OUT PVOID *ApicBase);
@@ -39,8 +45,8 @@ EFI_STATUS
 AcGetXsdpTable(OUT PVOID *AcpiTable);
 
 XTCDECL
-UCHAR
-AcpChecksumTable(IN PVOID Buffer,
+BOOLEAN
+AcpValidateAcpiTable(IN PVOID Buffer,
                      IN UINT_PTR Size);
 
 XTCDECL

xtldr/modules/framebuf/framebuf.c

@@ -524,8 +524,8 @@ FbpFindFramebufferAddress(OUT PEFI_PHYSICAL_ADDRESS Address)
  * @param PixelBitMask
  *        Provides a pixel bit mask.
  *
- * @param ColorMask
- *        Supplies a pointer to the memory area where the color mask will be stored.
+ * @param ColorSize
+ *        Supplies a pointer to the memory area where the color size will be stored.
  *
  * @param ColorShift
  *        Supplies a pointer to the memory area where the color shift (position) will be stored.
@@ -537,34 +537,37 @@ FbpFindFramebufferAddress(OUT PEFI_PHYSICAL_ADDRESS Address)
 XTCDECL
 VOID
 FbpGetColorMask(IN UINT PixelBitMask,
-                OUT PUSHORT ColorMask,
+                OUT PUSHORT ColorSize,
                 OUT PUSHORT ColorShift)
 {
-    UINT Index, Mask;
+    UINT Shift, Size;
 
     /* Initialize variables */
-    Index = 0;
-    Mask = 1;
+    Shift = 0;
+    Size = 0;
 
     /* Make sure EfiMask is not zero */
     if(PixelBitMask)
     {
-        while((Index < 32) && ((PixelBitMask & Mask) == 0))
+        /* Get color shift */
+        while((PixelBitMask & 1) == 0)
         {
-            Index++;
-            Mask <<= 1;
+            Shift++;
+            PixelBitMask >>= 1;
+        }
+
+        /* Get color size */
+        while((PixelBitMask & 1) == 1)
+        {
+            Size++;
+            PixelBitMask >>= 1;
+        }
+
     }
 
     /* Set color mask and shift */
-        *ColorShift = Index;
-        *ColorMask = (Mask >> Index);
-    }
-    else
-    {
-        /* Set default color mask and shift */
-        *ColorMask = 0;
-        *ColorShift = 0;
-    }
+    *ColorShift = Shift;
+    *ColorSize = Size;
 }
 
 /**
@@ -672,26 +675,26 @@ FbpGetPixelInformation(IN PEFI_PIXEL_BITMASK PixelsBitMask)
         case PixelBlueGreenRedReserved8BitPerColor:
             /* BGRR, 32 bits per pixel */
             FbpDisplayInfo.ModeInfo.BitsPerPixel = 32;
-            FbpDisplayInfo.ModeInfo.PixelInformation.BlueMask = 0xFF;
             FbpDisplayInfo.ModeInfo.PixelInformation.BlueShift = 0;
-            FbpDisplayInfo.ModeInfo.PixelInformation.GreenMask = 0xFF;
+            FbpDisplayInfo.ModeInfo.PixelInformation.BlueSize = 8;
             FbpDisplayInfo.ModeInfo.PixelInformation.GreenShift = 8;
-            FbpDisplayInfo.ModeInfo.PixelInformation.RedMask = 0xFF;
+            FbpDisplayInfo.ModeInfo.PixelInformation.GreenSize = 8;
             FbpDisplayInfo.ModeInfo.PixelInformation.RedShift = 16;
-            FbpDisplayInfo.ModeInfo.PixelInformation.ReservedMask = 0xFF;
+            FbpDisplayInfo.ModeInfo.PixelInformation.RedSize = 8;
             FbpDisplayInfo.ModeInfo.PixelInformation.ReservedShift = 24;
+            FbpDisplayInfo.ModeInfo.PixelInformation.ReservedSize = 8;
             break;
         case PixelRedGreenBlueReserved8BitPerColor:
             /* RGBR, 32 bits per pixel */
             FbpDisplayInfo.ModeInfo.BitsPerPixel = 32;
-            FbpDisplayInfo.ModeInfo.PixelInformation.BlueMask = 0xFF;
             FbpDisplayInfo.ModeInfo.PixelInformation.BlueShift = 16;
-            FbpDisplayInfo.ModeInfo.PixelInformation.GreenMask = 0xFF;
+            FbpDisplayInfo.ModeInfo.PixelInformation.BlueSize = 8;
             FbpDisplayInfo.ModeInfo.PixelInformation.GreenShift = 8;
-            FbpDisplayInfo.ModeInfo.PixelInformation.RedMask = 0xFF;
+            FbpDisplayInfo.ModeInfo.PixelInformation.GreenSize = 8;
             FbpDisplayInfo.ModeInfo.PixelInformation.RedShift = 0;
-            FbpDisplayInfo.ModeInfo.PixelInformation.ReservedMask = 0xFF;
+            FbpDisplayInfo.ModeInfo.PixelInformation.RedSize = 8;
             FbpDisplayInfo.ModeInfo.PixelInformation.ReservedShift = 24;
+            FbpDisplayInfo.ModeInfo.PixelInformation.ReservedSize = 8;
             break;
         case PixelBitMask:
             /* Assume 32 bits per pixel */
@@ -711,26 +714,26 @@ FbpGetPixelInformation(IN PEFI_PIXEL_BITMASK PixelsBitMask)
             }
 
             /* Set pixel information */
-            FbpGetColorMask(PixelsBitMask->RedMask, &FbpDisplayInfo.ModeInfo.PixelInformation.RedMask,
+            FbpGetColorMask(PixelsBitMask->RedMask, &FbpDisplayInfo.ModeInfo.PixelInformation.RedSize,
                             &FbpDisplayInfo.ModeInfo.PixelInformation.RedShift);
-            FbpGetColorMask(PixelsBitMask->GreenMask, &FbpDisplayInfo.ModeInfo.PixelInformation.GreenMask,
+            FbpGetColorMask(PixelsBitMask->GreenMask, &FbpDisplayInfo.ModeInfo.PixelInformation.GreenSize,
                             &FbpDisplayInfo.ModeInfo.PixelInformation.GreenShift);
-            FbpGetColorMask(PixelsBitMask->BlueMask, &FbpDisplayInfo.ModeInfo.PixelInformation.BlueMask,
+            FbpGetColorMask(PixelsBitMask->BlueMask, &FbpDisplayInfo.ModeInfo.PixelInformation.BlueSize,
                             &FbpDisplayInfo.ModeInfo.PixelInformation.BlueShift);
-            FbpGetColorMask(PixelsBitMask->ReservedMask, &FbpDisplayInfo.ModeInfo.PixelInformation.ReservedMask,
+            FbpGetColorMask(PixelsBitMask->ReservedMask, &FbpDisplayInfo.ModeInfo.PixelInformation.ReservedSize,
                             &FbpDisplayInfo.ModeInfo.PixelInformation.ReservedShift);
             break;
         default:
             /* Unknown pixel format */
             FbpDisplayInfo.ModeInfo.BitsPerPixel = 0;
-            FbpDisplayInfo.ModeInfo.PixelInformation.BlueMask = 0x0;
             FbpDisplayInfo.ModeInfo.PixelInformation.BlueShift = 0;
-            FbpDisplayInfo.ModeInfo.PixelInformation.GreenMask = 0x0;
+            FbpDisplayInfo.ModeInfo.PixelInformation.BlueSize = 0;
             FbpDisplayInfo.ModeInfo.PixelInformation.GreenShift = 0;
-            FbpDisplayInfo.ModeInfo.PixelInformation.RedMask = 0x0;
+            FbpDisplayInfo.ModeInfo.PixelInformation.GreenSize = 0;
             FbpDisplayInfo.ModeInfo.PixelInformation.RedShift = 0;
-            FbpDisplayInfo.ModeInfo.PixelInformation.ReservedMask = 0x0;
+            FbpDisplayInfo.ModeInfo.PixelInformation.RedSize = 0;
             FbpDisplayInfo.ModeInfo.PixelInformation.ReservedShift = 0;
+            FbpDisplayInfo.ModeInfo.PixelInformation.ReservedSize = 0;
             break;
     }
 

xtldr/modules/framebuf/includes/framebuf.h

@@ -45,7 +45,7 @@ FbpFindFramebufferAddress(OUT PEFI_PHYSICAL_ADDRESS Address);
 XTCDECL
 VOID
 FbpGetColorMask(IN UINT EfiMask,
-                OUT PUSHORT ColorMask,
+                OUT PUSHORT ColorSize,
                 OUT PUSHORT ColorShift);
 
 XTCDECL

xtldr/modules/xtos_o/amd64/memory.c

@@ -9,20 +9,123 @@
 #include <xtos.h>
 
 
+/**
+ * Maps the page table for hardware layer addess space.
+ *
+ * @param PageMap
+ *        Supplies a pointer to the page mapping structure.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+EFI_STATUS
+XtpMapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
+{
+    PHARDWARE_PTE PdeBase, PpeBase, PxeBase;
+    EFI_PHYSICAL_ADDRESS Address;
+    XTSTATUS Status;
+
+    /* Check page map level */
+    if(PageMap->PageMapLevel > 4)
+    {
+        /* PML5 (LA57) is not supported yet */
+        return STATUS_EFI_UNSUPPORTED;
+    }
+
+    /* Get PXE (PML4) base address */
+    PxeBase = ((PHARDWARE_PTE)(PageMap->PtePointer));
+
+    /* Check if PXE entry already exists */
+    if(!PxeBase[(MM_HARDWARE_VA_START >> MM_PXI_SHIFT) & 0x1FF].Valid)
+    {
+        /* No valid PXE, allocate memory */
+        Status = XtLdrProtocol->Memory.AllocatePages(1, &Address);
+        if(Status != STATUS_EFI_SUCCESS)
+        {
+            /* Memory allocation failure, return error */
+            return Status;
+        }
+
+        /* Zero fill memory used by PXE */
+        RtlZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
+
+        /* Make PXE valid */
+        PxeBase[(MM_HARDWARE_VA_START >> MM_PXI_SHIFT) & 0x1FF].Valid = 1;
+        PxeBase[(MM_HARDWARE_VA_START >> MM_PXI_SHIFT) & 0x1FF].PageFrameNumber = Address / EFI_PAGE_SIZE;
+        PxeBase[(MM_HARDWARE_VA_START >> MM_PXI_SHIFT) & 0x1FF].Writable = 1;
+
+        /* Set PPE base address */
+        PpeBase = (PHARDWARE_PTE)(UINT_PTR)Address;
+    }
+    else
+    {
+        /* Set PPE base address based on existing PXE */
+        PpeBase = (PHARDWARE_PTE)((PxeBase[(MM_HARDWARE_VA_START >> MM_PXI_SHIFT) & 0x1FF].PageFrameNumber) << EFI_PAGE_SHIFT);
+    }
+
+    /* Check if PPE entry already exists */
+    if(!PpeBase[(MM_HARDWARE_VA_START >> MM_PPI_SHIFT) & 0x1FF].Valid)
+    {
+        /* No valid PPE, allocate memory */
+        Status = XtLdrProtocol->Memory.AllocatePages(1, &Address);
+        if(Status != STATUS_EFI_SUCCESS)
+        {
+            /* Memory allocation failure, return error */
+            return Status;
+        }
+
+        /* Zero fill memory used by PPE */
+        RtlZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
+
+        /* Make PPE valid */
+        PpeBase[(MM_HARDWARE_VA_START >> MM_PPI_SHIFT) & 0x1FF].Valid = 1;
+        PpeBase[(MM_HARDWARE_VA_START >> MM_PPI_SHIFT) & 0x1FF].PageFrameNumber = Address / EFI_PAGE_SIZE;
+        PpeBase[(MM_HARDWARE_VA_START >> MM_PPI_SHIFT) & 0x1FF].Writable = 1;
+
+        /* Set PDE base address */
+        PdeBase = (PHARDWARE_PTE)Address;
+    }
+    else
+    {
+        /* Set PDE base address, based on existing PPE */
+        PdeBase = (PHARDWARE_PTE)((PpeBase[(MM_HARDWARE_VA_START >> MM_PPI_SHIFT) & 0x1FF].PageFrameNumber) << EFI_PAGE_SHIFT);
+    }
+
+    /* Loop through 2 PDE entries */
+    for(UINT Index = 0 ; Index < 2 ; Index++)
+    {
+        /* Check if PDE entry already exists */
+        if(!PdeBase[((MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF) + Index].Valid)
+        {
+            /* No valid PDE, allocate memory */
+            Status = XtLdrProtocol->Memory.AllocatePages(1, &Address);
+            if(Status != STATUS_EFI_SUCCESS)
+            {
+                /* Memory allocation failure, return error */
+                return Status;
+            }
+
+            /* Zero fill memory used by PDE */
+            RtlZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
+
+            /* Make PDE valid */
+            PdeBase[((MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF) + Index].Valid = 1;
+            PdeBase[((MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF) + Index].PageFrameNumber = Address / EFI_PAGE_SIZE;
+            PdeBase[((MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF) + Index].Writable = 1;
+        }
+    }
+
+    /* Return success */
+    return STATUS_EFI_SUCCESS;
+}
+
 /**
  * Builds the actual memory mapping page table and enables paging. This routine exits EFI boot services as well.
  *
- * @param MemoryMappings
- *        Supplies a pointer to linked list containing all memory mappings.
- *
- * @param VirtualAddress
- *        Supplies a pointer to the next valid, free and available virtual address.
- *
- * @param ImageProtocol
- *        A pointer to the EFI loaded image protocol with information about where in memory the loader code was placed.
- *
- * @param PtePointer
- *        Supplies a pointer to memory area containing a Page Table Entries (PTE).
+ * @param PageMap
+ *        Supplies a pointer to the page mapping structure.
  *
  * @return This routine returns a status code.
  *
@@ -43,6 +146,15 @@ XtEnablePaging(IN PXTBL_PAGE_MAPPING PageMap)
         return Status;
     }
 
+    /* Map memory for hardware layer */
+    Status = XtpMapHardwareMemoryPool(PageMap);
+    if(Status != STATUS_EFI_SUCCESS)
+    {
+        /* Failed to map memory for hardware layer */
+        XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status);
+        return Status;
+    }
+
     /* Exit EFI Boot Services */
     XtLdrProtocol->Debug.Print(L"Exiting EFI boot services\n");
     Status = XtLdrProtocol->Util.ExitBootServices();

xtldr/modules/xtos_o/i686/memory.c

@@ -9,20 +9,63 @@
 #include <xtos.h>
 
 
+/**
+ * Maps the page table for hardware layer addess space.
+ *
+ * @param PageMap
+ *        Supplies a pointer to the page mapping structure.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+EFI_STATUS
+XtpMapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
+{
+    EFI_PHYSICAL_ADDRESS Address;
+    PHARDWARE_PTE PdeBase;
+    XTSTATUS Status;
+
+    /* Allocate memory */
+    Status = XtLdrProtocol->Memory.AllocatePages(1, &Address);
+    if(Status != STATUS_EFI_SUCCESS)
+    {
+        /* Memory allocation failure, return error */
+        return Status;
+    }
+
+    /* Zero fill allocated memory */
+    RtlZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
+
+    /* Check page map level */
+    if(PageMap->PageMapLevel == 3)
+    {
+        /* Get PDE base address (PAE enabled) */
+        PdeBase = (PHARDWARE_PTE)(((PHARDWARE_PTE)PageMap->PtePointer)[MM_HARDWARE_VA_START >> MM_PPI_SHIFT].PageFrameNumber << MM_PAGE_SHIFT);
+
+        /* Make PDE valid */
+        PdeBase[(MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF].PageFrameNumber = Address >> MM_PAGE_SHIFT;
+        PdeBase[(MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF].Valid = 1;
+        PdeBase[(MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF].Writable = 1;
+    }
+    else
+    {
+        /* Make PDE valid (PAE disabled) */
+        ((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[MM_HARDWARE_VA_START >> MM_PDI_LEGACY_SHIFT].Valid = 1;
+        ((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[MM_HARDWARE_VA_START >> MM_PDI_LEGACY_SHIFT].PageFrameNumber = Address >> MM_PAGE_SHIFT;
+        ((PHARDWARE_LEGACY_PTE)PageMap->PtePointer)[MM_HARDWARE_VA_START >> MM_PDI_LEGACY_SHIFT].Writable = 1;
+    }
+
+    /* Return success */
+    return STATUS_EFI_SUCCESS;
+}
+
 /**
  * Builds the actual memory mapping page table and enables paging. This routine exits EFI boot services as well.
  *
- * @param MemoryMappings
- *        Supplies a pointer to linked list containing all memory mappings.
- *
- * @param VirtualAddress
- *        Supplies a pointer to the next valid, free and available virtual address.
- *
- * @param ImageProtocol
- *        A pointer to the EFI loaded image protocol with information about where in memory the loader code was placed.
- *
- * @param PtePointer
- *        Supplies a pointer to memory area containing a Page Table Entries (PTE).
+ * @param PageMap
+ *        Supplies a pointer to the page mapping structure.
  *
  * @return This routine returns a status code.
  *
@@ -63,6 +106,15 @@ XtEnablePaging(IN PXTBL_PAGE_MAPPING PageMap)
         return Status;
     }
 
+    /* Map memory for hardware layer */
+    Status = XtpMapHardwareMemoryPool(PageMap);
+    if(Status != STATUS_EFI_SUCCESS)
+    {
+        /* Failed to map memory for hardware layer */
+        XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status);
+        return Status;
+    }
+
     /* Exit EFI Boot Services */
     XtLdrProtocol->Debug.Print(L"Exiting EFI boot services\n");
     Status = XtLdrProtocol->Util.ExitBootServices();

xtldr/modules/xtos_o/includes/xtos.h

@@ -96,6 +96,10 @@ XtpLoadModule(IN PEFI_FILE_HANDLE BootDir,
               IN LOADER_MEMORY_TYPE MemoryType,
               OUT PPECOFF_IMAGE_CONTEXT *ImageContext);
 
+XTCDECL
+EFI_STATUS
+XtpMapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap);
+
 XTCDECL
 EFI_STATUS
 BlXtLdrModuleMain(IN EFI_HANDLE ImageHandle,

xtldr/modules/xtos_o/xtos.c

@@ -37,32 +37,43 @@ XTBL_BOOT_PROTOCOL XtBootProtocol;
  */
 XTCDECL
 VOID
-XtGetDisplayInformation(OUT PLOADER_GRAPHICS_INFORMATION_BLOCK InformationBlock,
+XtGetDisplayInformation(OUT PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource,
                         IN PEFI_PHYSICAL_ADDRESS FrameBufferBase,
                         IN PULONG_PTR FrameBufferSize,
                         IN PXTBL_FRAMEBUFFER_MODE_INFORMATION FrameBufferModeInfo)
 {
-    InformationBlock->Initialized = TRUE;
-    InformationBlock->Address = (PVOID)*FrameBufferBase;
-    InformationBlock->BufferSize = *FrameBufferSize;
-    InformationBlock->Width = FrameBufferModeInfo->Width;
-    InformationBlock->Height = FrameBufferModeInfo->Height;
-    InformationBlock->BitsPerPixel = FrameBufferModeInfo->BitsPerPixel;
-    InformationBlock->PixelsPerScanLine = FrameBufferModeInfo->PixelsPerScanLine;
-    InformationBlock->Pitch = FrameBufferModeInfo->Pitch;
+    /* Fill in frame buffer resource */
+    FrameBufferResource->Header.PhysicalAddress = (PVOID)*FrameBufferBase;
+    FrameBufferResource->Header.ResourceType = SystemResourceFrameBuffer;
+    FrameBufferResource->Header.ResourceSize = sizeof(SYSTEM_RESOURCE_FRAMEBUFFER);
+    FrameBufferResource->BufferSize = *FrameBufferSize;
+    FrameBufferResource->Width = FrameBufferModeInfo->Width;
+    FrameBufferResource->Height = FrameBufferModeInfo->Height;
+    FrameBufferResource->Depth = FrameBufferModeInfo->Depth;
+    FrameBufferResource->BitsPerPixel = FrameBufferModeInfo->BitsPerPixel;
+    FrameBufferResource->PixelsPerScanLine = FrameBufferModeInfo->PixelsPerScanLine;
+    FrameBufferResource->Pitch = FrameBufferModeInfo->Pitch;
+    FrameBufferResource->Pixels.BlueShift = FrameBufferModeInfo->PixelInformation.BlueShift;
+    FrameBufferResource->Pixels.BlueSize = FrameBufferModeInfo->PixelInformation.BlueSize;
+    FrameBufferResource->Pixels.GreenShift = FrameBufferModeInfo->PixelInformation.GreenShift;
+    FrameBufferResource->Pixels.GreenSize = FrameBufferModeInfo->PixelInformation.GreenSize;
+    FrameBufferResource->Pixels.RedShift = FrameBufferModeInfo->PixelInformation.RedShift;
+    FrameBufferResource->Pixels.RedSize = FrameBufferModeInfo->PixelInformation.RedSize;
+    FrameBufferResource->Pixels.ReservedShift = FrameBufferModeInfo->PixelInformation.ReservedShift;
+    FrameBufferResource->Pixels.ReservedSize = FrameBufferModeInfo->PixelInformation.ReservedSize;
 }
 
 XTCDECL
 EFI_STATUS
 XtGetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
-                          IN PVOID VirtualAddress,
+                          IN PVOID *VirtualAddress,
                           OUT PLIST_ENTRY MemoryDescriptorList)
 {
     EFI_PHYSICAL_ADDRESS Address;
     EFI_STATUS Status;
     ULONGLONG Pages;
 
-    Pages = (ULONGLONG)EFI_SIZE_TO_PAGES((PageMap->MapSize + 1) * sizeof(LOADER_MEMORY_MAPPING));
+    Pages = (ULONGLONG)EFI_SIZE_TO_PAGES((PageMap->MapSize + 1) * sizeof(LOADER_MEMORY_DESCRIPTOR));
 
     Status = XtLdrProtocol->Memory.AllocatePages(Pages, &Address);
     if(Status != STATUS_EFI_SUCCESS)
@@ -70,7 +81,7 @@ XtGetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
         return Status;
     }
 
-    Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, VirtualAddress, (PVOID)Address, Pages, LoaderMemoryData);
+    Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)Address, Pages, LoaderMemoryData);
     if(Status != STATUS_EFI_SUCCESS)
     {
         XtLdrProtocol->Memory.FreePages(Address, Pages);
@@ -84,7 +95,7 @@ XtGetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
     while(ListEntry != &PageMap->MemoryMap)
     {
         PXTBL_MEMORY_MAPPING MemoryMapping = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
-        PLOADER_MEMORY_MAPPING MemoryDescriptor = (PLOADER_MEMORY_MAPPING)Address;
+        PLOADER_MEMORY_DESCRIPTOR MemoryDescriptor = (PLOADER_MEMORY_DESCRIPTOR)Address;
 
         MemoryDescriptor->MemoryType = MemoryMapping->MemoryType;
         MemoryDescriptor->BasePage = (UINT_PTR)MemoryMapping->PhysicalAddress / EFI_PAGE_SIZE;
@@ -92,11 +103,126 @@ XtGetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
 
         RtlInsertTailList(MemoryDescriptorList, &MemoryDescriptor->ListEntry);
 
-        Address = Address + sizeof(LOADER_MEMORY_MAPPING);
+        Address = Address + sizeof(LOADER_MEMORY_DESCRIPTOR);
         ListEntry = ListEntry->Flink;
     }
 
-    XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, MemoryDescriptorList, PhysicalBase, VirtualAddress);
+    XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, MemoryDescriptorList, PhysicalBase, *VirtualAddress);
+
+    return STATUS_EFI_SUCCESS;
+}
+
+XTCDECL
+EFI_STATUS
+XtGetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
+                         IN PVOID *VirtualAddress,
+                         OUT PLIST_ENTRY SystemResourcesList)
+{
+    XTSTATUS Status;
+    EFI_HANDLE ProtocolHandle;
+    EFI_GUID AcpiGuid = XT_ACPI_PROTOCOL_GUID;
+    EFI_GUID FrameBufGuid = XT_FRAMEBUFFER_PROTOCOL_GUID;
+    PXTBL_ACPI_PROTOCOL AcpiProtocol;
+    PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
+    XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo;
+    EFI_PHYSICAL_ADDRESS FbAddress;
+    ULONG_PTR FbSize;
+    UINT FrameBufferPages;
+    PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource;
+    PSYSTEM_RESOURCE_ACPI AcpiResource;
+    ULONGLONG Pages;
+    EFI_PHYSICAL_ADDRESS Address;
+    PVOID PhysicalBase, VirtualBase;
+
+    Pages = (ULONGLONG)EFI_SIZE_TO_PAGES(sizeof(SYSTEM_RESOURCE_ACPI) + sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
+
+    Status = XtLdrProtocol->Memory.AllocatePages(Pages, &Address);
+    if(Status != STATUS_EFI_SUCCESS)
+    {
+        return Status;
+    }
+    Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)Address, Pages, LoaderFirmwarePermanent);
+    if(Status != STATUS_EFI_SUCCESS)
+    {
+        XtLdrProtocol->Memory.FreePages(Address, Pages);
+        return Status;
+    }
+
+    PhysicalBase = (PVOID)Address;
+    VirtualBase = *VirtualAddress;
+
+    /* Calculate next valid virtual address */
+    *VirtualAddress += (UINT_PTR)(Pages * EFI_PAGE_SIZE);
+
+    AcpiResource = (PSYSTEM_RESOURCE_ACPI)Address;
+
+    RtlZeroMemory(AcpiResource, sizeof(SYSTEM_RESOURCE_ACPI));
+
+    /* Load FrameBuffer protocol */
+    Status = XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&AcpiProtocol, &AcpiGuid);
+    if(Status != STATUS_EFI_SUCCESS)
+    {
+        return Status;
+    }
+
+    AcpiResource->Header.ResourceType = SystemResourceAcpi;
+    AcpiResource->Header.ResourceSize = sizeof(SYSTEM_RESOURCE_ACPI);
+
+    /* Get APIC and XSDP/RSDP addresses */
+    AcpiProtocol->GetApicBase(&AcpiResource->ApicBase);
+    AcpiProtocol->GetAcpiDescriptionPointer(&AcpiResource->Header.PhysicalAddress);
+
+    /* No need to map ACPI */
+    AcpiResource->Header.VirtualAddress = 0;
+
+    RtlInsertTailList(SystemResourcesList, &AcpiResource->Header.ListEntry);
+
+    /* Close FrameBuffer protocol */
+    XtLdrProtocol->Protocol.Close(ProtocolHandle, &FrameBufGuid);
+
+    Address = Address + sizeof(SYSTEM_RESOURCE_ACPI);
+
+    FrameBufferResource = (PSYSTEM_RESOURCE_FRAMEBUFFER)Address;
+
+    RtlZeroMemory(FrameBufferResource, sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
+
+    /* Load FrameBuffer protocol */
+    Status = XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&FrameBufProtocol, &FrameBufGuid);
+    if(Status == STATUS_EFI_SUCCESS)
+    {
+        /* Get FrameBuffer information */
+        Status = FrameBufProtocol->GetDisplayInformation(&FbAddress, &FbSize, &FbModeInfo);
+        if(Status == STATUS_EFI_SUCCESS)
+        {
+
+            /* Store information about FrameBuffer device */
+            XtGetDisplayInformation(FrameBufferResource, &FbAddress, &FbSize, &FbModeInfo);
+        }
+    }
+    if(Status != STATUS_EFI_SUCCESS)
+    {
+        return Status;
+    }
+
+    /* Calculate pages needed to map framebuffer */
+    FrameBufferPages = EFI_SIZE_TO_PAGES(FbSize);
+
+    /* Rewrite framebuffer address by using virtual address */
+    FrameBufferResource->Header.VirtualAddress = *VirtualAddress;
+
+    /* Map frame buffer memory */
+    XtLdrProtocol->Memory.MapVirtualMemory(PageMap, FrameBufferResource->Header.VirtualAddress,
+                                           FrameBufferResource->Header.PhysicalAddress,
+                                           FrameBufferPages, LoaderFirmwarePermanent);
+
+    /* Close FrameBuffer protocol */
+    XtLdrProtocol->Protocol.Close(ProtocolHandle, &FrameBufGuid);
+
+    *VirtualAddress += (UINT_PTR)(FrameBufferPages * EFI_PAGE_SIZE);
+
+    RtlInsertTailList(SystemResourcesList, &FrameBufferResource->Header.ListEntry);
+
+    XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, SystemResourcesList, PhysicalBase, VirtualBase);
 
     return STATUS_EFI_SUCCESS;
 }
@@ -416,16 +542,11 @@ XtpInitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
                          IN PVOID *VirtualAddress,
                          IN PXTBL_BOOT_PARAMETERS Parameters)
 {
-    EFI_GUID FrameBufGuid = XT_FRAMEBUFFER_PROTOCOL_GUID;
-    PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
-    XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo;
     PKERNEL_INITIALIZATION_BLOCK LoaderBlock;
-    EFI_PHYSICAL_ADDRESS Address, FbAddress;
+    EFI_PHYSICAL_ADDRESS Address;
     // PVOID RuntimeServices;
-    ULONG_PTR FbSize;
     EFI_STATUS Status;
-    EFI_HANDLE ProtocolHandle;
-    UINT BlockPages, FrameBufferPages;
+    UINT BlockPages;
 
     /* Calculate number of pages needed for initialization block */
     BlockPages = EFI_SIZE_TO_PAGES(sizeof(KERNEL_INITIALIZATION_BLOCK));
@@ -450,30 +571,9 @@ XtpInitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
     /* Set LoaderInformation block properties */
     LoaderBlock->LoaderInformation.DbgPrint = XtLdrProtocol->Debug.Print;
 
-    /* Load FrameBuffer protocol */
-    Status = XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&FrameBufProtocol, &FrameBufGuid);
-    if(Status == STATUS_EFI_SUCCESS)
-    {
-        /* Get FrameBuffer information */
-        Status = FrameBufProtocol->GetDisplayInformation(&FbAddress, &FbSize, &FbModeInfo);
-        if(Status == STATUS_EFI_SUCCESS)
-        {
-            /* Store information about FrameBuffer device */
-            XtGetDisplayInformation(&LoaderBlock->LoaderInformation.FrameBuffer, &FbAddress, &FbSize, &FbModeInfo);
-        }
-    }
-    if(Status != STATUS_EFI_SUCCESS)
-    {
-        /* No FrameBuffer available */
-        LoaderBlock->LoaderInformation.FrameBuffer.Initialized = FALSE;
-    }
-
     /* Store page map level */
     LoaderBlock->LoaderInformation.PageMapLevel = 3;
 
-    /* Close FrameBuffer protocol */
-    XtLdrProtocol->Protocol.Close(ProtocolHandle, &FrameBufGuid);
-
     /* Attempt to find virtual address of the EFI Runtime Services */
     // Status = XtLdrProtocol->GetVirtualAddress(MemoryMappings, &EfiSystemTable->RuntimeServices->Hdr, &RuntimeServices);
     // if(Status == STATUS_EFI_SUCCESS)
@@ -500,27 +600,12 @@ XtpInitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
     /* Calculate next valid virtual address */
     *VirtualAddress += (UINT_PTR)(BlockPages * EFI_PAGE_SIZE);
 
-    /* Check if framebuffer initialized */
-    if(LoaderBlock->LoaderInformation.FrameBuffer.Initialized)
-    {
-        /* Calculate pages needed to map framebuffer */
-        FrameBufferPages = EFI_SIZE_TO_PAGES(LoaderBlock->LoaderInformation.FrameBuffer.BufferSize);
-
-        /* Map frame buffer memory */
-        XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress,
-                                               LoaderBlock->LoaderInformation.FrameBuffer.Address,
-                                               FrameBufferPages, LoaderFirmwarePermanent);
-
-        /* Rewrite framebuffer address by using virtual address */
-        LoaderBlock->LoaderInformation.FrameBuffer.Address = *VirtualAddress;
-
-        /* Calcualate next valid virtual address */
-        *VirtualAddress += (UINT_PTR)(FrameBufferPages * EFI_PAGE_SIZE);
-    }
+    RtlInitializeListHead(&LoaderBlock->SystemResourcesListHead);
+    XtGetSystemResourcesList(PageMap, VirtualAddress, &LoaderBlock->SystemResourcesListHead);
 
     /* Initialize memory descriptor list */
     RtlInitializeListHead(&LoaderBlock->MemoryDescriptorListHead);
-    XtGetMemoryDescriptorList(PageMap, *VirtualAddress, &LoaderBlock->MemoryDescriptorListHead);
+    XtGetMemoryDescriptorList(PageMap, VirtualAddress, &LoaderBlock->MemoryDescriptorListHead);
 
     /* Return success */
     return STATUS_EFI_SUCCESS;

xtoskrnl/CMakeLists.txt

@@ -1,4 +1,5 @@
-# XT Kernel
+# XT Kernel and library
+PROJECT(LIBXTOS)
 PROJECT(XTOSKRNL)
 
 # Specify include directories
@@ -6,7 +7,20 @@ include_directories(
     ${EXECTOS_SOURCE_DIR}/sdk/xtdk
     ${XTOSKRNL_SOURCE_DIR}/includes)
 
-# Specify list of source code files
+# Specify list of library source code files
+list(APPEND LIBXTOS_SOURCE
+    ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.c
+    ${XTOSKRNL_SOURCE_DIR}/hl/cport.c
+    ${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.c
+    ${XTOSKRNL_SOURCE_DIR}/rtl/globals.c
+    ${XTOSKRNL_SOURCE_DIR}/rtl/guid.c
+    ${XTOSKRNL_SOURCE_DIR}/rtl/math.c
+    ${XTOSKRNL_SOURCE_DIR}/rtl/memory.c
+    ${XTOSKRNL_SOURCE_DIR}/rtl/plist.c
+    ${XTOSKRNL_SOURCE_DIR}/rtl/string.c
+    ${XTOSKRNL_SOURCE_DIR}/rtl/widestr.c)
+
+# Specify list of kernel source code files
 list(APPEND XTOSKRNL_SOURCE
     ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/archsup.S
     ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.c
@@ -14,9 +28,11 @@ list(APPEND XTOSKRNL_SOURCE
     ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/procsup.c
     ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/traps.c
     ${XTOSKRNL_SOURCE_DIR}/ex/rundown.c
+    ${XTOSKRNL_SOURCE_DIR}/hl/acpi.c
     ${XTOSKRNL_SOURCE_DIR}/hl/cport.c
-    ${XTOSKRNL_SOURCE_DIR}/hl/efifb.c
+    ${XTOSKRNL_SOURCE_DIR}/hl/fbdev.c
     ${XTOSKRNL_SOURCE_DIR}/hl/globals.c
+    ${XTOSKRNL_SOURCE_DIR}/hl/init.c
     ${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/cpu.c
     ${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/pic.c
     ${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.c
@@ -28,18 +44,22 @@ list(APPEND XTOSKRNL_SOURCE
     ${XTOSKRNL_SOURCE_DIR}/ke/kprocess.c
     ${XTOSKRNL_SOURCE_DIR}/ke/krnlinit.c
     ${XTOSKRNL_SOURCE_DIR}/ke/kthread.c
+    ${XTOSKRNL_SOURCE_DIR}/ke/kubsan.c
     ${XTOSKRNL_SOURCE_DIR}/ke/panic.c
     ${XTOSKRNL_SOURCE_DIR}/ke/runlevel.c
     ${XTOSKRNL_SOURCE_DIR}/ke/semphore.c
     ${XTOSKRNL_SOURCE_DIR}/ke/spinlock.c
+    ${XTOSKRNL_SOURCE_DIR}/ke/sysres.c
     ${XTOSKRNL_SOURCE_DIR}/ke/timer.c
     ${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/irqs.c
     ${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.c
     ${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.c
     ${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.c
     ${XTOSKRNL_SOURCE_DIR}/mm/globals.c
+    ${XTOSKRNL_SOURCE_DIR}/mm/hlpool.c
     ${XTOSKRNL_SOURCE_DIR}/mm/init.c
     ${XTOSKRNL_SOURCE_DIR}/mm/kpools.c
+    ${XTOSKRNL_SOURCE_DIR}/mm/pages.c
     ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/init.c
     ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pages.c
     ${XTOSKRNL_SOURCE_DIR}/po/idle.c
@@ -61,7 +81,7 @@ list(APPEND XTOSKRNL_SOURCE
 set_specfile(xtoskrnl.spec xtoskrnl.exe)
 
 # Link static XTOS library
-add_library(libxtos ${XTOSKRNL_SOURCE})
+add_library(libxtos ${LIBXTOS_SOURCE})
 
 # Link kernel executable
 add_executable(xtoskrnl

xtoskrnl/README.md

@@ -9,7 +9,7 @@ This is a list of them:
 
  * Ar - Architecture library
  * Ex - Kernel Executive
- * Hl - Hardware Abstraction Layer (HAL)
+ * Hl - Hardware Layer
  * Ke - Core kernel library
  * Mm - Memory manager
  * Po - Plug&Play and Power Manager
@@ -26,10 +26,10 @@ The kernel executive supplies heap management, including support for allocating
 pools, as well as synchronization primitives like push locks and fast mutexes, interlocked memory access, and worker
 threads.
 
-### HL: Hardware Abstraction Layer
-Hardware Abstraction Layer (HAL), is a layer between the physical hardware of the computer and the rest of the operating
-system. It was designed to hide differences in hardware and therefore it provides a consistent platform on which
-the system and applications may run.
+### HL: Hardware Layer
+Hardware Layer, is a layer between the physical hardware of the computer and the rest of the operating system. It was
+designed to hide differences in hardware and therefore it provides a consistent platform on which the system and
+applications may run.
 
 ### KE: Kernel Library
 The kernel implements its core functionality that everything else in the system depends upon. This includes basic

xtoskrnl/ar/amd64/cpufunc.c

@@ -82,6 +82,30 @@ ArFlushTlb(VOID)
     ArWriteControlRegister(3, ArReadControlRegister(3));
 }
 
+/**
+ * Gets the RFLAGS register.
+ *
+ * @return This routine returns the RFLAGS register.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+ULONG
+ArGetCpuFlags(VOID)
+{
+    ULONG_PTR Flags;
+
+    /* Get RFLAGS register */
+    asm volatile("pushf\n"
+                 "pop %0\n"
+                 : "=rm" (Flags)
+                 :
+                 : "memory");
+
+    /* Return flags */
+    return Flags;
+}
+
 /**
  * Gets the address of the current stack register.
  *
@@ -116,6 +140,26 @@ ArHalt(VOID)
     asm volatile("hlt");
 }
 
+/**
+ * Checks whether interrupts are enabled or not.
+ *
+ * @return This routine returns TRUE if interrupts are enabled, or FALSE otherwise.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+BOOLEAN
+ArInterruptsEnabled(VOID)
+{
+    ULONG_PTR Flags;
+
+    /* Get RFLAGS register */
+    Flags = ArGetCpuFlags();
+
+    /* Check if interrupts are enabled and return result */
+    return (Flags & X86_EFLAGS_IF_MASK) ? TRUE : FALSE;
+}
+
 /**
  * Invalidates the TLB (Translation Lookaside Buffer) for specified virtual address.
  *

xtoskrnl/ar/amd64/procsup.c

@@ -18,31 +18,43 @@
  */
 XTAPI
 VOID
-ArInitializeProcessor(VOID)
+ArInitializeProcessor(IN PVOID ProcessorStructures)
 {
     KDESCRIPTOR GdtDescriptor, IdtDescriptor;
+    PVOID KernelBootStack, KernelFaultStack;
     PKPROCESSOR_BLOCK ProcessorBlock;
-    PVOID KernelFaultStack;
     PKGDTENTRY Gdt;
     PKIDTENTRY Idt;
     PKTSS Tss;
 
+    /* Check if processor structures buffer provided */
+    if(ProcessorStructures)
+    {
+        /* Assign CPU structures from provided buffer */
+        ArpInitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
+                                         &KernelBootStack, &KernelFaultStack);
+
+        /* Use global IDT */
+        Idt = ArInitialIdt;
+    }
+    else
+    {
         /* Use initial structures */
         Gdt = ArInitialGdt;
         Idt = ArInitialIdt;
         Tss = &ArInitialTss;
+        KernelBootStack = &ArKernelBootStack;
         KernelFaultStack = &ArKernelFaultStack;
-
-    /* Load processor block */
-    ProcessorBlock = CONTAIN_RECORD(&ArInitialProcessorBlock.Prcb, KPROCESSOR_BLOCK, Prcb);
+        ProcessorBlock = &ArInitialProcessorBlock;
+    }
 
     /* Initialize processor block */
     ArpInitializeProcessorBlock(ProcessorBlock, Gdt, Idt, Tss, KernelFaultStack);
 
     /* Initialize GDT, IDT and TSS */
     ArpInitializeGdt(ProcessorBlock);
-    ArpInitializeTss(ProcessorBlock);
     ArpInitializeIdt(ProcessorBlock);
+    ArpInitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
 
     /* Set GDT and IDT descriptors */
     GdtDescriptor.Base = Gdt;
@@ -135,9 +147,9 @@ ArpIdentifyProcessor(VOID)
 
     /* Store CPU vendor in processor control block */
     Prcb->CpuId.Vendor = CpuRegisters.Ebx;
-    Prcb->CpuId.VendorName[0] = CpuRegisters.Ebx;
-    Prcb->CpuId.VendorName[4] = CpuRegisters.Edx;
-    Prcb->CpuId.VendorName[8] = CpuRegisters.Ecx;
+    *(PULONG)&Prcb->CpuId.VendorName[0] = CpuRegisters.Ebx;
+    *(PULONG)&Prcb->CpuId.VendorName[4] = CpuRegisters.Edx;
+    *(PULONG)&Prcb->CpuId.VendorName[8] = CpuRegisters.Ecx;
     Prcb->CpuId.VendorName[12] = '\0';
 
     /* Get CPU features */
@@ -155,9 +167,9 @@ ArpIdentifyProcessor(VOID)
     if(Prcb->CpuId.Vendor == CPU_VENDOR_AMD)
     {
         /* AMD CPU */
-        Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
-        if(Prcb->CpuId.Model == 0xF)
+        if(Prcb->CpuId.Family >= 0xF)
         {
+            Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
             Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
         }
     }
@@ -169,7 +181,7 @@ ArpIdentifyProcessor(VOID)
             Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
         }
 
-        if((Prcb->CpuId.Family == 0xF) || (Prcb->CpuId.Family == 0x6))
+        if((Prcb->CpuId.Family == 0x6) || (Prcb->CpuId.Family == 0xF))
         {
             Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
         }
@@ -287,9 +299,6 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
                             IN PKTSS Tss,
                             IN PVOID DpcStack)
 {
-    /* Fill processor block with zeroes */
-    RtlZeroMemory(ProcessorBlock, sizeof(KPROCESSOR_BLOCK));
-
     /* Set processor block and processor control block */
     ProcessorBlock->Self = ProcessorBlock;
     ProcessorBlock->CurrentPrcb = &ProcessorBlock->Prcb;
@@ -304,9 +313,9 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
     ProcessorBlock->Prcb.DpcStack = DpcStack;
 
     /* Setup processor control block */
-    ProcessorBlock->Prcb.Number = 0;
-    ProcessorBlock->Prcb.SetMember = 1ULL;
-    ProcessorBlock->Prcb.MultiThreadProcessorSet = 1ULL;
+    ProcessorBlock->Prcb.CpuNumber = ProcessorBlock->CpuNumber;
+    ProcessorBlock->Prcb.SetMember = 1ULL << ProcessorBlock->CpuNumber;
+    ProcessorBlock->Prcb.MultiThreadProcessorSet = 1ULL << ProcessorBlock->CpuNumber;
 
     /* Clear DR6 and DR7 registers */
     ProcessorBlock->Prcb.ProcessorState.SpecialRegisters.KernelDr6 = 0;
@@ -386,6 +395,64 @@ ArpInitializeProcessorRegisters(VOID)
     ArLoadMxcsrRegister(INITIAL_MXCSR);
 }
 
+/**
+ * Initializes i686 processor specific structures with provided memory buffer.
+ *
+ * @param ProcessorStructures
+ *        Supplies a pointer to the allocated buffer with processor structures.
+ *
+ * @param Gdt
+ *        Supplies a pointer to the GDT.
+ *
+ * @param Tss
+ *        Supplies a pointer to the TSS.
+ *
+ * @param ProcessorBlock
+ *        Supplies a pointer to the processor block.
+ *
+ * @param KernelBootStack
+ *        Supplies a pointer to the kernel boot stack.
+ *
+ * @param KernelFaultStack
+ *        Supplies a pointer to the kernel fault stack.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
+                                 OUT PKGDTENTRY *Gdt,
+                                 OUT PKTSS *Tss,
+                                 OUT PKPROCESSOR_BLOCK *ProcessorBlock,
+                                 OUT PVOID *KernelBootStack,
+                                 OUT PVOID *KernelFaultStack)
+{
+    UINT_PTR Address;
+
+    /* Align address to page size boundary and move to kernel boot stack */
+    Address = ROUND_UP((UINT_PTR)ProcessorStructures, MM_PAGE_SIZE) + KERNEL_STACK_SIZE;
+
+    /* Assign a space for kernel boot stack and advance */
+    *KernelBootStack = (PVOID)Address;
+    Address += KERNEL_STACK_SIZE;
+
+    /* Assign a space for kernel fault stack, no advance needed as stack grows down */
+    *KernelFaultStack = (PVOID)Address;
+
+    /* Assign a space for GDT and advance */
+    *Gdt = (PVOID)Address;
+    Address += sizeof(ArInitialGdt);
+
+    /* Assign a space for Processor Block and advance */
+    *ProcessorBlock = (PVOID)Address;
+    Address += sizeof(ArInitialProcessorBlock);
+
+    /* Assign a space for TSS */
+    *Tss = (PVOID)Address;
+}
+
 /**
  * Initializes segment registers.
  *
@@ -421,16 +488,18 @@ ArpInitializeSegments(VOID)
  */
 XTAPI
 VOID
-ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock)
+ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
+                 IN PVOID KernelBootStack,
+                 IN PVOID KernelFaultStack)
 {
     /* Fill TSS with zeroes */
     RtlZeroMemory(ProcessorBlock->TssBase, sizeof(KTSS));
 
     /* Setup I/O map and stacks for ring0 & traps */
     ProcessorBlock->TssBase->IoMapBase = sizeof(KTSS);
-    ProcessorBlock->TssBase->Rsp0 = (ULONG_PTR)&ArKernelBootStack;
-    ProcessorBlock->TssBase->Ist[KIDT_IST_PANIC] = (ULONG_PTR)&ArKernelFaultStack;
-    ProcessorBlock->TssBase->Ist[KIDT_IST_MCA] = (ULONG_PTR)&ArKernelFaultStack;
+    ProcessorBlock->TssBase->Rsp0 = (ULONG_PTR)KernelBootStack;
+    ProcessorBlock->TssBase->Ist[KIDT_IST_PANIC] = (ULONG_PTR)KernelFaultStack;
+    ProcessorBlock->TssBase->Ist[KIDT_IST_MCA] = (ULONG_PTR)KernelFaultStack;
 }
 
 /**

xtoskrnl/ar/i686/cpufunc.c

@@ -82,6 +82,30 @@ ArFlushTlb(VOID)
     ArWriteControlRegister(3, ArReadControlRegister(3));
 }
 
+/**
+ * Gets the EFLAGS register.
+ *
+ * @return This routine returns the EFLAGS register.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+ULONG
+ArGetCpuFlags(VOID)
+{
+    ULONG_PTR Flags;
+
+    /* Get EFLAGS register */
+    asm volatile("pushf\n"
+                 "pop %0\n"
+                 : "=rm" (Flags)
+                 :
+                 : "memory");
+
+    /* Return flags */
+    return Flags;
+}
+
 /**
  * Gets the address of the current stack register.
  *
@@ -116,6 +140,26 @@ ArHalt(VOID)
     asm volatile("hlt");
 }
 
+/**
+ * Checks whether interrupts are enabled or not.
+ *
+ * @return This routine returns TRUE if interrupts are enabled, or FALSE otherwise.
+ *
+ * @since XT 1.0
+ */
+XTCDECL
+BOOLEAN
+ArInterruptsEnabled(VOID)
+{
+    ULONG_PTR Flags;
+
+    /* Get RFLAGS register */
+    Flags = ArGetCpuFlags();
+
+    /* Check if interrupts are enabled and return result */
+    return (Flags & X86_EFLAGS_IF_MASK) ? TRUE : FALSE;
+}
+
 /**
  * Invalidates the TLB (Translation Lookaside Buffer) for specified virtual address.
  *

xtoskrnl/ar/i686/procsup.c

@@ -18,31 +18,43 @@
  */
 XTAPI
 VOID
-ArInitializeProcessor(VOID)
+ArInitializeProcessor(IN PVOID ProcessorStructures)
 {
     KDESCRIPTOR GdtDescriptor, IdtDescriptor;
+    PVOID KernelBootStack, KernelFaultStack;
     PKPROCESSOR_BLOCK ProcessorBlock;
-    PVOID KernelFaultStack;
     PKGDTENTRY Gdt;
     PKIDTENTRY Idt;
     PKTSS Tss;
 
+    /* Check if processor structures buffer provided */
+    if(ProcessorStructures)
+    {
+        /* Assign CPU structures from provided buffer */
+        ArpInitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
+                                         &KernelBootStack, &KernelFaultStack);
+
+        /* Use global IDT */
+        Idt = ArInitialIdt;
+    }
+    else
+    {
         /* Use initial structures */
         Gdt = ArInitialGdt;
         Idt = ArInitialIdt;
         Tss = &ArInitialTss;
+        KernelBootStack = &ArKernelBootStack;
         KernelFaultStack = &ArKernelFaultStack;
-
-    /* Load processor block */
-    ProcessorBlock = CONTAIN_RECORD(&ArInitialProcessorBlock.Prcb, KPROCESSOR_BLOCK, Prcb);
+        ProcessorBlock = &ArInitialProcessorBlock;
+    }
 
     /* Initialize processor block */
     ArpInitializeProcessorBlock(ProcessorBlock, Gdt, Idt, Tss, KernelFaultStack);
 
     /* Initialize GDT, IDT and TSS */
     ArpInitializeGdt(ProcessorBlock);
-    ArpInitializeTss(ProcessorBlock);
     ArpInitializeIdt(ProcessorBlock);
+    ArpInitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
 
     /* Set GDT and IDT descriptors */
     GdtDescriptor.Base = Gdt;
@@ -130,9 +142,9 @@ ArpIdentifyProcessor(VOID)
 
     /* Store CPU vendor in processor control block */
     Prcb->CpuId.Vendor = CpuRegisters.Ebx;
-    Prcb->CpuId.VendorName[0] = CpuRegisters.Ebx;
-    Prcb->CpuId.VendorName[4] = CpuRegisters.Edx;
-    Prcb->CpuId.VendorName[8] = CpuRegisters.Ecx;
+    *(PULONG)&Prcb->CpuId.VendorName[0] = CpuRegisters.Ebx;
+    *(PULONG)&Prcb->CpuId.VendorName[4] = CpuRegisters.Edx;
+    *(PULONG)&Prcb->CpuId.VendorName[8] = CpuRegisters.Ecx;
     Prcb->CpuId.VendorName[12] = '\0';
 
     /* Get CPU features */
@@ -150,9 +162,9 @@ ArpIdentifyProcessor(VOID)
     if(Prcb->CpuId.Vendor == CPU_VENDOR_AMD)
     {
         /* AMD CPU */
-        Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
-        if(Prcb->CpuId.Model == 0xF)
+        if(Prcb->CpuId.Family >= 0xF)
         {
+            Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
             Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
         }
     }
@@ -164,7 +176,7 @@ ArpIdentifyProcessor(VOID)
             Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
         }
 
-        if((Prcb->CpuId.Family == 0xF) || (Prcb->CpuId.Family == 0x6))
+        if((Prcb->CpuId.Family == 0x6) || (Prcb->CpuId.Family == 0xF))
         {
             Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
         }
@@ -286,9 +298,6 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
                             IN PKTSS Tss,
                             IN PVOID DpcStack)
 {
-    /* Fill processor block with zeroes */
-    RtlZeroMemory(ProcessorBlock, sizeof(KPROCESSOR_BLOCK));
-
     /* Set processor block and processor control block */
     ProcessorBlock->Self = ProcessorBlock;
     ProcessorBlock->CurrentPrcb = &ProcessorBlock->Prcb;
@@ -302,9 +311,9 @@ ArpInitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
     ProcessorBlock->Prcb.DpcStack = DpcStack;
 
     /* Setup processor control block */
-    ProcessorBlock->Prcb.Number = 0;
-    ProcessorBlock->Prcb.SetMember = 1;
-    ProcessorBlock->Prcb.MultiThreadProcessorSet = 1;
+    ProcessorBlock->Prcb.CpuNumber = ProcessorBlock->CpuNumber;
+    ProcessorBlock->Prcb.SetMember = 1 << ProcessorBlock->CpuNumber;
+    ProcessorBlock->Prcb.MultiThreadProcessorSet = 1 << ProcessorBlock->CpuNumber;
 
     /* Clear DR6 and DR7 registers */
     ProcessorBlock->Prcb.ProcessorState.SpecialRegisters.KernelDr6 = 0;
@@ -338,6 +347,64 @@ ArpInitializeProcessorRegisters(VOID)
     ArWriteControlRegister(0, ArReadControlRegister(0) | CR0_WP);
 }
 
+/**
+ * Initializes i686 processor specific structures with provided memory buffer.
+ *
+ * @param ProcessorStructures
+ *        Supplies a pointer to the allocated buffer with processor structures.
+ *
+ * @param Gdt
+ *        Supplies a pointer to the GDT.
+ *
+ * @param Tss
+ *        Supplies a pointer to the TSS.
+ *
+ * @param ProcessorBlock
+ *        Supplies a pointer to the processor block.
+ *
+ * @param KernelBootStack
+ *        Supplies a pointer to the kernel boot stack.
+ *
+ * @param KernelFaultStack
+ *        Supplies a pointer to the kernel fault stack.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
+                                 OUT PKGDTENTRY *Gdt,
+                                 OUT PKTSS *Tss,
+                                 OUT PKPROCESSOR_BLOCK *ProcessorBlock,
+                                 OUT PVOID *KernelBootStack,
+                                 OUT PVOID *KernelFaultStack)
+{
+    UINT_PTR Address;
+
+    /* Align address to page size boundary and move to kernel boot stack */
+    Address = ROUND_UP((UINT_PTR)ProcessorStructures, MM_PAGE_SIZE) + KERNEL_STACK_SIZE;
+
+    /* Assign a space for kernel boot stack and advance */
+    *KernelBootStack = (PVOID)Address;
+    Address += KERNEL_STACK_SIZE;
+
+    /* Assign a space for kernel fault stack, no advance needed as stack grows down */
+    *KernelFaultStack = (PVOID)Address;
+
+    /* Assign a space for GDT and advance */
+    *Gdt = (PVOID)Address;
+    Address += sizeof(ArInitialGdt);
+
+    /* Assign a space for Processor Block and advance */
+    *ProcessorBlock = (PVOID)Address;
+    Address += sizeof(ArInitialProcessorBlock);
+
+    /* Assign a space for TSS */
+    *Tss = (PVOID)Address;
+}
+
 /**
  * Initializes segment registers.
  *
@@ -368,7 +435,9 @@ ArpInitializeSegments(VOID)
  */
 XTAPI
 VOID
-ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock)
+ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
+                 IN PVOID KernelBootStack,
+                 IN PVOID KernelFaultStack)
 {
     /* Clear I/O map */
     RtlSetMemory(ProcessorBlock->TssBase->IoMaps[0].IoMap, 0xFF, IOPM_FULL_SIZE);
@@ -391,6 +460,7 @@ ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock)
 
     /* Set I/O map base and disable traps */
     ProcessorBlock->TssBase->IoMapBase = sizeof(KTSS);
+    ProcessorBlock->TssBase->Esp0 = (ULONG_PTR)KernelBootStack;
     ProcessorBlock->TssBase->Flags = 0;
 
     /* Set LDT and SS */
@@ -398,8 +468,8 @@ ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock)
     ProcessorBlock->TssBase->Ss0 = KGDT_R0_DATA;
 
     /* Initialize task gates for DoubleFault and NMI traps */
-    ArpSetDoubleFaultTssEntry(ProcessorBlock);
-    ArpSetNonMaskableInterruptTssEntry(ProcessorBlock);
+    ArpSetDoubleFaultTssEntry(ProcessorBlock, KernelFaultStack);
+    ArpSetNonMaskableInterruptTssEntry(ProcessorBlock, KernelFaultStack);
 }
 
 /**
@@ -414,7 +484,8 @@ ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock)
  */
 XTAPI
 VOID
-ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock)
+ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
+                          IN PVOID KernelFaultStack)
 {
     PKGDTENTRY TaskGateEntry, TssEntry;
     PKTSS Tss;
@@ -432,8 +503,8 @@ ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock)
     Tss->Flags = 0;
     Tss->LDT = KGDT_R0_LDT;
     Tss->CR3 = ArReadControlRegister(3);
-    Tss->Esp = (ULONG_PTR)&ArKernelFaultStack;
-    Tss->Esp0 = (ULONG_PTR)&ArKernelFaultStack;
+    Tss->Esp = (ULONG_PTR)KernelFaultStack;
+    Tss->Esp0 = (ULONG_PTR)KernelFaultStack;
     Tss->Eip = PtrToUlong(ArpHandleTrap08);
     Tss->Cs = KGDT_R0_CODE;
     Tss->Ds = KGDT_R3_DATA | RPL_MASK;
@@ -583,7 +654,8 @@ ArpSetIdtGate(IN PKIDTENTRY Idt,
  */
 XTAPI
 VOID
-ArpSetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock)
+ArpSetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
+                                   IN PVOID KernelFaultStack)
 {
     PKGDTENTRY TaskGateEntry, TssEntry;
     PKTSS Tss;
@@ -601,8 +673,8 @@ ArpSetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock)
     Tss->Flags = 0;
     Tss->LDT = KGDT_R0_LDT;
     Tss->CR3 = ArReadControlRegister(3);
-    Tss->Esp = (ULONG_PTR)&ArKernelFaultStack;
-    Tss->Esp0 = (ULONG_PTR)&ArKernelFaultStack;
+    Tss->Esp = (ULONG_PTR)KernelFaultStack;
+    Tss->Esp0 = (ULONG_PTR)KernelFaultStack;
     Tss->Eip = PtrToUlong(ArpHandleTrap02);
     Tss->Cs = KGDT_R0_CODE;
     Tss->Ds = KGDT_R3_DATA | RPL_MASK;

xtoskrnl/hl/acpi.c

@@ -0,0 +1,774 @@
+/**
+ * PROJECT:         ExectOS
+ * COPYRIGHT:       See COPYING.md in the top level directory
+ * FILE:            xtoskrnl/hl/x86/acpi.c
+ * DESCRIPTION:     Advanced Configuration and Power Interface (ACPI) support
+ * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
+ */
+
+#include <xtos.h>
+
+
+/**
+ * Gets a pointer to the ACPI system description pointer (RSDP).
+ *
+ * @param Rsdp
+ *        Supplies a pointer to the memory area, where RSDP virtual address will be stored.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlGetAcpiSystemDescriptionPointer(OUT PACPI_RSDP *Rsdp)
+{
+    /* Get RSDP and return success */
+    *Rsdp = HlpAcpiRsdp;
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Gets an ACPI description table with given signature, available in the XSDT/RSDT.
+ *
+ * @param Signature
+ *        Supplies the signature of the desired ACPI table.
+ *
+ * @param AcpiTable
+ *        Supplies a pointer to memory area where ACPI table virtual address will be stored.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlGetAcpiTable(IN ULONG Signature,
+               OUT PACPI_DESCRIPTION_HEADER *AcpiTable)
+{
+    PACPI_DESCRIPTION_HEADER Table;
+    XTSTATUS Status;
+
+    /* Assume ACPI table not found */
+    *AcpiTable = NULL;
+
+    /* Attempt to get ACPI table from the cache */
+    Status = HlpQueryAcpiCache(Signature, &Table);
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Table not found in the cache, query ACPI tables */
+        Status = HlpQueryAcpiTables(Signature, &Table);
+        if(Status != STATUS_SUCCESS)
+        {
+            /* ACPI table not found, return error */
+            return STATUS_NOT_FOUND;
+        }
+    }
+
+    /* Store ACPI table and return success */
+    *AcpiTable = Table;
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Stores given ACPI table in the kernel local cache.
+ *
+ * @param AcpiTable
+ *        Supplies a pointer to ACPI table that will be stored in the cache.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+HlpCacheAcpiTable(IN PACPI_DESCRIPTION_HEADER AcpiTable)
+{
+    PACPI_CACHE_LIST AcpiCache;
+
+    /* Create new ACPI table cache entry */
+    AcpiCache = CONTAIN_RECORD(AcpiTable, ACPI_CACHE_LIST, Header);
+    RtlInsertTailList(&HlpAcpiCacheList, &AcpiCache->ListEntry);
+}
+
+/**
+ * Performs an initialization of the ACPI subsystem.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlpInitializeAcpi(VOID)
+{
+    PACPI_FADT Fadt;
+    XTSTATUS Status;
+
+    /* Initialize ACPI cache */
+    Status = HlpInitializeAcpiCache();
+    if(Status != STATUS_SUCCESS)
+    {
+        /* ACPI cache initialization failed, return error */
+        return Status;
+    }
+
+    /* Get Fixed ACPI Description Table (FADT) */
+    Status = HlGetAcpiTable(ACPI_FADT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Fadt);
+    if(Status != STATUS_SUCCESS || !Fadt)
+    {
+        /* Failed to get FADT, return error */
+        return STATUS_NOT_FOUND;
+    }
+
+    /* Initialize ACPI timer */
+    HlpInitializeAcpiTimer();
+
+    /* Return success */
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Initializes the kernel's local ACPI cache storage.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlpInitializeAcpiCache(VOID)
+{
+    PACPI_DESCRIPTION_HEADER Rsdt;
+    XTSTATUS Status;
+
+    /* Initialize ACPI cache list */
+    RtlInitializeListHead(&HlpAcpiCacheList);
+
+    /* Get XSDT/RSDT */
+    Status = HlpInitializeAcpiSystemDescriptionTable(&Rsdt);
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Failed to get XSDT/RSDT, return error */
+        return Status;
+    }
+
+    /* Cache XSDT/RSDT table */
+    HlpCacheAcpiTable(Rsdt);
+
+    /* Return success */
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Initializes ACPI System Description Table (XSDT/RSDT) by finding proper table and mapping its virtual address.
+ *
+ * @param AcpiTable
+ *        Supplies a pointer to memory area where ACPI table virtual address will be stored.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlpInitializeAcpiSystemDescriptionTable(OUT PACPI_DESCRIPTION_HEADER *AcpiTable)
+{
+    PHYSICAL_ADDRESS RsdpAddress, RsdtAddress;
+    PSYSTEM_RESOURCE_HEADER ResourceHeader;
+    PSYSTEM_RESOURCE_ACPI AcpiResource;
+    ULONG RsdtPages;
+    PACPI_RSDT Rsdt;
+    XTSTATUS Status;
+
+    /* Assume ACPI table not found */
+    *AcpiTable = NULL;
+
+    /* Get ACPI system resource */
+    Status = KeGetSystemResource(SystemResourceAcpi, &ResourceHeader);
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Resource not found */
+        return STATUS_NOT_FOUND;
+    }
+
+    /* Cast system resource to ACPI resource and store RSDP physical address */
+    AcpiResource = (PSYSTEM_RESOURCE_ACPI)ResourceHeader;
+    RsdpAddress.QuadPart = (LONGLONG)AcpiResource->Header.PhysicalAddress;
+
+    /* Map RSDP and mark it as CD/WT to avoid delays in write-back cache */
+    Status = MmMapHardwareMemory(RsdpAddress, 1, TRUE, (PVOID *)&HlpAcpiRsdp);
+    MmMarkHardwareMemoryWriteThrough(HlpAcpiRsdp, 1);
+
+    /* Validate RSDP signature */
+    if(Status != STATUS_SUCCESS || HlpAcpiRsdp->Signature != ACPI_RSDP_SIGNATURE)
+    {
+        /* Not mapped correctly or invalid RSDP signature, return error */
+        return STATUS_INVALID_PARAMETER;
+    }
+
+    /* Check RSDP revision to determine RSDT/XSDT address */
+    if(HlpAcpiRsdp->Revision >= 2)
+    {
+        /* Get XSDT address */
+        RsdtAddress.QuadPart = (LONGLONG)HlpAcpiRsdp->XsdtAddress;
+    }
+    else
+    {
+        /* Get RSDT address */
+        RsdtAddress.QuadPart = (LONGLONG)HlpAcpiRsdp->RsdtAddress;
+    }
+
+    /* Map RSDT/XSDT as CD/WT */
+    Status = MmMapHardwareMemory(RsdtAddress, 2, TRUE, (PVOID *)&Rsdt);
+    MmMarkHardwareMemoryWriteThrough(Rsdt, 2);
+
+    /* Validate RSDT/XSDT signature */
+    if((Status != STATUS_SUCCESS) ||
+       (Rsdt->Header.Signature != ACPI_RSDT_SIGNATURE &&
+        Rsdt->Header.Signature != ACPI_XSDT_SIGNATURE))
+    {
+        /* Not mapped correctly or invalid RSDT/XSDT signature, return error */
+        return STATUS_INVALID_PARAMETER;
+    }
+
+    /* Calculate the length of all available ACPI tables and remap it if needed */
+    RsdtPages = ((RsdtAddress.LowPart & (MM_PAGE_SIZE - 1)) + Rsdt->Header.Length + (MM_PAGE_SIZE - 1)) >> MM_PAGE_SHIFT;
+    if(RsdtPages != 2)
+    {
+        /* RSDT/XSDT needs less or more than 2 pages, remap it */
+        MmUnmapHardwareMemory(Rsdt, 2, TRUE);
+        Status = MmMapHardwareMemory(RsdtAddress, RsdtPages, TRUE, (PVOID *)&Rsdt);
+        MmMarkHardwareMemoryWriteThrough(Rsdt, RsdtPages);
+
+        /* Make sure remapping was successful */
+        if(Status != STATUS_SUCCESS)
+        {
+            /* Remapping failed, return error */
+            return STATUS_INSUFFICIENT_RESOURCES;
+        }
+    }
+
+    /* Get ACPI table header and return success */
+    *AcpiTable = &Rsdt->Header;
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Initializes System Information structure based on the ACPI provided data.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlpInitializeAcpiSystemInformation(VOID)
+{
+    PACPI_MADT_LOCAL_X2APIC LocalX2Apic;
+    PACPI_MADT_LOCAL_APIC LocalApic;
+    ULONG_PTR MadtTable;
+    PACPI_MADT Madt;
+    XTSTATUS Status;
+    USHORT CpuCount;
+
+    /* Allocate memory for ACPI system information structure */
+    Status = HlpInitializeAcpiSystemStructure();
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Failed to allocate memory, return error */
+        return STATUS_INSUFFICIENT_RESOURCES;
+    }
+
+    /* Get Multiple APIC Description Table (MADT) */
+    Status = HlGetAcpiTable(ACPI_MADT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Madt);
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Failed to get MADT, return error */
+        return STATUS_NOT_FOUND;
+    }
+
+    /* Set APIC table traverse pointer and initialize number of CPUs */
+    MadtTable = (ULONG_PTR)Madt->ApicTables;
+    CpuCount = 0;
+
+    /* Traverse all MADT tables to get system information */
+    while(MadtTable <= ((ULONG_PTR)Madt + Madt->Header.Length))
+    {
+        /* Check if this is a local APIC subtable */
+        if((((PACPI_SUBTABLE_HEADER)MadtTable)->Type == ACPI_MADT_TYPE_LOCAL_APIC) &&
+           (((PACPI_SUBTABLE_HEADER)MadtTable)->Length == sizeof(ACPI_MADT_LOCAL_APIC)))
+        {
+            /* Get local APIC subtable */
+            LocalApic = (PACPI_MADT_LOCAL_APIC)MadtTable;
+
+            /* Make sure, this CPU can be enabled */
+            if(LocalApic->Flags & ACPI_MADT_PLAOC_ENABLED)
+            {
+                /* Store CPU number, APIC ID and CPU ID */
+                HlpSystemInfo.CpuInfo[CpuCount].AcpiId = LocalApic->AcpiId;
+                HlpSystemInfo.CpuInfo[CpuCount].ApicId = LocalApic->ApicId;
+                HlpSystemInfo.CpuInfo[CpuCount].CpuNumber = CpuCount;
+
+                /* Increment number of CPUs */
+                CpuCount++;
+            }
+
+            /* Go to the next MADT table */
+            MadtTable += ((PACPI_SUBTABLE_HEADER)MadtTable)->Length;
+        }
+        else if((((PACPI_SUBTABLE_HEADER)MadtTable)->Type == ACPI_MADT_TYPE_LOCAL_X2APIC) &&
+                (((PACPI_SUBTABLE_HEADER)MadtTable)->Length == sizeof(ACPI_MADT_LOCAL_X2APIC)))
+        {
+            /* Get local X2APIC subtable */
+            LocalX2Apic = (PACPI_MADT_LOCAL_X2APIC)MadtTable;
+
+            /* Make sure, this CPU can be enabled */
+            if(LocalX2Apic->Flags & ACPI_MADT_PLAOC_ENABLED)
+            {
+                /* Store CPU number, APIC ID and CPU ID */
+                HlpSystemInfo.CpuInfo[CpuCount].AcpiId = LocalX2Apic->AcpiId;
+                HlpSystemInfo.CpuInfo[CpuCount].ApicId = LocalX2Apic->ApicId;
+                HlpSystemInfo.CpuInfo[CpuCount].CpuNumber = CpuCount;
+
+                /* Increment number of CPUs */
+                CpuCount++;
+            }
+
+            /* Go to the next MADT table */
+            MadtTable += ((PACPI_SUBTABLE_HEADER)MadtTable)->Length;
+        }
+        else
+        {
+            /* Any other MADT table, try to go to the next one byte-by-byte */
+            MadtTable += 1;
+        }
+    }
+
+    /* Store number of CPUs */
+    HlpSystemInfo.CpuCount = CpuCount;
+
+    /* Return success */
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Initializes ACPI System Information data structure based on the size of available ACPI data.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlpInitializeAcpiSystemStructure(VOID)
+{
+    PHYSICAL_ADDRESS PhysicalAddress;
+    PFN_NUMBER PageCount;
+    ULONG_PTR MadtTable;
+    PACPI_MADT Madt;
+    XTSTATUS Status;
+    ULONG CpuCount;
+
+    /* Get Multiple APIC Description Table (MADT) */
+    Status = HlGetAcpiTable(ACPI_MADT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Madt);
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Failed to get MADT, return error */
+        return STATUS_NOT_FOUND;
+    }
+
+    /* Set APIC table traverse pointer and initialize number of CPUs */
+    MadtTable = (ULONG_PTR)Madt->ApicTables;
+    CpuCount = 0;
+
+    /* Traverse all MADT tables to get number of processors */
+    while(MadtTable <= ((ULONG_PTR)Madt + Madt->Header.Length))
+    {
+        /* Check if this is a local APIC subtable */
+        if((((PACPI_SUBTABLE_HEADER)MadtTable)->Type == ACPI_MADT_TYPE_LOCAL_APIC) &&
+           (((PACPI_SUBTABLE_HEADER)MadtTable)->Length == sizeof(ACPI_MADT_LOCAL_APIC)))
+        {
+            /* Make sure, this CPU can be enabled */
+            if(((PACPI_MADT_LOCAL_APIC)MadtTable)->Flags & ACPI_MADT_PLAOC_ENABLED)
+            {
+                /* Increment number of CPUs */
+                CpuCount++;
+            }
+
+            /* Go to the next MADT table */
+            MadtTable += ((PACPI_SUBTABLE_HEADER)MadtTable)->Length;
+        }
+        else if((((PACPI_SUBTABLE_HEADER)MadtTable)->Type == ACPI_MADT_TYPE_LOCAL_X2APIC) &&
+                (((PACPI_SUBTABLE_HEADER)MadtTable)->Length == sizeof(ACPI_MADT_LOCAL_X2APIC)))
+        {
+            /* Make sure, this CPU can be enabled */
+            if(((PACPI_MADT_LOCAL_X2APIC)MadtTable)->Flags & ACPI_MADT_PLAOC_ENABLED)
+            {
+                /* Increment number of CPUs */
+                CpuCount++;
+            }
+
+            /* Go to the next MADT table */
+            MadtTable += ((PACPI_SUBTABLE_HEADER)MadtTable)->Length;
+        }
+        else
+        {
+            /* Any other MADT table, try to go to the next one byte-by-byte */
+            MadtTable += 1;
+        }
+    }
+
+    /* Zero the ACPI system information structure */
+    RtlZeroMemory(&HlpSystemInfo, sizeof(ACPI_SYSTEM_INFO));
+
+    /* Calculate number of pages needed to store CPU information */
+    PageCount = SIZE_TO_PAGES(CpuCount * sizeof(PROCESSOR_IDENTITY));
+
+    /* Allocate memory for CPU information */
+    Status = MmAllocateHardwareMemory(PageCount, TRUE, &PhysicalAddress);
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Failed to allocate memory, return error */
+        return Status;
+    }
+
+    /* Map physical address to the virtual memory area */
+    Status = MmMapHardwareMemory(PhysicalAddress, PageCount, TRUE, (PVOID *)&HlpSystemInfo.CpuInfo);
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Failed to map memory, return error */
+        return Status;
+    }
+
+    /* Zero the CPU information structure */
+    RtlZeroMemory(HlpSystemInfo.CpuInfo, PAGES_TO_SIZE(PageCount));
+
+    /* Return success */
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Initializes the ACPI Timer.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlpInitializeAcpiTimer(VOID)
+{
+    PACPI_FADT Fadt;
+    XTSTATUS Status;
+
+    /* Get Fixed ACPI Description Table (FADT) */
+    Status = HlGetAcpiTable(ACPI_FADT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Fadt);
+    if(Status != STATUS_SUCCESS || !Fadt)
+    {
+        /* Failed to get FADT, return error */
+        return STATUS_NOT_FOUND;
+    }
+
+    /* Set ACPI timer port address */
+    HlpAcpiTimerInfo.TimerPort = Fadt->PmTmrBlkIoPort;
+
+    /* Determine whether 32-bit or 24-bit timer is used */
+    if(Fadt->Flags & ACPI_FADT_32BIT_TIMER)
+    {
+        /* 32-bit timer */
+        HlpAcpiTimerInfo.MsbMask = ACPI_FADT_TIMER_32BIT;
+    }
+    else
+    {
+        /* 24-bit timer */
+        HlpAcpiTimerInfo.MsbMask = ACPI_FADT_TIMER_24BIT;
+    }
+
+    /* Return success */
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Queries kernel local ACPI cache in attempt to find a requested ACPI table.
+ *
+ * @param Signature
+ *        Supplies the signature of the desired ACPI table.
+ *
+ * @param AcpiTable
+ *        Supplies a pointer to memory area where ACPI table virtual address will be stored.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlpQueryAcpiCache(IN ULONG Signature,
+                  OUT PACPI_DESCRIPTION_HEADER *AcpiTable)
+{
+    PACPI_DESCRIPTION_HEADER TableHeader;
+    PACPI_CACHE_LIST AcpiCache;
+    PLIST_ENTRY ListEntry;
+
+    /* Initialize variables */
+    TableHeader = NULL;
+
+    /* Iterate through ACPI tables cache list */
+    ListEntry = HlpAcpiCacheList.Flink;
+    while(ListEntry != &HlpAcpiCacheList)
+    {
+        /* Get cached ACPI table header */
+        AcpiCache = CONTAIN_RECORD(ListEntry, ACPI_CACHE_LIST, ListEntry);
+
+        /* Check if ACPI table signature matches */
+        if(AcpiCache->Header.Signature == Signature)
+        {
+            /* ACPI table found in cache, return it */
+            TableHeader = &AcpiCache->Header;
+            break;
+        }
+
+        /* Go to the next cache entry */
+        ListEntry = ListEntry->Flink;
+    }
+
+    /* Check if the requested ACPI table was found in the cache */
+    if(TableHeader == NULL)
+    {
+        /* ACPI table not found in cache, return error */
+        return STATUS_NOT_FOUND;
+    }
+
+    /* Return table header and status code */
+    *AcpiTable = TableHeader;
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Queries XSDT/RSDT in order to find a requested ACPI table.
+ * Once the desired ACPI table is found, it is being mapped and cached.
+ *
+ * @param Signature
+ *        Supplies the signature of the desired ACPI table.
+ *
+ * @param AcpiTable
+ *        Supplies a pointer to memory area where ACPI table virtual address will be stored.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlpQueryAcpiTables(IN ULONG Signature,
+                   OUT PACPI_DESCRIPTION_HEADER *AcpiTable)
+{
+    ULONG TableCount, TableIndex, TablePages;
+    PACPI_DESCRIPTION_HEADER TableHeader;
+    PHYSICAL_ADDRESS TableAddress;
+    PACPI_FADT Fadt;
+    PACPI_RSDT Rsdt;
+    PACPI_XSDT Xsdt;
+    XTSTATUS Status;
+
+    /* Check if requesting a valid ACPI table */
+    if(Signature == ACPI_RSDT_SIGNATURE || Signature == ACPI_XSDT_SIGNATURE)
+    {
+        /* Cannot provide RSDP/XSDP table, it should be cached; return error */
+        return STATUS_INVALID_PARAMETER;
+    }
+
+    /* Ensure that table header is not set before attempting to find ACPI table */
+    TableHeader = NULL;
+
+    /* Check if DSDT or FACS table requested */
+    if(Signature == ACPI_DSDT_SIGNATURE || Signature == ACPI_FACS_SIGNATURE)
+    {
+        /* Get FADT as it contains a pointer to DSDT and FACS */
+        Status = HlGetAcpiTable(ACPI_FADT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Fadt);
+        if(Status != STATUS_SUCCESS)
+        {
+            /* Failed to get FADT, return error */
+            return Status;
+        }
+
+        /* Check if DSDT or FACS table requested */
+        if(Signature == ACPI_DSDT_SIGNATURE)
+        {
+            /* Get DSDT address */
+            TableAddress.LowPart = Fadt->Dsdt;
+        }
+        else
+        {
+            /* Get FACS address */
+            TableAddress.LowPart = Fadt->FirmwareCtrl;
+        }
+
+        /* Fill in high part of ACPI table address */
+        TableAddress.HighPart = 0;
+
+        /* Map table using hardware memory pool */
+        Status = MmMapHardwareMemory(TableAddress, 2, TRUE, (PVOID*)&TableHeader);
+        if(Status != STATUS_SUCCESS)
+        {
+            /* Failed to map table, return error */
+            return Status;
+        }
+    }
+    else
+    {
+        /* Query cache for XSDP table */
+        Status = HlpQueryAcpiCache(ACPI_XSDT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Xsdt);
+        if(Status != STATUS_SUCCESS)
+        {
+            /* XSDP not found, query cache for RSDP table */
+            Status = HlpQueryAcpiCache(ACPI_RSDT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Rsdt);
+        }
+
+        /* Check if XSDT or RSDT table found */
+        if(Status != STATUS_SUCCESS)
+        {
+            /* Failed to get XSDT/RSDT, return error */
+            return Status;
+        }
+
+        /* Get table count depending on root table type */
+        if(Xsdt != NULL)
+        {
+            /* Get table count from XSDT */
+            TableCount = (Xsdt->Header.Length - sizeof(ACPI_DESCRIPTION_HEADER)) / 8;
+        }
+        else
+        {
+            /* Get table count from RSDT */
+            TableCount = (Rsdt->Header.Length - sizeof(ACPI_DESCRIPTION_HEADER)) / 4;
+        }
+
+        /* Iterate over all ACPI tables */
+        for(TableIndex = 0; TableIndex < TableCount; TableIndex++)
+        {
+            /* Check if XSDP or RSDT is used */
+            if(Xsdt != NULL)
+            {
+                /* Get table header physical address from XSDT */
+                TableAddress.QuadPart = Xsdt->Tables[TableIndex];
+            }
+            else
+            {
+                /* Get table header physical address from RSDT */
+                TableAddress.LowPart = Rsdt->Tables[TableIndex];
+                TableAddress.HighPart = 0;
+            }
+
+            /* Check whether some table is already mapped */
+            if(TableHeader != NULL)
+            {
+                /* Unmap previous table */
+                MmUnmapHardwareMemory(TableHeader, 2, TRUE);
+            }
+
+            /* Map table using hardware memory pool */
+            Status = MmMapHardwareMemory(TableAddress, 2, TRUE, (PVOID*)&TableHeader);
+            if(Status != STATUS_SUCCESS)
+            {
+                /* Failed to map table, return error */
+                return Status;
+            }
+
+            /* Verify table signature */
+            if(TableHeader->Signature == Signature)
+            {
+                /* Found requested ACPI table */
+                break;
+            }
+        }
+    }
+
+    /* Make sure table was found */
+    if(TableHeader->Signature != Signature)
+    {
+        /* ACPI table not found, check if cleanup is needed */
+        if(TableHeader != NULL)
+        {
+            /* Unmap non-matching ACPI table */
+            MmUnmapHardwareMemory(TableHeader, 2, TRUE);
+        }
+
+        /* Return error */
+        return STATUS_NOT_FOUND;
+    }
+
+    /* Don't validate FADT on old, broken firmwares with ACPI 2.0 or older */
+    if(TableHeader->Signature != ACPI_FADT_SIGNATURE || TableHeader->Revision > 2)
+    {
+        /* Validate table checksum */
+        if(!HlpValidateAcpiTable(TableHeader, TableHeader->Length))
+        {
+            /* Checksum mismatch, unmap table and return error */
+            MmUnmapHardwareMemory(TableHeader, 2, TRUE);
+            return STATUS_CRC_ERROR;
+        }
+    }
+
+    /* Calculate the length of ACPI table and remap it if needed */
+    TablePages = (((ULONG_PTR)TableHeader & (MM_PAGE_SIZE - 1)) + TableHeader->Length + (MM_PAGE_SIZE - 1)) >> MM_PAGE_SHIFT;
+    if(TablePages != 2)
+    {
+        /* ACPI table needs less or more than 2 pages, remap it */
+        MmUnmapHardwareMemory(TableHeader, 2, FALSE);
+        Status = MmMapHardwareMemory(TableAddress, TablePages, TRUE, (PVOID*)&TableHeader);
+
+        /* Make sure remapping was successful */
+        if(Status != STATUS_SUCCESS)
+        {
+            /* Remapping failed, return error */
+            return STATUS_INSUFFICIENT_RESOURCES;
+        }
+    }
+
+    /* Mark table as write through and store it in local cache */
+    MmMarkHardwareMemoryWriteThrough(TableHeader, TablePages);
+    HlpCacheAcpiTable(TableHeader);
+
+    /* Store ACPI table and return success */
+    *AcpiTable = TableHeader;
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Validates given ACPI table by calculating its checksum.
+ *
+ * @param Buffer
+ *        Supplies a pointer to the table to checksum.
+ *
+ * @param Size
+ *        Supplies the size of the table, in bytes.
+ *
+ * @return This routine returns TRUE if the table is valid, or FALSE otherwise.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+BOOLEAN
+HlpValidateAcpiTable(IN PVOID Buffer,
+                     IN UINT_PTR Size)
+{
+    PUCHAR Pointer;
+    UCHAR Sum;
+
+    /* Initialize variables */
+    Sum = 0;
+    Pointer = Buffer;
+
+    /* Calculate checksum of given table */
+    while(Size != 0)
+    {
+        Sum = (UCHAR)(Sum + *Pointer);
+        Pointer += 1;
+        Size -= 1;
+    }
+
+    /* Return calculated checksum */
+    return (Sum == 0) ? TRUE : FALSE;
+}

xtoskrnl/hl/cport.c

@@ -9,9 +9,6 @@
 #include <xtos.h>
 
 
-/* COM port I/O addresses */
-ULONG ComPortAddress[] = COMPORT_ADDRESSES;
-
 /**
  * This routine gets a byte from serial port.
  *
@@ -212,37 +209,16 @@ HlComPortReadLsr(IN PCPPORT Port,
 XTCDECL
 XTSTATUS
 HlInitializeComPort(IN OUT PCPPORT Port,
-                    IN ULONG PortNumber,
                     IN PUCHAR PortAddress,
                     IN ULONG BaudRate)
 {
-    USHORT Flags = 0;
-    UCHAR Byte = 0;
-    PUCHAR Address;
+    USHORT Flags;
+    UCHAR Byte;
     ULONG Mode;
 
-    /* We support only a pre-defined number of ports */
-    if(PortNumber > ARRAY_SIZE(ComPortAddress))
-    {
-        /* Fail if wrong/unsupported port used */
-        return STATUS_INVALID_PARAMETER;
-    }
-
-    /* Check if serial port is set */
-    if(PortNumber == 0)
-    {
-        /* Check if port address supplied instead */
-        if(PortAddress)
-        {
-            /* Set custom port address */
-            ComPortAddress[PortNumber] = PtrToUlong(PortAddress);
-        }
-        else
-        {
-            /* Use COM1 by default */
-            PortNumber = 1;
-        }
-    }
+    /* Initialize variables */
+    Byte = 0;
+    Flags = 0;
 
     /* Check if baud rate is set */
     if(BaudRate == 0)
@@ -252,11 +228,8 @@ HlInitializeComPort(IN OUT PCPPORT Port,
         Flags |= COMPORT_FLAG_DBR;
     }
 
-    /* Store COM pointer */
-    Address = UlongToPtr(ComPortAddress[PortNumber]);
-
     /* Check whether this port is not already initialized */
-    if((Port->Address == Address) && (Port->Baud == BaudRate))
+    if((Port->Address == PortAddress) && (Port->Baud == BaudRate))
     {
         return STATUS_SUCCESS;
     }
@@ -265,8 +238,8 @@ HlInitializeComPort(IN OUT PCPPORT Port,
     do
     {
         /* Check whether the 16450/16550 scratch register exists */
-        HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_REG_SR), Byte);
-        if(HlIoPortInByte(PtrToUshort(Address + (ULONG)COMPORT_REG_SR)) != Byte)
+        HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_SR), Byte);
+        if(HlIoPortInByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_SR)) != Byte)
         {
             return STATUS_NOT_FOUND;
         }
@@ -274,40 +247,40 @@ HlInitializeComPort(IN OUT PCPPORT Port,
     while(++Byte != 0);
 
     /* Disable interrupts */
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_REG_LCR), COMPORT_LSR_DIS);
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_REG_IER), COMPORT_LSR_DIS);
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_LCR), COMPORT_LSR_DIS);
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_IER), COMPORT_LSR_DIS);
 
     /* Enable Divisor Latch Access Bit (DLAB) */
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_REG_LCR), COMPORT_LCR_DLAB);
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_LCR), COMPORT_LCR_DLAB);
 
     /* Set baud rate */
     Mode = COMPORT_CLOCK_RATE / BaudRate;
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_DIV_DLL), (UCHAR)(Mode & 0xFF));
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_DIV_DLM), (UCHAR)((Mode >> 8) & 0xFF));
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_DIV_DLL), (UCHAR)(Mode & 0xFF));
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_DIV_DLM), (UCHAR)((Mode >> 8) & 0xFF));
 
     /* Set 8 data bits, 1 stop bits, no parity (8n1) */
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_REG_LCR),
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_LCR),
                        COMPORT_LCR_8DATA | COMPORT_LCR_1STOP | COMPORT_LCR_PARN);
 
     /* Enable DTR, RTS and OUT2 */
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_REG_MCR),
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_MCR),
                        COMPORT_MCR_DTR | COMPORT_MCR_RTS | COMPORT_MCR_OUT2);
 
     /* Enable FIFO */
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_REG_FCR),
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_FCR),
                        COMPORT_FCR_ENABLE | COMPORT_FCR_RCVR_RESET | COMPORT_FCR_TXMT_RESET);
 
     /* Mark port as fully initialized */
     Flags |= COMPORT_FLAG_INIT;
 
     /* Make sure port works in Normal Operation Mode (NOM) */
-    HlIoPortOutByte(PtrToUshort(Address + (ULONG)COMPORT_REG_MCR), COMPORT_MCR_NOM);
+    HlIoPortOutByte(PtrToUshort(PortAddress + (ULONG)COMPORT_REG_MCR), COMPORT_MCR_NOM);
 
     /* Read junk data out of the Receive Buffer Register (RBR) */
     HlIoPortInByte(PtrToUshort(Port->Address + (ULONG)COMPORT_REG_RBR));
 
     /* Store port details */
-    Port->Address = Address;
+    Port->Address = PortAddress;
     Port->Baud = BaudRate;
     Port->Flags = Flags;
 

xtoskrnl/hl/fbdev.c

@@ -1,8 +1,8 @@
 /**
  * PROJECT:         ExectOS
  * COPYRIGHT:       See COPYING.md in the top level directory
- * FILE:            xtoskrnl/hl/efifb.c
- * DESCRIPTION:     EFI framebuffer support
+ * FILE:            xtoskrnl/hl/fbdev.c
+ * DESCRIPTION:     FrameBuffer support
  * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
  */
 
@@ -11,7 +11,10 @@
 
 
 /**
- * Clears the screen by drawing a filled black box.
+ * Clears the screen by drawing a box filled with specified color.
+ *
+ * @param Color
+ *        Specifies the color of the box used to fill the screen in (A)RGB format.
  *
  * @return This routine does not return any value.
  *
@@ -19,21 +22,32 @@
  */
 XTAPI
 VOID
-HlClearScreen(VOID)
+HlClearScreen(IN ULONG Color)
 {
     SIZE_T Line, PositionX, PositionY;
+    ULONG BackgroundColor;
     PULONG FrameBuf;
 
+    /* Make sure frame buffer is already initialized */
+    if(HlpFrameBufferData.Initialized == FALSE)
+    {
+        /* Unable to operate on non-initialized frame buffer */
+        return;
+    }
+
     /* Get pointer to frame buffer */
     FrameBuf = HlpFrameBufferData.Address;
 
+    /* Convert background color */
+    BackgroundColor = HlpRGBColor(Color);
+
     /* Fill the screen with a black box */
     for(PositionY = 0; PositionY < HlpFrameBufferData.Height; PositionY++)
     {
         Line = PositionY * HlpFrameBufferData.PixelsPerScanLine;
         for(PositionX = 0; PositionX < HlpFrameBufferData.Width; PositionX++)
         {
-            FrameBuf[Line + PositionX] = 0x00000000;
+            FrameBuf[Line + PositionX] = BackgroundColor;
         }
     }
 }
@@ -48,7 +62,7 @@ HlClearScreen(VOID)
  *        Supplies the Y coordinate of the pixel.
  *
  * @param Color
- *        Specifies the color of the pixel.
+ *        Specifies the color of the pixel in (A)RGB format.
  *
  * @return This routine does not return any value.
  *
@@ -80,7 +94,7 @@ HlDrawPixel(IN ULONG PositionX,
     FrameBufferIndex = 4 * HlpFrameBufferData.PixelsPerScanLine * PositionY + 4 * PositionX;
 
     /* Set the color of the pixel by writing to the corresponding memory location */
-    *((PULONG)(HlpFrameBufferData.Address + FrameBufferIndex)) = Color;
+    *((PULONG)(HlpFrameBufferData.Address + FrameBufferIndex)) = HlpRGBColor(Color);
 }
 
 /**
@@ -94,6 +108,10 @@ XTAPI
 XTSTATUS
 HlInitializeFrameBuffer(VOID)
 {
+    PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource;
+    PSYSTEM_RESOURCE_HEADER SystemResource;
+    XTSTATUS Status;
+
     /* Check if display already initialized */
     if(HlpFrameBufferData.Initialized)
     {
@@ -101,19 +119,29 @@ HlInitializeFrameBuffer(VOID)
         return STATUS_SUCCESS;
     }
 
-    /* Check if framebuffer initialized by bootloader */
-    if(!KeInitializationBlock->LoaderInformation.FrameBuffer.Initialized ||
-       !KeInitializationBlock->LoaderInformation.FrameBuffer.Address)
+    /* Get FrameBuffer system resource */
+    Status = KeGetSystemResource(SystemResourceFrameBuffer, &SystemResource);
+    if(Status != STATUS_SUCCESS)
     {
-        /* Display not initialized */
+        /* Resource not found */
+        return STATUS_NOT_FOUND;
+    }
+
+    /* Cast system resource to FrameBuffer resource */
+    FrameBufferResource = (PSYSTEM_RESOURCE_FRAMEBUFFER)SystemResource;
+
+    /* Check if bootloader provided a framebuffer address */
+    if(!FrameBufferResource->Header.VirtualAddress)
+    {
+        /* Display probably not initialized */
         return STATUS_DEVICE_NOT_READY;
     }
 
-    /* Check if custom font provided by bootloader */
-    if(KeInitializationBlock->LoaderInformation.FrameBuffer.Font)
+    /* Check if bootloader provided a custom font */
+    if(FrameBufferResource->Font)
     {
         /* Use custom font */
-        HlpFrameBufferData.Font = KeInitializationBlock->LoaderInformation.FrameBuffer.Font;
+        HlpFrameBufferData.Font = FrameBufferResource->Font;
     }
     else
     {
@@ -122,16 +150,24 @@ HlInitializeFrameBuffer(VOID)
     }
 
     /* Save framebuffer information and mark display as initialized */
-    HlpFrameBufferData.Address = KeInitializationBlock->LoaderInformation.FrameBuffer.Address;
-    HlpFrameBufferData.Width = KeInitializationBlock->LoaderInformation.FrameBuffer.Width;
-    HlpFrameBufferData.Height = KeInitializationBlock->LoaderInformation.FrameBuffer.Height;
-    HlpFrameBufferData.BitsPerPixel = KeInitializationBlock->LoaderInformation.FrameBuffer.BitsPerPixel;
-    HlpFrameBufferData.PixelsPerScanLine = KeInitializationBlock->LoaderInformation.FrameBuffer.PixelsPerScanLine;
-    HlpFrameBufferData.Pitch = KeInitializationBlock->LoaderInformation.FrameBuffer.Pitch;
+    HlpFrameBufferData.Address = FrameBufferResource->Header.VirtualAddress;
+    HlpFrameBufferData.Width = FrameBufferResource->Width;
+    HlpFrameBufferData.Height = FrameBufferResource->Height;
+    HlpFrameBufferData.BitsPerPixel = FrameBufferResource->BitsPerPixel;
+    HlpFrameBufferData.PixelsPerScanLine = FrameBufferResource->PixelsPerScanLine;
+    HlpFrameBufferData.Pitch = FrameBufferResource->Pitch;
+    HlpFrameBufferData.Pixels.BlueShift = FrameBufferResource->Pixels.BlueShift;
+    HlpFrameBufferData.Pixels.BlueSize = FrameBufferResource->Pixels.BlueSize;
+    HlpFrameBufferData.Pixels.GreenShift = FrameBufferResource->Pixels.GreenShift;
+    HlpFrameBufferData.Pixels.GreenSize = FrameBufferResource->Pixels.GreenSize;
+    HlpFrameBufferData.Pixels.RedShift = FrameBufferResource->Pixels.RedShift;
+    HlpFrameBufferData.Pixels.RedSize = FrameBufferResource->Pixels.RedSize;
+    HlpFrameBufferData.Pixels.ReservedShift = FrameBufferResource->Pixels.ReservedShift;
+    HlpFrameBufferData.Pixels.ReservedSize = FrameBufferResource->Pixels.ReservedSize;
     HlpFrameBufferData.Initialized = TRUE;
 
     /* Clear screen */
-    HlClearScreen();
+    HlClearScreen(0x00000000);
 
     /* Return success */
     return STATUS_SUCCESS;
@@ -147,7 +183,7 @@ HlInitializeFrameBuffer(VOID)
  *        Supplies the Y coordinate of the character.
  *
  * @param Color
- *        Supplies the font color.
+ *        Supplies the font color in (A)RGB format.
  *
  * @param WideCharacter
  *        Supplies the wide character to be drawn on the framebuffer.
@@ -167,6 +203,14 @@ HlPutCharacter(IN ULONG PositionX,
     PUCHAR Character, CharacterMapping, Fragment;
     UINT_PTR GlyphPixel, Pixel;
     PSSFN_FONT_HEADER FbFont;
+    ULONG FontColor;
+
+    /* Make sure frame buffer is already initialized */
+    if(HlpFrameBufferData.Initialized == FALSE)
+    {
+        /* Unable to operate on non-initialized frame buffer */
+        return;
+    }
 
     /* Get pointers to font data */
     FbFont = (PSSFN_FONT_HEADER)HlpFrameBufferData.Font;
@@ -216,8 +260,9 @@ HlPutCharacter(IN ULONG PositionX,
         return;
     }
 
-    /* Find the glyph position on the frame buffer */
+    /* Find the glyph position on the frame buffer and set font color */
     GlyphPixel = (UINT_PTR)HlpFrameBufferData.Address + PositionY * HlpFrameBufferData.Pitch + PositionX * 4;
+    FontColor = HlpRGBColor(Color);
 
     /* Check all kerning fragments */
     Mapping = 0;
@@ -272,7 +317,7 @@ HlPutCharacter(IN ULONG PositionX,
                 if(*Fragment & CurrentFragment)
                 {
                     /* Draw glyph pixel */
-                    *((PULONG)Pixel) = Color;
+                    *((PULONG)Pixel) = FontColor;
                 }
 
                 /* Advance pixel pointer */
@@ -289,3 +334,30 @@ HlPutCharacter(IN ULONG PositionX,
         CharacterMapping += Character[0] & 0x40 ? 6 : 5;
     }
 }
+
+/**
+ * Converts color format from (A)RGB one expected by current FrameBuffer.
+ *
+ * @param Color
+ *        Specifies the color in (A)RGB format.
+ *
+ * @return Returns the color in FrameBuffer format.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+ULONG
+HlpRGBColor(IN ULONG Color)
+{
+    USHORT Blue, Green, Red, Reserved;
+
+    /* Extract color components from (A)RGB value */
+    Blue = (USHORT)(Color & 0xFF);
+    Green = (USHORT)((Color >> 8) & 0xFF);
+    Red = (USHORT)((Color >> 16) & 0xFF);
+    Reserved = (USHORT)((Color >> 24) & 0xFF);
+
+    /* Return color in FrameBuffer pixel format */
+    return (ULONG)((Blue << HlpFrameBufferData.Pixels.BlueShift) | (Green << HlpFrameBufferData.Pixels.GreenShift) |
+                   (Red << HlpFrameBufferData.Pixels.RedShift) | (Reserved << HlpFrameBufferData.Pixels.ReservedShift));
+}

xtoskrnl/hl/globals.c

@@ -9,14 +9,23 @@
 #include <xtos.h>
 
 
+/* ACPI tables cache list */
+LIST_ENTRY HlpAcpiCacheList;
+
+/* ACPI Root System Description Pointer (RSDP) */
+PACPI_RSDP HlpAcpiRsdp;
+
+/* ACPI timer information */
+ACPI_TIMER_INFO HlpAcpiTimerInfo;
+
 /* Active processors count */
 KAFFINITY HlpActiveProcessors;
 
 /* APIC mode */
-HAL_APIC_MODE HlpApicMode;
+APIC_MODE HlpApicMode;
 
 /* FrameBuffer information */
 HAL_FRAMEBUFFER_DATA HlpFrameBufferData;
 
-/* Processors identity table */
-HAL_PROCESSOR_IDENTITY HlpProcessorsIdentity[MAXIMUM_PROCESSORS] = {{0}};
+/* System information */
+ACPI_SYSTEM_INFO HlpSystemInfo;

xtoskrnl/hl/init.c

@@ -0,0 +1,41 @@
+/**
+ * PROJECT:         ExectOS
+ * COPYRIGHT:       See COPYING.md in the top level directory
+ * FILE:            xtoskrnl/hl/init.c
+ * DESCRIPTION:     Hardware layer initialization code
+ * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
+ */
+
+#include <xtos.h>
+
+
+/**
+ * Initializes the hardware layer subsystem
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+HlInitializeSystem(VOID)
+{
+    XTSTATUS Status;
+
+    /* Initialize ACPI */
+    Status = HlpInitializeAcpi();
+    if(Status != STATUS_SUCCESS)
+    {
+        return Status;
+    }
+
+    /* Get system information from ACPI */
+    Status = HlpInitializeAcpiSystemInformation();
+    if(Status != STATUS_SUCCESS)
+    {
+        return Status;
+    }
+
+    /* Return success */
+    return STATUS_SUCCESS;
+}

xtoskrnl/hl/x86/cpu.c

@@ -12,6 +12,9 @@
 /**
  * Initializes the processor.
  *
+ * @param CpuNumber
+ *        Supplies the number of the CPU, that is being initialized.
+ *
  * @return This routine does not return any value.
  *
  * @since XT 1.0
@@ -22,25 +25,22 @@ HlInitializeProcessor(VOID)
 {
     PKPROCESSOR_BLOCK ProcessorBlock;
     KAFFINITY Affinity;
-    ULONG CpuNumber = 0;
 
     /* Get current processor block */
     ProcessorBlock = KeGetCurrentProcessorBlock();
 
-    /* Set initial stall factor */
+    /* Set initial stall factor, CPU number and mask interrupts */
     ProcessorBlock->StallScaleFactor = INITIAL_STALL_FACTOR;
-
-    /* Record processor block in the processors table */
-    HlpProcessorsIdentity[CpuNumber].ProcessorBlock = ProcessorBlock;
+    ProcessorBlock->Idr = 0xFFFFFFFF;
 
     /* Set processor affinity */
-    Affinity = (KAFFINITY) 1 << CpuNumber;
+    Affinity = (KAFFINITY) 1 << ProcessorBlock->CpuNumber;
 
     /* Apply affinity to a set of processors */
     HlpActiveProcessors |= Affinity;
 
     /* Initialize APIC for this processor */
-    HlpInitializeApic();
+    HlpInitializePic();
 
     /* Set the APIC running level */
     HlSetRunLevel(KeGetCurrentProcessorBlock()->RunLevel);

xtoskrnl/hl/x86/pic.c

@@ -4,7 +4,6 @@
  * FILE:            xtoskrnl/hl/x86/pic.c
  * DESCRIPTION:     Programmable Interrupt Controller (PIC) for x86 (i686/AMD64) support
  * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
- *                  Jozef Nagy <schkwve@gmail.com>
  */
 
 #include <xtos.h>
@@ -25,21 +24,6 @@ HlClearApicErrors(VOID)
     HlWriteApicRegister(APIC_ESR, 0);
 }
 
-/**
- * Disables the legacy 8259 Programmable Interrupt Controller (PIC).
- *
- * @return This routine does not return any value.
- *
- * @since XT 1.0
- */
-XTAPI
-VOID
-HlDisableLegacyPic(VOID)
-{
-    HlIoPortOutByte(PIC1_DATA_PORT, 0xFF);
-    HlIoPortOutByte(PIC2_DATA_PORT, 0xFF);
-}
-
 /**
  * Reads from the APIC register.
  *
@@ -51,7 +35,7 @@ HlDisableLegacyPic(VOID)
  * @since XT 1.0
  */
 XTFASTCALL
-ULONG
+ULONGLONG
 HlReadApicRegister(IN APIC_REGISTER Register)
 {
     if(HlpApicMode == APIC_MODE_X2APIC)
@@ -97,7 +81,7 @@ HlSendEoi(VOID)
 XTFASTCALL
 VOID
 HlWriteApicRegister(IN APIC_REGISTER Register,
-                    IN ULONG Value)
+                    IN ULONGLONG Value)
 {
     if(HlpApicMode == APIC_MODE_X2APIC)
     {
@@ -149,6 +133,26 @@ HlpCheckX2ApicSupport(VOID)
     return TRUE;
 }
 
+/**
+ * Gets the local APIC ID of the current processor.
+ *
+ * @return This routine returns the current processor's local APIC ID.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+ULONG
+HlpGetCpuApicId(VOID)
+{
+    ULONG ApicId;
+
+    /* Read APIC ID register */
+    ApicId = HlReadApicRegister(APIC_ID);
+
+    /* Return logical CPU ID depending on current APIC mode */
+    return (HlpApicMode == APIC_MODE_COMPAT) ? ((ApicId & 0xFFFFFFFF) >> APIC_XAPIC_LDR_SHIFT) : ApicId;
+}
+
 /**
  * Allows an APIC spurious interrupts to end up.
  *
@@ -181,17 +185,16 @@ HlpHandlePicSpuriousService(VOID)
  * @return This routine does not return any value.
  *
  * @since XT 1.0
- *
- * @todo Register interrupt handlers for spurious vectors.
  */
 XTAPI
 VOID
 HlpInitializeApic(VOID)
 {
+    APIC_SPURIOUS_REGISTER SpuriousRegister;
+    APIC_COMMAND_REGISTER CommandRegister;
     APIC_BASE_REGISTER BaseRegister;
     APIC_LVT_REGISTER LvtRegister;
-    APIC_SPURIOUS_REGISTER SpuriousRegister;
-    ULONG CpuNumber = 0;
+    ULONG CpuNumber;
 
     /* Check if this is an x2APIC compatible machine */
     if(HlpCheckX2ApicSupport())
@@ -205,20 +208,26 @@ HlpInitializeApic(VOID)
         HlpApicMode = APIC_MODE_COMPAT;
     }
 
+    /* Get processor number */
+    CpuNumber = KeGetCurrentProcessorNumber();
+
     /* Enable the APIC */
     BaseRegister.LongLong = ArReadModelSpecificRegister(APIC_LAPIC_MSR_BASE);
     BaseRegister.Enable = 1;
     BaseRegister.ExtendedMode = (HlpApicMode == APIC_MODE_X2APIC);
-    BaseRegister.BootStrapProcessor = 1;
+    BaseRegister.BootStrapProcessor = (CpuNumber == 0) ? 1 : 0;
     ArWriteModelSpecificRegister(APIC_LAPIC_MSR_BASE, BaseRegister.LongLong);
 
+    /* Raise APIC task priority (TPR) to mask off all interrupts */
+    HlWriteApicRegister(APIC_TPR, 0xFF);
+
     /* xAPIC compatibility mode specific initialization */
     if(HlpApicMode == APIC_MODE_COMPAT)
     {
-        /* Initialize Destination Format Register with flat model */
+        /* Initialize Destination Format Register with flat model (not supported in x2APIC mode) */
         HlWriteApicRegister(APIC_DFR, APIC_DF_FLAT);
 
-        /* Set the logical APIC ID */
+        /* Set the logical APIC ID (read-only in x2APIC mode) */
         HlWriteApicRegister(APIC_LDR, (1UL << CpuNumber) << 24);
     }
 
@@ -229,40 +238,188 @@ HlpInitializeApic(VOID)
     SpuriousRegister.CoreChecking = 0;
     HlWriteApicRegister(APIC_SIVR, SpuriousRegister.Long);
 
-    /* Initialize Logical Vector Table */
-    LvtRegister.Long = 0;
-    LvtRegister.MessageType = APIC_DM_FIXED;
-    LvtRegister.DeliveryStatus = 0;
-    LvtRegister.RemoteIRR = 0;
-    LvtRegister.TriggerMode = APIC_TGM_EDGE;
-    LvtRegister.Mask = 0;
-    LvtRegister.TimerMode = 0;
-
     /* Mask LVTR_ERROR first, to prevent local APIC error */
-    LvtRegister.Vector = APIC_VECTOR_ERROR;
-    HlWriteApicRegister(APIC_ERRLVTR, LvtRegister.Long);
+    HlWriteApicRegister(APIC_ERRLVTR, APIC_VECTOR_ERROR);
 
-    /* Mask LVT tables */
-    LvtRegister.Vector = APIC_VECTOR_NMI;
+    /* Mask TMRLVTR */
+    LvtRegister.Long = 0;
+    LvtRegister.Mask = 1;
+    LvtRegister.MessageType = APIC_DM_FIXED;
+    LvtRegister.TimerMode = 1;
+    LvtRegister.TriggerMode = APIC_TGM_EDGE;
+    LvtRegister.Vector = APIC_VECTOR_PROFILE;
     HlWriteApicRegister(APIC_TMRLVTR, LvtRegister.Long);
-    HlWriteApicRegister(APIC_THRMLVTR, LvtRegister.Long);
+
+    /* Mask PCLVTR */
+    LvtRegister.Long = 0;
+    LvtRegister.Mask = 0;
+    LvtRegister.MessageType = APIC_DM_FIXED;
+    LvtRegister.TimerMode = 0;
+    LvtRegister.TriggerMode = APIC_TGM_EDGE;
+    LvtRegister.Vector = APIC_VECTOR_PERF;
     HlWriteApicRegister(APIC_PCLVTR, LvtRegister.Long);
 
     /* Mask LINT0 */
+    LvtRegister.Long = 0;
+    LvtRegister.Mask = 1;
+    LvtRegister.MessageType = APIC_DM_FIXED;
+    LvtRegister.TimerMode = 0;
+    LvtRegister.TriggerMode = APIC_TGM_EDGE;
     LvtRegister.Vector = APIC_VECTOR_SPURIOUS;
-    LvtRegister.MessageType = APIC_DM_EXTINT;
     HlWriteApicRegister(APIC_LINT0, LvtRegister.Long);
 
     /* Mask LINT1 */
-    LvtRegister.Vector = APIC_VECTOR_NMI;
+    LvtRegister.Long = 0;
+    LvtRegister.Mask = 0;
     LvtRegister.MessageType = APIC_DM_NMI;
-    LvtRegister.TriggerMode = APIC_TGM_LEVEL;
+    LvtRegister.TimerMode = 0;
+    LvtRegister.TriggerMode = APIC_TGM_EDGE;
+    LvtRegister.Vector = APIC_VECTOR_NMI;
     HlWriteApicRegister(APIC_LINT1, LvtRegister.Long);
 
-    /* Clear errors after enabling vectors */
-    HlWriteApicRegister(APIC_ESR, 0);
+    /* Mask ICR0 */
+    CommandRegister.Long0 = 0;
+    CommandRegister.DestinationShortHand = APIC_DSH_Destination;
+    CommandRegister.MessageType = APIC_MT_INIT;
+    CommandRegister.DestinationMode = 1;
+    CommandRegister.TriggerMode = APIC_TGM_EDGE;
+    CommandRegister.Vector = APIC_VECTOR_ZERO;
+    HlWriteApicRegister(APIC_ICR0, CommandRegister.Long0);
 
     /* Register interrupt handlers once the APIC initialization is done */
     KeSetInterruptHandler(APIC_VECTOR_SPURIOUS, HlpHandleApicSpuriousService);
     KeSetInterruptHandler(PIC1_VECTOR_SPURIOUS, HlpHandlePicSpuriousService);
+
+    /* Clear errors after enabling vectors */
+    HlWriteApicRegister(APIC_ESR, 0);
+
+    /* Lower APIC TPR to re-enable interrupts */
+    HlWriteApicRegister(APIC_TPR, 0x00);
+}
+
+/**
+ * Initializes the legacy PIC interrupt controller.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+HlpInitializeLegacyPic(VOID)
+{
+    PIC_I8259_ICW1 Icw1;
+    PIC_I8259_ICW2 Icw2;
+    PIC_I8259_ICW3 Icw3;
+    PIC_I8259_ICW4 Icw4;
+
+    /* Initialize ICW1 for PIC1 port */
+    Icw1.Init = TRUE;
+    Icw1.InterruptMode = EdgeTriggered;
+    Icw1.InterruptVectorAddress = 0;
+    Icw1.Interval = Interval8;
+    Icw1.NeedIcw4 = TRUE;
+    Icw1.OperatingMode = Cascade;
+    HlIoPortOutByte(PIC1_CONTROL_PORT, Icw1.Bits);
+
+    /* Initialize ICW2 for PIC1 port */
+    Icw2.Bits = 0x00;
+    HlIoPortOutByte(PIC1_DATA_PORT, Icw2.Bits);
+
+    /* Initialize ICW3 for PIC1 port */
+    Icw3.Bits = 0;
+    Icw3.SlaveIrq2 = TRUE;
+    HlIoPortOutByte(PIC1_DATA_PORT, Icw3.Bits);
+
+    /* Initialize ICW4 for PIC1 port */
+    Icw4.BufferedMode = NonBuffered;
+    Icw4.EoiMode = NormalEoi;
+    Icw4.Reserved = 0;
+    Icw4.SpecialFullyNestedMode = FALSE;
+    Icw4.SystemMode = New8086Mode;
+    HlIoPortOutByte(PIC1_DATA_PORT, Icw4.Bits);
+
+    /* Mask all interrupts on PIC1 port */
+    HlIoPortOutByte(PIC1_DATA_PORT, 0xFF);
+
+    /* Initialize ICW1 for PIC2 port */
+    Icw1.Init = TRUE;
+    Icw1.InterruptMode = EdgeTriggered;
+    Icw1.InterruptVectorAddress = 0;
+    Icw1.Interval = Interval8;
+    Icw1.NeedIcw4 = TRUE;
+    Icw1.OperatingMode = Cascade;
+    HlIoPortOutByte(PIC2_CONTROL_PORT, Icw1.Bits);
+
+    /* Initialize ICW2 for PIC2 port */
+    Icw2.Bits = 0x08;
+    HlIoPortOutByte(PIC2_DATA_PORT, Icw2.Bits);
+
+    /* Initialize ICW3 for PIC2 port */
+    Icw3.Bits = 0;
+    Icw3.SlaveId = 2;
+    HlIoPortOutByte(PIC2_DATA_PORT, Icw3.Bits);
+
+    /* Initialize ICW4 for PIC2 port */
+    Icw4.BufferedMode = NonBuffered;
+    Icw4.EoiMode = NormalEoi;
+    Icw4.Reserved = 0;
+    Icw4.SpecialFullyNestedMode = FALSE;
+    Icw4.SystemMode = New8086Mode;
+    HlIoPortOutByte(PIC2_DATA_PORT, Icw4.Bits);
+
+    /* Mask all interrupts on PIC2 port */
+    HlIoPortOutByte(PIC2_DATA_PORT, 0xFF);
+}
+
+/**
+ * Initializes the (A)PIC interrupt controller.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ *
+ * @todo Initialize APIC only when supported, otherwise fall back to legacy PIC.
+ */
+XTAPI
+VOID
+HlpInitializePic(VOID)
+{
+    /* Initialize APIC */
+    HlpInitializeApic();
+
+    /* Initialize legacy PIC */
+    HlpInitializeLegacyPic();
+}
+
+/**
+ * Sends an IPI (Inter-Processor Interrupt) to the specified CPU.
+ *
+ * @param ApicId
+ *        Supplies a CPU APIC ID to send an IPI to.
+ *
+ * @param Vector
+ *        Supplies the IPI vector to send.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+HlpSendIpi(ULONG ApicId,
+           ULONG Vector)
+{
+    /* Check current APIC mode */
+    if(HlpApicMode == APIC_MODE_X2APIC)
+    {
+        /* Send IPI using x2APIC mode */
+        HlWriteApicRegister(APIC_ICR0, ((ULONGLONG)ApicId << 32) | Vector);
+    }
+    else
+    {
+        /* Send IPI using xAPIC compatibility mode */
+        HlWriteApicRegister(APIC_ICR1, ApicId << 24);
+        HlWriteApicRegister(APIC_ICR0, Vector);
+    }
 }

xtoskrnl/includes/amd64/ari.h

@@ -25,6 +25,10 @@ XTCDECL
 VOID
 ArFlushTlb(VOID);
 
+XTCDECL
+ULONG
+ArGetCpuFlags(VOID);
+
 XTASSEMBLY
 XTCDECL
 ULONG_PTR
@@ -36,7 +40,11 @@ ArHalt(VOID);
 
 XTAPI
 VOID
-ArInitializeProcessor(VOID);
+ArInitializeProcessor(IN PVOID ProcessorStructures);
+
+XTCDECL
+BOOLEAN
+ArInterruptsEnabled(VOID);
 
 XTCDECL
 VOID
@@ -289,13 +297,24 @@ XTAPI
 VOID
 ArpInitializeProcessorRegisters(VOID);
 
+XTAPI
+VOID
+ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
+                                 OUT PKGDTENTRY *Gdt,
+                                 OUT PKTSS *Tss,
+                                 OUT PKPROCESSOR_BLOCK *ProcessorBlock,
+                                 OUT PVOID *KernelBootStack,
+                                 OUT PVOID *KernelFaultStack);
+
 XTAPI
 VOID
 ArpInitializeSegments(VOID);
 
 XTAPI
 VOID
-ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock);
+ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
+                 IN PVOID KernelBootStack,
+                 IN PVOID KernelFaultStack);
 
 XTAPI
 VOID

xtoskrnl/includes/amd64/hli.h

@@ -17,12 +17,8 @@ XTAPI
 VOID
 HlClearApicErrors(VOID);
 
-XTAPI
-VOID
-HlDisableLegacyPic(VOID);
-
 XTFASTCALL
-ULONG
+ULONGLONG
 HlReadApicRegister(IN APIC_REGISTER Register);
 
 XTAPI
@@ -32,12 +28,16 @@ HlSendEoi(VOID);
 XTFASTCALL
 VOID
 HlWriteApicRegister(IN APIC_REGISTER Register,
-                    IN ULONG Value);
+                    IN ULONGLONG Value);
 
 XTAPI
 BOOLEAN
 HlpCheckX2ApicSupport(VOID);
 
+XTAPI
+ULONG
+HlpGetCpuApicId(VOID);
+
 XTCDECL
 VOID
 HlpHandleApicSpuriousService(VOID);
@@ -48,7 +48,20 @@ HlpHandlePicSpuriousService(VOID);
 
 XTAPI
 VOID
-HlpInitializeApic(VOID);
+HlpInitializeApic();
+
+XTAPI
+VOID
+HlpInitializeLegacyPic(VOID);
+
+XTAPI
+VOID
+HlpInitializePic();
+
+XTAPI
+VOID
+HlpSendIpi(ULONG ApicId,
+           ULONG Vector);
 
 XTFASTCALL
 KRUNLEVEL

xtoskrnl/includes/amd64/kei.h

@@ -21,6 +21,10 @@ XTAPI
 PKPROCESSOR_CONTROL_BLOCK
 KeGetCurrentProcessorControlBlock(VOID);
 
+XTAPI
+ULONG
+KeGetCurrentProcessorNumber(VOID);
+
 XTAPI
 PKTHREAD
 KeGetCurrentThread(VOID);

xtoskrnl/includes/amd64/mmi.h

@@ -38,4 +38,8 @@ XTAPI
 VOID
 MmpInitializeArchitecture(VOID);
 
+XTAPI
+BOOLEAN
+MmpMemoryExtensionEnabled(VOID);
+
 #endif /* __XTOSKRNL_AMD64_MMI_H */

xtoskrnl/includes/globals.h

@@ -12,17 +12,26 @@
 #include <xtos.h>
 
 
+/* ACPI tables cache list */
+EXTERN LIST_ENTRY HlpAcpiCacheList;
+
+/* ACPI Root System Description Pointer (RSDP) */
+EXTERN PACPI_RSDP HlpAcpiRsdp;
+
+/* ACPI timer information */
+EXTERN ACPI_TIMER_INFO HlpAcpiTimerInfo;
+
 /* Active processors count */
 EXTERN KAFFINITY HlpActiveProcessors;
 
 /* APIC mode */
-EXTERN HAL_APIC_MODE HlpApicMode;
+EXTERN APIC_MODE HlpApicMode;
 
 /* FrameBuffer information */
 EXTERN HAL_FRAMEBUFFER_DATA HlpFrameBufferData;
 
-/* Processors identity table */
-EXTERN HAL_PROCESSOR_IDENTITY HlpProcessorsIdentity[MAXIMUM_PROCESSORS];
+/* System information */
+EXTERN ACPI_SYSTEM_INFO HlpSystemInfo;
 
 /* Pointer to boot loader provided DbgPrint() routine */
 EXTERN VOID (*KeDbgPrint)(IN PWCHAR Format, IN ...);
@@ -42,8 +51,17 @@ EXTERN KSERVICE_DESCRIPTOR_TABLE KeServiceDescriptorTable[KSERVICE_TABLES_COUNT]
 /* Kernel process list */
 EXTERN LIST_ENTRY KepProcessListHead;
 
+/* Kernel system resources list */
+EXTERN LIST_ENTRY KepSystemResourcesListHead;
+
+/* Kernel system resources lock */
+EXTERN KSPIN_LOCK KepSystemResourcesLock;
+
+/* Kernel UBSAN active frame flag */
+EXTERN BOOLEAN KepUbsanActiveFrame;
+
 /* Biggest free memory descriptor */
-EXTERN PLOADER_MEMORY_MAPPING MmFreeDescriptor;
+EXTERN PLOADER_MEMORY_DESCRIPTOR MmFreeDescriptor;
 
 /* Highest physical page number */
 EXTERN ULONG_PTR MmHighestPhysicalPage;
@@ -55,9 +73,24 @@ EXTERN ULONG_PTR MmLowestPhysicalPage;
 EXTERN ULONG MmNumberOfPhysicalPages;
 
 /* Old biggest free memory descriptor */
-EXTERN LOADER_MEMORY_MAPPING MmOldFreeDescriptor;
+EXTERN LOADER_MEMORY_DESCRIPTOR MmOldFreeDescriptor;
 
 /* Page Map Level */
 EXTERN ULONG MmPageMapLevel;
 
+/* Processor structures data (THIS IS A TEMPORARY HACK) */
+EXTERN UCHAR MmProcessorStructuresData[MAXIMUM_PROCESSORS][KPROCESSOR_STRUCTURES_SIZE];
+
+/* Allocation descriptors dedicated for hardware layer */
+EXTERN LOADER_MEMORY_DESCRIPTOR MmpHardwareAllocationDescriptors[MM_HARDWARE_ALLOCATION_DESCRIPTORS];
+
+/* Live address of kernel's hardware heap */
+EXTERN PVOID MmpHardwareHeapStart;
+
+/* Architecture-specific memory extension */
+EXTERN BOOLEAN MmpMemoryExtension;
+
+/* Number of used hardware allocation descriptors */
+EXTERN ULONG MmpUsedHardwareAllocationDescriptors;
+
 #endif /* __XTOSKRNL_GLOBALS_H */

xtoskrnl/includes/hli.h

@@ -11,10 +11,11 @@
 
 #include <xtos.h>
 
+
 /* HAL library routines forward references */
 XTAPI
 VOID
-HlClearScreen(VOID);
+HlClearScreen(IN ULONG Color);
 
 XTCDECL
 XTSTATUS
@@ -39,15 +40,22 @@ HlDrawPixel(IN ULONG PosX,
             IN ULONG PosY,
             IN ULONG Color);
 
+XTAPI
+XTSTATUS
+HlGetAcpiSystemDescriptionPointer(OUT PACPI_RSDP *Rsdp);
+
+XTAPI
+XTSTATUS
+HlGetAcpiTable(IN ULONG Signature,
+               OUT PACPI_DESCRIPTION_HEADER *AcpiTable);
+
 XTFASTCALL
 KRUNLEVEL
 HlGetRunLevel(VOID);
 
-
 XTCDECL
 XTSTATUS
 HlInitializeComPort(IN OUT PCPPORT Port,
-                    IN ULONG PortNumber,
                     IN PUCHAR PortAddress,
                     IN ULONG BaudRate);
 
@@ -55,6 +63,14 @@ XTAPI
 XTSTATUS
 HlInitializeFrameBuffer(VOID);
 
+XTAPI
+VOID
+HlInitializeProcessor(VOID);
+
+XTAPI
+XTSTATUS
+HlInitializeSystem(VOID);
+
 XTAPI
 VOID
 HlPutCharacter(IN ULONG PositionX,
@@ -68,6 +84,49 @@ HlSetRunLevel(IN KRUNLEVEL RunLevel);
 
 XTAPI
 VOID
-HlInitializeProcessor(VOID);
+HlpCacheAcpiTable(IN PACPI_DESCRIPTION_HEADER AcpiTable);
+
+XTAPI
+XTSTATUS
+HlpInitializeAcpi(VOID);
+
+XTAPI
+XTSTATUS
+HlpInitializeAcpiCache(VOID);
+
+XTAPI
+XTSTATUS
+HlpInitializeAcpiSystemDescriptionTable(OUT PACPI_DESCRIPTION_HEADER *AcpiTable);
+
+XTAPI
+XTSTATUS
+HlpInitializeAcpiSystemInformation(VOID);
+
+XTAPI
+XTSTATUS
+HlpInitializeAcpiSystemStructure(VOID);
+
+XTAPI
+XTSTATUS
+HlpInitializeAcpiTimer(VOID);
+
+XTAPI
+XTSTATUS
+HlpQueryAcpiCache(IN ULONG Signature,
+                  OUT PACPI_DESCRIPTION_HEADER *AcpiTable);
+
+XTAPI
+XTSTATUS
+HlpQueryAcpiTables(IN ULONG Signature,
+                   OUT PACPI_DESCRIPTION_HEADER *AcpiTable);
+
+XTAPI
+ULONG
+HlpRGBColor(IN ULONG Color);
+
+XTAPI
+BOOLEAN
+HlpValidateAcpiTable(IN PVOID Buffer,
+                     IN UINT_PTR Size);
 
 #endif /* __XTOSKRNL_HLI_H */

xtoskrnl/includes/i686/ari.h

@@ -25,6 +25,10 @@ XTCDECL
 VOID
 ArFlushTlb(VOID);
 
+XTCDECL
+ULONG
+ArGetCpuFlags(VOID);
+
 XTASSEMBLY
 XTCDECL
 ULONG_PTR
@@ -36,7 +40,11 @@ ArHalt(VOID);
 
 XTAPI
 VOID
-ArInitializeProcessor(VOID);
+ArInitializeProcessor(IN PVOID ProcessorStructures);
+
+XTCDECL
+BOOLEAN
+ArInterruptsEnabled(VOID);
 
 XTCDECL
 VOID
@@ -277,17 +285,29 @@ XTAPI
 VOID
 ArpInitializeProcessorRegisters(VOID);
 
+XTAPI
+VOID
+ArpInitializeProcessorStructures(IN PVOID ProcessorStructures,
+                                 OUT PKGDTENTRY *Gdt,
+                                 OUT PKTSS *Tss,
+                                 OUT PKPROCESSOR_BLOCK *ProcessorBlock,
+                                 OUT PVOID *KernelBootStack,
+                                 OUT PVOID *KernelFaultStack);
+
 XTAPI
 VOID
 ArpInitializeSegments(VOID);
 
 XTAPI
 VOID
-ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock);
+ArpInitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
+                 IN PVOID KernelBootStack,
+                 IN PVOID KernelFaultStack);
 
 XTAPI
 VOID
-ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock);
+ArpSetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
+                          IN PVOID KernelFaultStack);
 
 XTAPI
 VOID
@@ -310,7 +330,8 @@ ArpSetIdtGate(IN PKIDTENTRY Idt,
 
 XTAPI
 VOID
-ArpSetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock);
+ArpSetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
+                                   IN PVOID KernelFaultStack);
 
 XTCDECL
 VOID

xtoskrnl/includes/i686/hli.h

@@ -17,12 +17,8 @@ XTAPI
 VOID
 HlClearApicErrors(VOID);
 
-XTAPI
-VOID
-HlDisableLegacyPic(VOID);
-
 XTFASTCALL
-ULONG
+ULONGLONG
 HlReadApicRegister(IN APIC_REGISTER Register);
 
 XTAPI
@@ -32,12 +28,16 @@ HlSendEoi(VOID);
 XTFASTCALL
 VOID
 HlWriteApicRegister(IN APIC_REGISTER Register,
-                    IN ULONG Value);
+                    IN ULONGLONG Value);
 
 XTAPI
 BOOLEAN
 HlpCheckX2ApicSupport(VOID);
 
+XTAPI
+ULONG
+HlpGetCpuApicId(VOID);
+
 XTCDECL
 VOID
 HlpHandleApicSpuriousService(VOID);
@@ -50,6 +50,19 @@ XTAPI
 VOID
 HlpInitializeApic(VOID);
 
+XTAPI
+VOID
+HlpInitializeLegacyPic(VOID);
+
+XTAPI
+VOID
+HlpInitializePic(VOID);
+
+XTAPI
+VOID
+HlpSendIpi(ULONG ApicId,
+           ULONG Vector);
+
 XTFASTCALL
 KRUNLEVEL
 HlpTransformApicTprToRunLevel(IN UCHAR Tpr);

xtoskrnl/includes/i686/kei.h

@@ -21,6 +21,10 @@ XTAPI
 PKPROCESSOR_CONTROL_BLOCK
 KeGetCurrentProcessorControlBlock(VOID);
 
+XTAPI
+ULONG
+KeGetCurrentProcessorNumber(VOID);
+
 XTAPI
 PKTHREAD
 KeGetCurrentThread(VOID);

xtoskrnl/includes/i686/mmi.h

@@ -12,14 +12,26 @@
 #include <xtos.h>
 
 
-/* I686 Memory Manager routines forward references */
+/* i686 Memory Manager routines forward references */
 XTFASTCALL
 VOID
 MmZeroPages(IN PVOID Address,
             IN ULONG Size);
 
+XTAPI
+PMMPTE
+MmpGetPdeAddress(PVOID Address);
+
+XTAPI
+PMMPTE
+MmpGetPteAddress(PVOID Address);
+
 XTAPI
 VOID
 MmpInitializeArchitecture(VOID);
 
+XTAPI
+BOOLEAN
+MmpMemoryExtensionEnabled(VOID);
+
 #endif /* __XTOSKRNL_I686_MMI_H */

xtoskrnl/includes/kei.h

@@ -86,10 +86,115 @@ XTAPI
 VOID
 KeStartXtSystem(IN PKERNEL_INITIALIZATION_BLOCK Parameters);
 
+XTCDECL
+BOOLEAN
+KepCheckUbsanReport(PKUBSAN_SOURCE_LOCATION Location);
+
+XTCDECL
+VOID
+KepEnterUbsanFrame(PKUBSAN_SOURCE_LOCATION Location,
+                   PCCHAR Reason);
+
 XTFASTCALL
 VOID
 KepExitDispatcher(IN KRUNLEVEL OldRunLevel);
 
+XTCDECL
+LONGLONG
+KepGetSignedUbsanValue(PKUBSAN_TYPE_DESCRIPTOR Type,
+                       PVOID Value);
+
+XTAPI
+XTSTATUS
+KepGetSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
+                     IN BOOLEAN Acquire,
+                     OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader);
+
+XTCDECL
+PCCHAR
+KepGetUbsanTypeKind(UCHAR TypeCheckKind);
+
+XTCDECL
+ULONGLONG
+KepGetUnsignedUbsanValue(PKUBSAN_TYPE_DESCRIPTOR Type,
+                         PVOID Value);
+
+XTCDECL
+VOID
+KepHandleUbsanDivisionOverflow(PKUBSAN_OVERFLOW_DATA Data,
+                               PVOID Lhs,
+                               PVOID Rhs);
+
+XTCDECL
+VOID
+KepHandleUbsanFloatCastOverflow(PKUBSAN_FLOAT_CAST_OVERFLOW_DATA Data,
+                                ULONG_PTR Lhs,
+                                ULONG_PTR Rhs);
+
+XTCDECL
+VOID
+KepHandleUbsanFunctionTypeMismatch(PKUBSAN_FUNCTION_TYPE_MISMATCH_DATA Data,
+                                   ULONG_PTR Pointer);
+
+XTCDECL
+VOID
+KepHandleUbsanIntegerOverflow(PKUBSAN_OVERFLOW_DATA Data,
+                                 ULONG_PTR Lhs,
+                                 ULONG_PTR Rhs);
+
+XTCDECL
+VOID
+KepHandleUbsanInvalidBuiltin(PKUBSAN_INVALID_BUILTIN_DATA Data);
+
+XTCDECL
+VOID
+KepHandleUbsanMisalignedAccess(PKUBSAN_TYPE_MISMATCH_DATA Data,
+                               ULONG_PTR Pointer);
+
+XTCDECL
+VOID
+KepHandleUbsanNegateOverflow(PKUBSAN_OVERFLOW_DATA Data,
+                             ULONG_PTR OldValue);
+
+XTCDECL
+VOID
+KepHandleUbsanNullPointerDereference(PKUBSAN_TYPE_MISMATCH_DATA Data);
+
+XTCDECL
+VOID
+KepHandleUbsanObjectSizeMismatch(PKUBSAN_TYPE_MISMATCH_DATA Data,
+                                 ULONG_PTR Pointer);
+
+XTCDECL
+VOID
+KepHandleUbsanOutOfBounds(PKUBSAN_OUT_OF_BOUNDS_DATA Data,
+                          ULONG_PTR Index);
+
+XTCDECL
+VOID
+KepHandleUbsanPointerOverflow(PKUBSAN_OVERFLOW_DATA Data,
+                              ULONG_PTR Lhs,
+                              ULONG_PTR Rhs);
+
+XTCDECL
+VOID
+KepHandleUbsanShiftOutOfBounds(PKUBSAN_SHIFT_OUT_OF_BOUNDS_DATA Data,
+                               ULONG_PTR Lhs,
+                               ULONG_PTR Rhs);
+
+XTCDECL
+VOID
+KepHandleUbsanTypeMismatch(PKUBSAN_TYPE_MISMATCH_DATA Data,
+                           ULONG_PTR Pointer);
+
+XTAPI
+VOID
+KepInitializeSystemResources(VOID);
+
+XTCDECL
+VOID
+KepLeaveUbsanFrame();
+
 XTAPI
 VOID
 KepRemoveTimer(IN OUT PKTIMER Timer);

xtoskrnl/includes/mmi.h

@@ -13,21 +13,64 @@
 
 
 /* Memory Manager routines forward references */
+XTAPI
+XTSTATUS
+MmAllocateHardwareMemory(IN PFN_NUMBER PageCount,
+                         IN BOOLEAN Aligned,
+                         OUT PPHYSICAL_ADDRESS Buffer);
+
 XTAPI
 XTSTATUS
 MmAllocateKernelStack(IN PVOID *Stack,
                       IN BOOLEAN LargeStack,
                       IN UCHAR SystemNode);
 
+XTAPI
+XTSTATUS
+MmAllocateProcessorStructures(IN ULONG CpuNumber,
+                              OUT PVOID *StructuresData);
+
+XTAPI
+VOID
+MmFlushTlb(VOID);
+
 XTAPI
 VOID
 MmFreeKernelStack(IN PVOID Stack,
                   IN BOOLEAN LargeStack);
 
+XTAPI
+VOID
+MmFreeProcessorStructures(IN PVOID StructuresData);
+
 XTAPI
 VOID
 MmInitializeMemoryManager(VOID);
 
+XTAPI
+XTSTATUS
+MmMapHardwareMemory(IN PHYSICAL_ADDRESS PhysicalAddress,
+                    IN PFN_NUMBER PageCount,
+                    IN BOOLEAN FlushTlb,
+                    OUT PVOID *VirtualAddress);
+
+XTAPI
+VOID
+MmMarkHardwareMemoryWriteThrough(IN PVOID VirtualAddress,
+                                 IN PFN_NUMBER PageCount);
+
+XTAPI
+VOID
+MmRemapHardwareMemory(IN PVOID VirtualAddress,
+                      IN PHYSICAL_ADDRESS PhysicalAddress,
+                      IN BOOLEAN FlushTlb);
+
+XTAPI
+XTSTATUS
+MmUnmapHardwareMemory(IN PVOID VirtualAddress,
+                      IN PFN_NUMBER PageCount,
+                      IN BOOLEAN FlushTlb);
+
 XTAPI
 VOID
 MmpScanMemoryDescriptors(VOID);

xtoskrnl/ke/amd64/krnlinit.c

@@ -19,6 +19,51 @@
 XTAPI
 VOID
 KepInitializeKernel(VOID)
+{
+    XTSTATUS Status;
+
+    /* Initialize hardware layer subsystem */
+    Status = HlInitializeSystem();
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Hardware layer initialization failed, kernel panic */
+        DebugPrint(L"Failed to initialize hardware layer subsystem!\n");
+        KePanic(0);
+    }
+}
+
+/**
+ * Performs architecture-specific initialization for the kernel executive.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+KepInitializeMachine(VOID)
+{
+    /* Re-enable IDE interrupts */
+    HlIoPortOutByte(0x376, 0);
+    HlIoPortOutByte(0x3F6, 0);
+
+    /* Initialize frame buffer */
+    HlInitializeFrameBuffer();
+
+    /* Initialize processor */
+    HlInitializeProcessor();
+}
+
+/**
+ * This routine starts up the XT kernel. It is called after switching boot stack.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+KepStartKernel(VOID)
 {
     PKPROCESSOR_CONTROL_BLOCK Prcb;
     ULONG_PTR PageDirectory[2];
@@ -41,6 +86,9 @@ KepInitializeKernel(VOID)
     /* Lower to APC runlevel */
     KeLowerRunLevel(APC_LEVEL);
 
+    /* Initialize XTOS kernel */
+    KepInitializeKernel();
+
     /* Initialize Idle process */
     RtlInitializeListHead(&KepProcessListHead);
     PageDirectory[0] = 0;
@@ -50,52 +98,12 @@ KepInitializeKernel(VOID)
 
     /* Initialize Idle thread */
     KeInitializeThread(CurrentProcess, CurrentThread, NULL, NULL, NULL, NULL, NULL, ArKernelBootStack, TRUE);
-    CurrentThread->NextProcessor = Prcb->Number;
+    CurrentThread->NextProcessor = Prcb->CpuNumber;
     CurrentThread->Priority = THREAD_HIGH_PRIORITY;
     CurrentThread->State = Running;
-    CurrentThread->Affinity = (ULONG_PTR)1 << Prcb->Number;
+    CurrentThread->Affinity = (ULONG_PTR)1 << Prcb->CpuNumber;
     CurrentThread->WaitRunLevel = DISPATCH_LEVEL;
-    CurrentProcess->ActiveProcessors |= (ULONG_PTR)1 << Prcb->Number;
-}
-
-/**
- * Performs architecture-specific initialization for the kernel executive.
- *
- * @return This routine does not return any value.
- *
- * @since XT 1.0
- */
-XTAPI
-VOID
-KepInitializeMachine(VOID)
-{
-    /* Re-enable IDE interrupts */
-    HlIoPortOutByte(0x376, 0);
-    HlIoPortOutByte(0x3F6, 0);
-
-    /* Disable the legacy PIC */
-    HlDisableLegacyPic();
-
-    /* Initialize frame buffer */
-    HlInitializeFrameBuffer();
-
-    /* Initialize processor */
-    HlInitializeProcessor();
-}
-
-/**
- * This routine starts up the XT kernel. It is called after switching boot stack.
- *
- * @return This routine does not return any value.
- *
- * @since XT 1.0
- */
-XTAPI
-VOID
-KepStartKernel(VOID)
-{
-    /* Initialize XTOS kernel */
-    KepInitializeKernel();
+    CurrentProcess->ActiveProcessors |= (ULONG_PTR)1 << Prcb->CpuNumber;
 
     /* Enter infinite loop */
     DebugPrint(L"KepStartKernel() finished. Entering infinite loop.\n");

xtoskrnl/ke/amd64/proc.c

@@ -38,6 +38,20 @@ KeGetCurrentProcessorControlBlock(VOID)
     return (PKPROCESSOR_CONTROL_BLOCK)ArReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CurrentPrcb));
 }
 
+/**
+ * Gets the number of the currently executing processor.
+ *
+ * @return This routine returns the zero-indexed processor number.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+ULONG
+KeGetCurrentProcessorNumber(VOID)
+{
+    return (ULONG)ArReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CpuNumber));
+}
+
 /**
  * Gets the current thread running on the currently executing processor.
  *

xtoskrnl/ke/globals.c

@@ -26,3 +26,12 @@ KSERVICE_DESCRIPTOR_TABLE KeServiceDescriptorTable[KSERVICE_TABLES_COUNT];
 
 /* Kernel process list */
 LIST_ENTRY KepProcessListHead;
+
+/* Kernel system resources list */
+LIST_ENTRY KepSystemResourcesListHead;
+
+/* Kernel system resources lock */
+KSPIN_LOCK KepSystemResourcesLock;
+
+/* Kernel UBSAN active frame flag */
+BOOLEAN KepUbsanActiveFrame = FALSE;

xtoskrnl/ke/i686/krnlinit.c

@@ -19,6 +19,51 @@
 XTAPI
 VOID
 KepInitializeKernel(VOID)
+{
+    XTSTATUS Status;
+
+    /* Initialize hardware layer subsystem */
+    Status = HlInitializeSystem();
+    if(Status != STATUS_SUCCESS)
+    {
+        /* Hardware layer initialization failed, kernel panic */
+        DebugPrint(L"Failed to initialize hardware layer subsystem!\n");
+        KePanic(0);
+    }
+}
+
+/**
+ * Performs architecture-specific initialization for the kernel executive.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+KepInitializeMachine(VOID)
+{
+    /* Re-enable IDE interrupts */
+    HlIoPortOutByte(0x376, 0);
+    HlIoPortOutByte(0x3F6, 0);
+
+    /* Initialize frame buffer */
+    HlInitializeFrameBuffer();
+
+    /* Initialize processor */
+    HlInitializeProcessor();
+}
+
+/**
+ * This routine starts up the XT kernel. It is called after switching boot stack.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+KepStartKernel(VOID)
 {
     PKPROCESSOR_CONTROL_BLOCK Prcb;
     ULONG_PTR PageDirectory[2];
@@ -41,6 +86,9 @@ KepInitializeKernel(VOID)
     /* Lower to APC runlevel */
     KeLowerRunLevel(APC_LEVEL);
 
+    /* Initialize XTOS kernel */
+    KepInitializeKernel();
+
     /* Initialize Idle process */
     RtlInitializeListHead(&KepProcessListHead);
     PageDirectory[0] = 0;
@@ -50,52 +98,12 @@ KepInitializeKernel(VOID)
 
     /* Initialize Idle thread */
     KeInitializeThread(CurrentProcess, CurrentThread, NULL, NULL, NULL, NULL, NULL, ArKernelBootStack, TRUE);
-    CurrentThread->NextProcessor = Prcb->Number;
+    CurrentThread->NextProcessor = Prcb->CpuNumber;
     CurrentThread->Priority = THREAD_HIGH_PRIORITY;
     CurrentThread->State = Running;
-    CurrentThread->Affinity = (ULONG_PTR)1 << Prcb->Number;
+    CurrentThread->Affinity = (ULONG_PTR)1 << Prcb->CpuNumber;
     CurrentThread->WaitRunLevel = DISPATCH_LEVEL;
-    CurrentProcess->ActiveProcessors |= (ULONG_PTR)1 << Prcb->Number;
-}
-
-/**
- * Performs architecture-specific initialization for the kernel executive.
- *
- * @return This routine does not return any value.
- *
- * @since XT 1.0
- */
-XTAPI
-VOID
-KepInitializeMachine(VOID)
-{
-    /* Re-enable IDE interrupts */
-    HlIoPortOutByte(0x376, 0);
-    HlIoPortOutByte(0x3F6, 0);
-
-    /* Disable the legacy PIC */
-    HlDisableLegacyPic();
-
-    /* Initialize frame buffer */
-    HlInitializeFrameBuffer();
-
-    /* Initialize processor */
-    HlInitializeProcessor();
-}
-
-/**
- * This routine starts up the XT kernel. It is called after switching boot stack.
- *
- * @return This routine does not return any value.
- *
- * @since XT 1.0
- */
-XTAPI
-VOID
-KepStartKernel(VOID)
-{
-    /* Initialize XTOS kernel */
-    KepInitializeKernel();
+    CurrentProcess->ActiveProcessors |= (ULONG_PTR)1 << Prcb->CpuNumber;
 
     /* Enter infinite loop */
     DebugPrint(L"KepStartKernel() finished. Entering infinite loop.\n");

xtoskrnl/ke/i686/proc.c

@@ -38,6 +38,20 @@ KeGetCurrentProcessorControlBlock(VOID)
     return (PKPROCESSOR_CONTROL_BLOCK)ArReadFSDualWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CurrentPrcb));
 }
 
+/**
+ * Gets the number of the currently executing processor.
+ *
+ * @return This routine returns the zero-indexed processor number.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+ULONG
+KeGetCurrentProcessorNumber(VOID)
+{
+    return (ULONG)ArReadFSDualWord(FIELD_OFFSET(KPROCESSOR_BLOCK, CpuNumber));
+}
+
 /**
  * Gets the current thread running on the currently executing processor.
  *

xtoskrnl/ke/krnlinit.c

@@ -49,7 +49,10 @@ KeStartXtSystem(IN PKERNEL_INITIALIZATION_BLOCK Parameters)
                XTOS_COMPILER_NAME, XTOS_COMPILER_VERSION);
 
     /* Initialize boot CPU */
-    ArInitializeProcessor();
+    ArInitializeProcessor(NULL);
+
+    /* Initialize system resources */
+    KepInitializeSystemResources();
 
     /* Architecture specific kernel initialization */
     KepInitializeMachine();

xtoskrnl/ke/sysres.c

@@ -0,0 +1,233 @@
+/**
+ * PROJECT:         ExectOS
+ * COPYRIGHT:       See COPYING.md in the top level directory
+ * FILE:            xtoskrnl/ke/sysres.c
+ * DESCRIPTION:     System resources management; This code is based on the MinocaOS implementation
+ *                  Copyright(C) 2012 Minoca Corp. (https://github.com/minoca/os/blob/master/kernel/ke/sysres.c)
+ * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
+ */
+
+#include <xtos.h>
+
+
+/**
+ * Looks for an unacquired system resource of the specified type and acquires it.
+ *
+ * @param ResourceType
+ *        Supplies system resource type.
+ *
+ * @param ResourceHeader
+ *        Specifies a memory area where a pointer to the system resource header will be stored.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+KeAcquireSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
+                        OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader)
+{
+    /* Get system resource and acquire an ownership */
+    return KepGetSystemResource(ResourceType, TRUE, ResourceHeader);
+}
+
+/**
+ * Looks for an unacquired system resource of the specified type and returns it without acquiring an ownership.
+ *
+ * @param ResourceType
+ *        Supplies system resource type.
+ *
+ * @param ResourceHeader
+ *        Specifies a memory area where a pointer to the system resource header will be stored.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+KeGetSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
+                    OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader)
+{
+    /* Get system resource without acquiring an ownership */
+    return KepGetSystemResource(ResourceType, FALSE, ResourceHeader);
+}
+
+/**
+ * Releases system resource.
+ *
+ * @param ResourceHeader
+ *        Specifies a pointer to the system resource header.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+KeReleaseSystemResource(IN PSYSTEM_RESOURCE_HEADER ResourceHeader)
+{
+    /* Disable interrupts and acquire a spinlock */
+    ArClearInterruptFlag();
+    KeAcquireSpinLock(&KepSystemResourcesLock);
+
+    /* Release resource lock */
+    ResourceHeader->ResourceLocked = FALSE;
+
+    /* Release spinlock and enable interrupts */
+    KeReleaseSpinLock(&KepSystemResourcesLock);
+    ArSetInterruptFlag();
+}
+
+/**
+ * Looks for an unacquired system resource of the specified type.
+ *
+ * @param ResourceType
+ *        Supplies system resource type.
+ *
+ * @param Acquire
+ *        Specifies whether system resource should be acquired or not.
+ *
+ * @param ResourceHeader
+ *        Specifies a memory area where a pointer to the system resource header will be stored.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+KepGetSystemResource(IN SYSTEM_RESOURCE_TYPE ResourceType,
+                     IN BOOLEAN ResourceLock,
+                     OUT PSYSTEM_RESOURCE_HEADER *ResourceHeader)
+{
+    PSYSTEM_RESOURCE_HEADER Resource;
+    PLIST_ENTRY ListEntry;
+    BOOLEAN Interrupts;
+    XTSTATUS Status;
+
+    /* Assume resource found successfully */
+    Status = STATUS_SUCCESS;
+
+    /* Check if interrupts are enabled */
+    Interrupts = ArInterruptsEnabled();
+
+    /* Disable interrupts and acquire a spinlock */
+    ArClearInterruptFlag();
+    KeAcquireSpinLock(&KepSystemResourcesLock);
+
+    /* Iterate through system resources list */
+    ListEntry = KepSystemResourcesListHead.Flink;
+    while(ListEntry != &KepSystemResourcesListHead)
+    {
+        /* Get resource header */
+        Resource = CONTAIN_RECORD(ListEntry, SYSTEM_RESOURCE_HEADER, ListEntry);
+
+        /* Check if resource type matches */
+        if(Resource->ResourceType == ResourceType)
+        {
+            /* Check if resource is locked */
+            if(Resource->ResourceLocked)
+            {
+                /* Resource locked, set status code and stop browsing a list */
+                Status = STATUS_RESOURCE_LOCKED;
+                break;
+            }
+
+            /* Check if resource lock should be acquired */
+            if(ResourceLock)
+            {
+                /* Acquire resource lock */
+                Resource->ResourceLocked = TRUE;
+            }
+
+            /* Stop browsing a list */
+            break;
+        }
+
+        /* Go to the next list entry */
+        ListEntry = ListEntry->Flink;
+    }
+
+    /* Check if resource was found */
+    if(ListEntry == &KepSystemResourcesListHead)
+    {
+        /* Resource not found, return NULL */
+        Resource = NULL;
+        Status = STATUS_NOT_FOUND;
+    }
+
+    /* Release spinlock and re-enable interrupts if necessary */
+    KeReleaseSpinLock(&KepSystemResourcesLock);
+    if(Interrupts)
+    {
+        /* Re-enable interrupts */
+        ArSetInterruptFlag();
+    }
+
+    /* Return resource header and status code */
+    *ResourceHeader = Resource;
+    return Status;
+}
+
+/**
+ * Initializes system resource management.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+KepInitializeSystemResources(VOID)
+{
+    PSYSTEM_RESOURCE_HEADER ResourceHeader;
+    PLIST_ENTRY ListEntry, NextListEntry;
+    ULONG ResourceSize;
+
+    /* Initialize system resources spin lock and resource list */
+    KeInitializeSpinLock(&KepSystemResourcesLock);
+    RtlInitializeListHead(&KepSystemResourcesListHead);
+
+    /* Make sure there are some system resources available */
+    if(!RtlListEmpty(&KeInitializationBlock->SystemResourcesListHead))
+    {
+        /* Iterate through system resources list */
+        ListEntry = KeInitializationBlock->SystemResourcesListHead.Flink;
+        while(ListEntry != &KeInitializationBlock->SystemResourcesListHead)
+        {
+            /* Get resource header and next list entry */
+            ResourceHeader = CONTAIN_RECORD(ListEntry, SYSTEM_RESOURCE_HEADER, ListEntry);
+            NextListEntry = ListEntry->Flink;
+
+            /* Basic resource type validation */
+            switch(ResourceHeader->ResourceType)
+            {
+                case SystemResourceAcpi:
+                    /* ACPI system resource */
+                    ResourceSize = sizeof(SYSTEM_RESOURCE_ACPI);
+                    break;
+                case SystemResourceFrameBuffer:
+                    /* FrameBuffer system resource */
+                    ResourceSize = sizeof(SYSTEM_RESOURCE_FRAMEBUFFER);
+                    break;
+                default:
+                    /* Unknown system resource type, skip it */
+                    ResourceSize = 0;
+                    break;
+            }
+
+            /* Validate resource size */
+            if(ResourceSize != 0 && ResourceSize == ResourceHeader->ResourceSize)
+            {
+                /* Move valid resource to the internal kernel list of system resources */
+                RtlRemoveEntryList(&ResourceHeader->ListEntry);
+                RtlInsertTailList(&KepSystemResourcesListHead, &ResourceHeader->ListEntry);
+            }
+
+            /* Go to the next list entry */
+            ListEntry = NextListEntry;
+        }
+    }
+}

xtoskrnl/mm/amd64/init.c

@@ -102,3 +102,18 @@ MmpInitializeArchitecture(VOID)
 {
     UNIMPLEMENTED;
 }
+
+/**
+ * Checks if LA57 (PML5) is enabled.
+ *
+ * @return This routine returns TRUE if LA57 is enabled, or FALSE otherwise.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+BOOLEAN
+MmpMemoryExtensionEnabled(VOID)
+{
+    /* Check if LA57 (PML5) is enabled */
+    return ((ArReadControlRegister(4) & CR4_LA57) != 0) ? TRUE : FALSE;
+}

xtoskrnl/mm/globals.c

@@ -10,7 +10,7 @@
 
 
 /* Biggest free memory descriptor */
-PLOADER_MEMORY_MAPPING MmFreeDescriptor;
+PLOADER_MEMORY_DESCRIPTOR MmFreeDescriptor;
 
 /* Highest physical page number */
 ULONG_PTR MmHighestPhysicalPage;
@@ -22,7 +22,22 @@ ULONG_PTR MmLowestPhysicalPage = -1;
 ULONG MmNumberOfPhysicalPages;
 
 /* Old biggest free memory descriptor */
-LOADER_MEMORY_MAPPING MmOldFreeDescriptor;
+LOADER_MEMORY_DESCRIPTOR MmOldFreeDescriptor;
 
 /* Page Map Level */
 ULONG MmPageMapLevel;
+
+/* Processor structures data (THIS IS A TEMPORARY HACK) */
+UCHAR MmProcessorStructuresData[MAXIMUM_PROCESSORS][KPROCESSOR_STRUCTURES_SIZE] = {0};
+
+/* Allocation descriptors dedicated for hardware layer */
+LOADER_MEMORY_DESCRIPTOR MmpHardwareAllocationDescriptors[MM_HARDWARE_ALLOCATION_DESCRIPTORS];
+
+/* Live address of kernel's hardware heap */
+PVOID MmpHardwareHeapStart = MM_HARDWARE_HEAP_START_ADDRESS;
+
+/* Architecture-specific memory extension */
+BOOLEAN MmpMemoryExtension;
+
+/* Number of used hardware allocation descriptors */
+ULONG MmpUsedHardwareAllocationDescriptors = 0;

xtoskrnl/mm/hlpool.c

@@ -0,0 +1,383 @@
+/**
+ * PROJECT:         ExectOS
+ * COPYRIGHT:       See COPYING.md in the top level directory
+ * FILE:            xtoskrnl/mm/hlpool.c
+ * DESCRIPTION:     Hardware layer pool memory management
+ * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
+ */
+
+#include <xtos.h>
+
+
+/**
+ * Allocates physical memory for kernel hardware layer before memory manager gets initialized.
+ *
+ * @param PageCount
+ *        Supplies the number of pages to be allocated.
+ *
+ * @param Aligned
+ *        Specifies whether allocated memory should be aligned to 64k boundary or not.
+ *
+ * @param Buffer
+ *        Supplies a buffer that receives the physical address.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+MmAllocateHardwareMemory(IN PFN_NUMBER PageCount,
+                         IN BOOLEAN Aligned,
+                         OUT PPHYSICAL_ADDRESS Buffer)
+{
+    PLOADER_MEMORY_DESCRIPTOR Descriptor, ExtraDescriptor, HardwareDescriptor;
+    PFN_NUMBER Alignment, MaxPage;
+    ULONGLONG PhysicalAddress;
+    PLIST_ENTRY ListEntry;
+
+    /* Assume failure */
+    (*Buffer).QuadPart = 0;
+
+    /* Calculate maximum page address */
+    MaxPage = MM_MAXIMUM_PHYSICAL_ADDRESS >> MM_PAGE_SHIFT;
+
+    /* Make sure there are at least 2 descriptors available */
+    if((MmpUsedHardwareAllocationDescriptors + 2) > MM_HARDWARE_ALLOCATION_DESCRIPTORS)
+    {
+        /* Not enough descriptors, return error */
+        return STATUS_INSUFFICIENT_RESOURCES;
+    }
+
+    /* Scan memory descriptors provided by the boot loader */
+    ListEntry = KeInitializationBlock->MemoryDescriptorListHead.Flink;
+    while(ListEntry != &KeInitializationBlock->MemoryDescriptorListHead)
+    {
+        Descriptor = CONTAIN_RECORD(ListEntry, LOADER_MEMORY_DESCRIPTOR, ListEntry);
+
+        /* Align memory to 64KB if needed */
+        Alignment = Aligned ? (((Descriptor->BasePage + 0x0F) & ~0x0F) - Descriptor->BasePage) : 0;
+
+        /* Ensure that memory type is free for this descriptor */
+        if(Descriptor->MemoryType == LoaderFree)
+        {
+            /* Check if descriptor is big enough and if it fits under the maximum physical address */
+            if(Descriptor->BasePage &&
+               ((Descriptor->BasePage + PageCount + Alignment) < MaxPage) &&
+               (Descriptor->PageCount >= (PageCount + Alignment)))
+            {
+                /* Set physical address */
+                PhysicalAddress = (Descriptor->BasePage + Alignment) << MM_PAGE_SHIFT;
+                break;
+            }
+        }
+
+        /* Move to next descriptor */
+        ListEntry = ListEntry->Flink;
+    }
+
+    /* Make sure we found a descriptor */
+    if(ListEntry == &KeInitializationBlock->MemoryDescriptorListHead)
+    {
+        /* Descriptor not found, return error */
+        return STATUS_INSUFFICIENT_RESOURCES;
+    }
+
+    /* Allocate new descriptor */
+    HardwareDescriptor = &MmpHardwareAllocationDescriptors[MmpUsedHardwareAllocationDescriptors];
+    HardwareDescriptor->BasePage = Descriptor->BasePage + Alignment;
+    HardwareDescriptor->MemoryType = LoaderHardwareCachedMemory;
+    HardwareDescriptor->PageCount = PageCount;
+
+    /* Update hardware allocation descriptors count */
+    MmpUsedHardwareAllocationDescriptors++;
+
+    /* Check if alignment was done */
+    if(Alignment)
+    {
+        /* Check if extra descriptor is needed to describe the allocation */
+        if(Descriptor->PageCount > (PageCount + Alignment))
+        {
+            /* Initialize extra descriptor */
+            ExtraDescriptor = &MmpHardwareAllocationDescriptors[MmpUsedHardwareAllocationDescriptors];
+            ExtraDescriptor->BasePage = Descriptor->BasePage + Alignment + (ULONG)PageCount;
+            ExtraDescriptor->MemoryType = LoaderFree;
+            ExtraDescriptor->PageCount = Descriptor->PageCount - (Alignment + (ULONG)PageCount);
+
+            /* Update hardware allocation descriptors count */
+            MmpUsedHardwareAllocationDescriptors++;
+
+            /* Insert extra descriptor in the list */
+            RtlInsertHeadList(&Descriptor->ListEntry, &ExtraDescriptor->ListEntry);
+        }
+
+        /* Trim source descriptor to the alignment */
+        Descriptor->PageCount = Alignment;
+
+        /* Insert new descriptor in the list */
+        RtlInsertHeadList(&Descriptor->ListEntry, &HardwareDescriptor->ListEntry);
+    }
+    else
+    {
+        /* Consume pages from the source descriptor */
+        Descriptor->BasePage += (ULONG)PageCount;
+        Descriptor->PageCount -= (ULONG)PageCount;
+
+        /* Insert new descriptor in the list */
+        RtlInsertTailList(&Descriptor->ListEntry, &HardwareDescriptor->ListEntry);
+
+        /* Check if source descriptor is fully consumed */
+        if(Descriptor->PageCount == 0)
+        {
+            /* Remove descriptor from the list */
+            RtlRemoveEntryList(&Descriptor->ListEntry);
+        }
+    }
+
+    /* Return physical address */
+    (*Buffer).QuadPart = PhysicalAddress;
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Maps physical address to the virtual memory area used by kernel hardware layer.
+ *
+ * @param PhysicalAddress
+ *        Supplies the physical address to map.
+ *
+ * @param PageCount
+ *        Supplies the number of pages to be mapped.
+ *
+ * @param FlushTlb
+ *        Specifies whether to flush the TLB or not.
+ *
+ * @param VirtualAddress
+ *        Supplies a buffer that receives the virtual address of the mapped pages.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+MmMapHardwareMemory(IN PHYSICAL_ADDRESS PhysicalAddress,
+                    IN PFN_NUMBER PageCount,
+                    IN BOOLEAN FlushTlb,
+                    OUT PVOID *VirtualAddress)
+{
+    PVOID BaseAddress, ReturnAddress;
+    PFN_NUMBER MappedPages;
+    PHARDWARE_PTE PtePointer;
+
+    /* Initialize variables */
+    BaseAddress = MmpHardwareHeapStart;
+    MappedPages = 0;
+    ReturnAddress = BaseAddress;
+    *VirtualAddress = NULL;
+
+    /* Iterate through all pages */
+    while(MappedPages < PageCount)
+    {
+        /* Check if address overflows */
+        if(BaseAddress == NULL)
+        {
+            /* Not enough free pages, return error */
+            return STATUS_INSUFFICIENT_RESOURCES;
+        }
+
+        /* Get PTE pointer and advance to next page */
+        PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(ReturnAddress);
+        ReturnAddress = (PVOID)(ULONG_PTR)ReturnAddress + MM_PAGE_SIZE;
+
+        /* Check if PTE is valid */
+        if(PtePointer->Valid)
+        {
+            /* PTE is not available, go to the next one */
+            BaseAddress = ReturnAddress;
+            MappedPages = 0;
+            continue;
+        }
+
+        /* Increase number of mapped pages */
+        MappedPages++;
+    }
+
+    /* Take the actual base address with an offset */
+    ReturnAddress = (PVOID)(ULONG_PTR)(BaseAddress + PAGE_OFFSET(PhysicalAddress.LowPart));
+
+    /* Check if base address starts at the beginning of the heap */
+    if(BaseAddress == MmpHardwareHeapStart)
+    {
+        /* Move heap beyond base address */
+        MmpHardwareHeapStart = (PVOID)((ULONG_PTR)BaseAddress + ((ULONG_PTR)PageCount << MM_PAGE_SHIFT));
+    }
+
+    /* Iterate through mapped pages */
+    while(MappedPages--)
+    {
+        /* Get PTE pointer */
+        PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(BaseAddress);
+
+        /* Fill the PTE */
+        PtePointer->PageFrameNumber = (PFN_NUMBER)(PhysicalAddress.QuadPart >> MM_PAGE_SHIFT);
+        PtePointer->Valid = 1;
+        PtePointer->Writable = 1;
+
+        /* Advance to the next address */
+        PhysicalAddress.QuadPart += MM_PAGE_SIZE;
+        BaseAddress = (PVOID)((ULONG_PTR)BaseAddress + MM_PAGE_SIZE);
+    }
+
+    /* Check if TLB needs to be flushed */
+    if(FlushTlb)
+    {
+        /* Flush the TLB */
+        MmFlushTlb();
+    }
+
+    /* Return virtual address */
+    *VirtualAddress = ReturnAddress;
+    return STATUS_SUCCESS;
+}
+
+/**
+ * Marks existing mapping as CD/WT to avoid delays in write-back cache.
+ *
+ * @param VirtualAddress
+ *        Supplies the virtual address region to mark as CD/WT.
+ *
+ * @param PageCount
+ *        Supplies the number of mapped pages.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MmMarkHardwareMemoryWriteThrough(IN PVOID VirtualAddress,
+                                 IN PFN_NUMBER PageCount)
+{
+    PHARDWARE_PTE PtePointer;
+    PFN_NUMBER Page;
+
+    /* Get PTE address from virtual address */
+    PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(VirtualAddress);
+
+    /* Iterate through mapped pages */
+    for(Page = 0; Page < PageCount; Page++)
+    {
+        /* Mark pages as CD/WT */
+        PtePointer->CacheDisable = 1;
+        PtePointer->WriteThrough = 1;
+        PtePointer++;
+    }
+}
+
+/**
+ * Remaps the PTE to new physical address.
+ *
+ * @param VirtualAddress
+ *        Supplies the virtual address to remap.
+ *
+ * @param PhysicalAddress
+ *        Supplies a new physical address.
+ *
+ * @param FlushTlb
+ *        Specifies whether to flush the TLB or not.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MmRemapHardwareMemory(IN PVOID VirtualAddress,
+                      IN PHYSICAL_ADDRESS PhysicalAddress,
+                      IN BOOLEAN FlushTlb)
+{
+    PHARDWARE_PTE PtePointer;
+
+    /* Get PTE address from virtual address */
+    PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(VirtualAddress);
+
+    /* Remap the PTE */
+    PtePointer->PageFrameNumber = (PFN_NUMBER)(PhysicalAddress.QuadPart >> MM_PAGE_SHIFT);
+    PtePointer->Valid = 1;
+    PtePointer->Writable = 1;
+
+    /* Check if TLB needs to be flushed */
+    if(FlushTlb)
+    {
+        /* Flush the TLB */
+        MmFlushTlb();
+    }
+}
+
+/**
+ * Unmaps a Page Table Entry corresponding to the given virtual address.
+ *
+ * @param VirtualAddress
+ *        Supplies the virtual address to unmap.
+ *
+ * @param PageCount
+ *        Supplies the number of mapped pages.
+ *
+ * @param FlushTlb
+ *        Specifies whether to flush the TLB or not.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+MmUnmapHardwareMemory(IN PVOID VirtualAddress,
+                      IN PFN_NUMBER PageCount,
+                      IN BOOLEAN FlushTlb)
+{
+    PHARDWARE_PTE PtePointer;
+    PFN_NUMBER Page;
+
+    /* Check if address is valid hardware memory */
+    if(VirtualAddress < (PVOID)MM_HARDWARE_VA_START)
+    {
+        /* Invalid address, return error */
+        return STATUS_INVALID_PARAMETER;
+    }
+
+    /* Align virtual address down to page boundary */
+    VirtualAddress = (PVOID)((ULONG_PTR)VirtualAddress & ~(MM_PAGE_SIZE - 1));
+
+    /* Get PTE address from virtual address */
+    PtePointer = (PHARDWARE_PTE)MmpGetPteAddress(VirtualAddress);
+
+    /* Iterate through mapped pages */
+    for(Page = 0; Page < PageCount; Page++)
+    {
+        /* Unmap the PTE and get the next one */
+        PtePointer->CacheDisable = 0;
+        PtePointer->Valid = 0;
+        PtePointer->Writable = 0;
+        PtePointer->WriteThrough = 0;
+        PtePointer->PageFrameNumber = 0;
+        PtePointer++;
+    }
+
+    /* Check if TLB needs to be flushed */
+    if(FlushTlb)
+    {
+        /* Flush the TLB */
+        MmFlushTlb();
+    }
+
+    /* Check if heap can be reused */
+    if(MmpHardwareHeapStart > VirtualAddress)
+    {
+        /* Free VA space */
+        MmpHardwareHeapStart = VirtualAddress;
+    }
+
+    /* Return success */
+    return STATUS_SUCCESS;
+}

xtoskrnl/mm/i686/init.c

@@ -9,6 +9,48 @@
 #include <xtos.h>
 
 
+/**
+ * Gets the address of the PDE (Page Directory Entry), that maps given address.
+ *
+ * @param Address
+ *        Specifies the address to find the PDE for.
+ *
+ * @return This routine returns the address of the PDE.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+PMMPTE
+MmpGetPdeAddress(PVOID Address)
+{
+    ULONG Offset;
+
+    /* Calculate offset and return PTE address */
+    Offset = ((((ULONG)(Address)) >> MM_PDI_SHIFT) << MM_PTE_SHIFT);
+    return (PMMPTE)(MM_PDE_BASE + Offset);
+}
+
+/**
+ * Gets the address of the PTE (Page Table Entry), that maps given address.
+ *
+ * @param Address
+ *        Specifies the address to find the PTE for.
+ *
+ * @return This routine returns the address of the PTE.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+PMMPTE
+MmpGetPteAddress(PVOID Address)
+{
+    ULONG Offset;
+
+    /* Calculate offset and return PTE address */
+    Offset = ((((ULONG)(Address)) >> MM_PTI_SHIFT) << MM_PTE_SHIFT);
+    return (PMMPTE)(MM_PTE_BASE + Offset);
+}
+
 /**
  * Performs architecture specific initialization of the XTOS Memory Manager.
  *
@@ -22,3 +64,18 @@ MmpInitializeArchitecture(VOID)
 {
     UNIMPLEMENTED;
 }
+
+/**
+ * Checks if PAE (Physical Address Extension) is enabled.
+ *
+ * @return This routine returns TRUE if PAE is enabled, or FALSE otherwise.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+BOOLEAN
+MmpMemoryExtensionEnabled(VOID)
+{
+    /* Check if PAE is enabled */
+    return ((ArReadControlRegister(4) & CR4_PAE) != 0) ? TRUE : FALSE;
+}

xtoskrnl/mm/init.c

@@ -49,7 +49,7 @@ XTAPI
 VOID
 MmpScanMemoryDescriptors(VOID)
 {
-    PLOADER_MEMORY_MAPPING MemoryDescriptor;
+    PLOADER_MEMORY_DESCRIPTOR MemoryDescriptor;
     PLIST_ENTRY MemoryMappings;
     PFN_NUMBER FreePages;
 
@@ -61,11 +61,11 @@ MmpScanMemoryDescriptors(VOID)
     while(MemoryMappings != &KeInitializationBlock->MemoryDescriptorListHead)
     {
         /* Get memory descriptor */
-        MemoryDescriptor = CONTAIN_RECORD(MemoryMappings, LOADER_MEMORY_MAPPING, ListEntry);
+        MemoryDescriptor = CONTAIN_RECORD(MemoryMappings, LOADER_MEMORY_DESCRIPTOR, ListEntry);
 
         /* Check if memory type is invisible or cached */
         if(MmpVerifyMemoryTypeInvisible(MemoryDescriptor->MemoryType) ||
-           (MemoryDescriptor->MemoryType == LoaderHALCachedMemory))
+           (MemoryDescriptor->MemoryType == LoaderHardwareCachedMemory))
         {
             /* Skip this mapping */
             MemoryMappings = MemoryMappings->Flink;
@@ -110,7 +110,7 @@ MmpScanMemoryDescriptors(VOID)
     }
 
     /* Store original free descriptor */
-    RtlCopyMemory(&MmOldFreeDescriptor, MmFreeDescriptor, sizeof(LOADER_MEMORY_MAPPING));
+    RtlCopyMemory(&MmOldFreeDescriptor, MmFreeDescriptor, sizeof(LOADER_MEMORY_DESCRIPTOR));
 }
 
 /** Checks whether the specified memory type should be considered as free.

xtoskrnl/mm/kpools.c

@@ -35,6 +35,51 @@ MmAllocateKernelStack(IN PVOID *Stack,
     return STATUS_NOT_IMPLEMENTED;
 }
 
+/**
+ * Allocates a buffer for structures needed by a processor and assigns it to a corresponding CPU.
+ *
+ * @param CpuNumber
+ *        Specifies the zero-indexed CPU number as an owner of the allocated structures.
+ *
+ * @param StructuresData
+ *        Supplies a pointer to the memory area that will contain the allocated buffer.
+ *
+ * @return This routine returns a status code.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+XTSTATUS
+MmAllocateProcessorStructures(IN ULONG CpuNumber,
+                              OUT PVOID *StructuresData)
+{
+    PKPROCESSOR_BLOCK ProcessorBlock;
+    PVOID ProcessorStructures;
+    UINT_PTR Address;
+
+    /* Not implemented yet, this is just a hack */
+    UNIMPLEMENTED;
+
+    /* Assign memory for processor structures from preallocated buffer */
+    ProcessorStructures = &MmProcessorStructuresData[CpuNumber - 1];
+
+    /* Make sure all structures are zeroed */
+    RtlZeroMemory(ProcessorStructures, KPROCESSOR_STRUCTURES_SIZE);
+
+    /* Align address to page size boundary and find a space for processor block */
+    Address = ROUND_UP((UINT_PTR)ProcessorStructures, MM_PAGE_SIZE);
+    ProcessorBlock = (PKPROCESSOR_BLOCK)((PUCHAR)Address + (2 * KERNEL_STACK_SIZE) + sizeof(ArInitialGdt));
+
+    /* Store processor number in the processor block */
+    ProcessorBlock->CpuNumber = CpuNumber;
+
+    /* Return pointer to the processor structures */
+    *StructuresData = ProcessorStructures;
+
+    /* Return success */
+    return STATUS_SUCCESS;
+}
+
 /**
  * Destroys a kernel stack and frees page table entry.
  *
@@ -55,3 +100,20 @@ MmFreeKernelStack(IN PVOID Stack,
 {
     UNIMPLEMENTED;
 }
+
+/**
+ * Destroys an unused set of processor structures.
+ *
+ * @param StructuresData
+ *        Supplies a pointer to the memory area containing the allocated buffer.
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MmFreeProcessorStructures(IN PVOID StructuresData)
+{
+    UNIMPLEMENTED;
+}

xtoskrnl/mm/pages.c

@@ -0,0 +1,62 @@
+/**
+ * PROJECT:         ExectOS
+ * COPYRIGHT:       See COPYING.md in the top level directory
+ * FILE:            xtoskrnl/mm/pages.c
+ * DESCRIPTION:     Low level page management support
+ * DEVELOPERS:      Rafal Kupiec <belliash@codingworkshop.eu.org>
+ */
+
+#include <xtos.h>
+
+
+/**
+ * Flushes current Translation Lookaside Buffer (TLB)
+ *
+ * @return This routine does not return any value.
+ *
+ * @since XT 1.0
+ */
+XTAPI
+VOID
+MmFlushTlb(VOID)
+{
+    CPUID_REGISTERS CpuRegisters;
+    BOOLEAN Interrupts;
+    ULONG_PTR Cr4;
+
+    /* Save interrupts state and disable them */
+    Interrupts = ArInterruptsEnabled();
+    ArClearInterruptFlag();
+
+    /* Get CPU features */
+    CpuRegisters.Leaf = CPUID_GET_CPU_FEATURES;
+    ArCpuId(&CpuRegisters);
+
+    /* Check if Paging Global Extensions (PGE) is supported */
+    if(CpuRegisters.Edx & CPUID_FEATURES_EDX_PGE)
+    {
+        /* Read CR4 */
+        Cr4 = ArReadControlRegister(4);
+
+        /* Disable PGE */
+        ArWriteControlRegister(4, Cr4 & ~CR4_PGE);
+
+        /* Flush the TLB */
+        ArFlushTlb();
+
+        /* Restore CR4 */
+        ArWriteControlRegister(4, Cr4);
+    }
+    else
+    {
+        /* Simply flush the TLB */
+        ArFlushTlb();
+    }
+
+    /* Check if interrupts should be enabled */
+    if(Interrupts)
+    {
+        /* Re-enable interrupts */
+        ArSetInterruptFlag();
+    }
+}

xtoskrnl/po/idle.c

@@ -29,11 +29,12 @@ PoInitializeProcessorControlBlock(IN OUT PKPROCESSOR_CONTROL_BLOCK Prcb)
     /* Initialize default power state */
     Prcb->PowerState.Idle0TimeLimit = 0xFFFFFFFF;
     Prcb->PowerState.CurrentThrottle = 100;
+    Prcb->PowerState.CurrentThrottleIndex = 0;
     Prcb->PowerState.IdleFunction = PopIdle0Function;
 
     /* Initialize DPC and Timer */
     KeInitializeDpc(&Prcb->PowerState.PerfDpc, PopPerfIdleDpc, Prcb);
-    KeSetTargetProcessorDpc(&Prcb->PowerState.PerfDpc, Prcb->Number);
+    KeSetTargetProcessorDpc(&Prcb->PowerState.PerfDpc, Prcb->CpuNumber);
     KeInitializeTimer(&Prcb->PowerState.PerfTimer, SynchronizationTimer);
 }
 

xtoskrnl/rtl/plist.c

@@ -94,7 +94,7 @@ RtlInsertTailList(IN OUT PLIST_ENTRY ListHead,
 }
 
 /**
- * Indicates whether a doubly linked list structure is empty.
+ * Indicates whether a doubly linked list structure is empty, or not initialized at all.
  *
  * @param ListHead
  *        Pointer to a structure that represents the head of the list.
@@ -107,7 +107,7 @@ XTCDECL
 BOOLEAN
 RtlListEmpty(IN PLIST_ENTRY ListHead)
 {
-    return (ListHead->Flink == ListHead);
+    return (((ListHead->Flink == NULL) && (ListHead->Blink == NULL)) || (ListHead->Flink == ListHead));
 }
 
 /**

xtoskrnl/xtoskrnl.spec

@@ -13,9 +13,11 @@
 @ cdecl HlIoPortOutShort(ptr long)
 @ fastcall KeAcquireQueuedSpinLock(long)
 @ fastcall KeAcquireSpinLock(ptr)
+@ stdcall KeAcquireSystemResource(long ptr)
 @ stdcall KeCancelTimer(ptr)
 @ fastcall KeGetCurrentRunLevel()
 @ stdcall KeGetTimerState(ptr)
+@ stdcall KeGetSystemResource(long ptr)
 @ stdcall KeInitializeApc(ptr ptr long ptr ptr ptr long ptr)
 @ stdcall KeInitializeDpc(ptr ptr ptr)
 @ stdcall KeInitializeSemaphore(ptr long long)
@@ -28,6 +30,7 @@
 @ stdcall KeReleaseSemaphore(ptr long long long)
 @ fastcall KeReleaseQueuedSpinLock(long)
 @ fastcall KeReleaseSpinLock(ptr)
+@ stdcall KeReleaseSystemResource(ptr)
 @ stdcall KeSetTargetProcessorDpc(ptr long)
 @ stdcall KeSetTimer(ptr long long long ptr)
 @ stdcall KeSignalCallDpcDone(ptr)