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Introduce architecture library as new kernel subsystem and move selected routines into new subsystem
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This commit is contained in:
Rafal Kupiec
2023-01-28 10:34:55 +01:00
parent 651113c4e8
commit 27e2fdf4f2
19 changed files with 837 additions and 736 deletions
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3
xtoskrnl/CMakeLists.txt
View File

@@ -8,9 +8,10 @@ include_directories(
# Specify list of source code files
list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.c
${XTOSKRNL_SOURCE_DIR}/hl/cport.c
${XTOSKRNL_SOURCE_DIR}/hl/efifb.c
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/cpufunc.c
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.c
${XTOSKRNL_SOURCE_DIR}/ke/globals.c
${XTOSKRNL_SOURCE_DIR}/ke/krnlinit.c
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.c

175
xtoskrnl/hl/amd64/cpufunc.c → xtoskrnl/ar/amd64/cpufunc.c
View File

@@ -1,7 +1,7 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/hl/amd64/cpufunc.c
* FILE: xtoskrnl/ar/amd64/cpufunc.c
* DESCRIPTION: Routines to provide access to special AMD64 CPU instructions
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
@@ -18,7 +18,7 @@
*/
XTCDECL
VOID
HlClearInterruptFlag()
ArClearInterruptFlag()
{
asm volatile("cli");
}
@@ -35,7 +35,7 @@ HlClearInterruptFlag()
*/
XTCDECL
BOOLEAN
HlCpuId(IN OUT PCPUID_REGISTERS Registers)
ArCpuId(IN OUT PCPUID_REGISTERS Registers)
{
UINT32 MaxLeaf;
@@ -76,7 +76,7 @@ HlCpuId(IN OUT PCPUID_REGISTERS Registers)
*/
XTCDECL
VOID
HlHalt()
ArHalt()
{
asm volatile("hlt");
}
@@ -93,7 +93,7 @@ HlHalt()
*/
XTCDECL
VOID
HlInvalidateTlbEntry(IN PVOID Address)
ArInvalidateTlbEntry(IN PVOID Address)
{
asm volatile("invlpg (%0)"
:
@@ -101,141 +101,6 @@ HlInvalidateTlbEntry(IN PVOID Address)
: "memory");
}
/**
* Reads the 8-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
UCHAR
HlIoPortInByte(IN USHORT Port)
{
UCHAR Value;
asm volatile("inb %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Reads the 16-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
USHORT
HlIoPortInShort(IN USHORT Port)
{
USHORT Value;
asm volatile("inw %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Reads the 32-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
ULONG
HlIoPortInLong(IN USHORT Port)
{
ULONG Value;
asm volatile("inl %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Writes the 8-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutByte(IN USHORT Port,
IN UCHAR Value)
{
asm volatile("outb %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Writes the 16-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutShort(IN USHORT Port,
IN USHORT Value)
{
asm volatile("outw %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Writes the 32-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value)
{
asm volatile("outl %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Loads the values in the source operand into the global descriptor table register (GDTR).
*
@@ -248,7 +113,7 @@ HlIoPortOutLong(IN USHORT Port,
*/
XTCDECL
VOID
HlLoadGlobalDescriptorTable(IN PVOID Source)
ArLoadGlobalDescriptorTable(IN PVOID Source)
{
asm volatile("lgdt %0"
:
@@ -268,7 +133,7 @@ HlLoadGlobalDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
HlLoadInterruptDescriptorTable(IN PVOID Source)
ArLoadInterruptDescriptorTable(IN PVOID Source)
{
asm volatile("lidt %0"
:
@@ -291,7 +156,7 @@ HlLoadInterruptDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
HlLoadSegment(IN USHORT Segment,
ArLoadSegment(IN USHORT Segment,
IN ULONG Source)
{
switch(Segment)
@@ -341,7 +206,7 @@ HlLoadSegment(IN USHORT Segment,
*/
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source)
ArLoadTaskRegister(USHORT Source)
{
asm volatile("ltr %0"
:
@@ -360,7 +225,7 @@ HlLoadTaskRegister(USHORT Source)
*/
XTCDECL
ULONG_PTR
HlReadControlRegister(IN USHORT ControlRegister)
ArReadControlRegister(IN USHORT ControlRegister)
{
ULONG_PTR Value;
@@ -423,7 +288,7 @@ HlReadControlRegister(IN USHORT ControlRegister)
*/
XTCDECL
ULONGLONG
HlReadGSQuadWord(ULONG Offset)
ArReadGSQuadWord(ULONG Offset)
{
ULONGLONG Value;
@@ -446,7 +311,7 @@ HlReadGSQuadWord(ULONG Offset)
*/
XTCDECL
ULONGLONG
HlReadModelSpecificRegister(IN ULONG Register)
ArReadModelSpecificRegister(IN ULONG Register)
{
ULONG Low, High;
@@ -467,7 +332,7 @@ HlReadModelSpecificRegister(IN ULONG Register)
*/
XTCDECL
ULONGLONG
HlReadTimeStampCounter()
ArReadTimeStampCounter()
{
ULONGLONG Low, High;
@@ -487,7 +352,7 @@ HlReadTimeStampCounter()
*/
XTCDECL
VOID
HlSetInterruptFlag()
ArSetInterruptFlag()
{
asm volatile("sti");
}
@@ -504,7 +369,7 @@ HlSetInterruptFlag()
*/
XTCDECL
VOID
HlStoreGlobalDescriptorTable(OUT PVOID Destination)
ArStoreGlobalDescriptorTable(OUT PVOID Destination)
{
asm volatile("sgdt %0"
:
@@ -524,7 +389,7 @@ HlStoreGlobalDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
HlStoreInterruptDescriptorTable(OUT PVOID Destination)
ArStoreInterruptDescriptorTable(OUT PVOID Destination)
{
asm volatile("sidt %0"
:
@@ -547,7 +412,7 @@ HlStoreInterruptDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
HlStoreSegment(IN USHORT Segment,
ArStoreSegment(IN USHORT Segment,
OUT PVOID Destination)
{
switch(Segment)
@@ -594,7 +459,7 @@ HlStoreSegment(IN USHORT Segment,
*/
XTCDECL
VOID
HlStoreTaskRegister(OUT PVOID Destination)
ArStoreTaskRegister(OUT PVOID Destination)
{
asm volatile("str %0"
:
@@ -617,7 +482,7 @@ HlStoreTaskRegister(OUT PVOID Destination)
*/
XTCDECL
VOID
HlWriteControlRegister(IN USHORT ControlRegister,
ArWriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
{
/* Write a value into specified control register */
@@ -676,7 +541,7 @@ HlWriteControlRegister(IN USHORT ControlRegister,
*/
XTCDECL
VOID
HlWriteModelSpecificRegister(IN ULONG Register,
ArWriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
{
ULONG Low = Value & 0xFFFFFFFF;

173
xtoskrnl/hl/i686/cpufunc.c → xtoskrnl/ar/i686/cpufunc.c
View File

@@ -1,7 +1,7 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/hl/i686/cpufunc.c
* FILE: xtoskrnl/ar/i686/cpufunc.c
* DESCRIPTION: Routines to provide access to special i686 CPU instructions
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
@@ -18,7 +18,7 @@
*/
XTCDECL
VOID
HlClearInterruptFlag()
ArClearInterruptFlag()
{
asm volatile("cli");
}
@@ -35,7 +35,7 @@ HlClearInterruptFlag()
*/
XTCDECL
BOOLEAN
HlCpuId(IN OUT PCPUID_REGISTERS Registers)
ArCpuId(IN OUT PCPUID_REGISTERS Registers)
{
UINT32 MaxLeaf;
@@ -76,7 +76,7 @@ HlCpuId(IN OUT PCPUID_REGISTERS Registers)
*/
XTCDECL
VOID
HlHalt()
ArHalt()
{
asm volatile("hlt");
}
@@ -93,7 +93,7 @@ HlHalt()
*/
XTCDECL
VOID
HlInvalidateTlbEntry(PVOID Address)
ArInvalidateTlbEntry(PVOID Address)
{
asm volatile("invlpg (%0)"
:
@@ -101,141 +101,6 @@ HlInvalidateTlbEntry(PVOID Address)
: "memory");
}
/**
* Reads the 8-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
UCHAR
HlIoPortInByte(IN USHORT Port)
{
UCHAR Value;
asm volatile("inb %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Reads the 16-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
USHORT
HlIoPortInShort(IN USHORT Port)
{
USHORT Value;
asm volatile("inw %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Reads the 32-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
ULONG
HlIoPortInLong(IN USHORT Port)
{
ULONG Value;
asm volatile("inl %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Writes the 8-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutByte(IN USHORT Port,
IN UCHAR Value)
{
asm volatile("outb %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Writes the 16-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutShort(IN USHORT Port,
IN USHORT Value)
{
asm volatile("outw %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Writes the 32-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value)
{
asm volatile("outl %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Loads the values in the source operand into the global descriptor table register (GDTR).
*
@@ -248,7 +113,7 @@ HlIoPortOutLong(IN USHORT Port,
*/
XTCDECL
VOID
HlLoadGlobalDescriptorTable(IN PVOID Source)
ArLoadGlobalDescriptorTable(IN PVOID Source)
{
asm volatile("lgdt %0"
:
@@ -268,7 +133,7 @@ HlLoadGlobalDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
HlLoadInterruptDescriptorTable(IN PVOID Source)
ArLoadInterruptDescriptorTable(IN PVOID Source)
{
asm volatile("lidt %0"
:
@@ -291,7 +156,7 @@ HlLoadInterruptDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
HlLoadSegment(IN USHORT Segment,
ArLoadSegment(IN USHORT Segment,
IN ULONG Source)
{
switch(Segment)
@@ -341,7 +206,7 @@ HlLoadSegment(IN USHORT Segment,
*/
XTCDECL
VOID
HlLoadTaskRegister(USHORT Source)
ArLoadTaskRegister(USHORT Source)
{
asm volatile("ltr %0"
:
@@ -360,7 +225,7 @@ HlLoadTaskRegister(USHORT Source)
*/
XTCDECL
ULONG_PTR
HlReadControlRegister(IN USHORT ControlRegister)
ArReadControlRegister(IN USHORT ControlRegister)
{
ULONG_PTR Value;
@@ -417,7 +282,7 @@ HlReadControlRegister(IN USHORT ControlRegister)
*/
XTCDECL
ULONGLONG
HlReadModelSpecificRegister(IN ULONG Register)
ArReadModelSpecificRegister(IN ULONG Register)
{
ULONGLONG Value;
@@ -436,7 +301,7 @@ HlReadModelSpecificRegister(IN ULONG Register)
*/
XTCDECL
ULONGLONG
HlReadTimeStampCounter()
ArReadTimeStampCounter()
{
ULONGLONG Value;
@@ -455,7 +320,7 @@ HlReadTimeStampCounter()
*/
XTCDECL
VOID
HlSetInterruptFlag()
ArSetInterruptFlag()
{
asm volatile("sti");
}
@@ -472,7 +337,7 @@ HlSetInterruptFlag()
*/
XTCDECL
VOID
HlStoreGlobalDescriptorTable(OUT PVOID Destination)
ArStoreGlobalDescriptorTable(OUT PVOID Destination)
{
asm volatile("sgdt %0"
:
@@ -492,7 +357,7 @@ HlStoreGlobalDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
HlStoreInterruptDescriptorTable(OUT PVOID Destination)
ArStoreInterruptDescriptorTable(OUT PVOID Destination)
{
asm volatile("sidt %0"
:
@@ -515,7 +380,7 @@ HlStoreInterruptDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
HlStoreSegment(IN USHORT Segment,
ArStoreSegment(IN USHORT Segment,
OUT PVOID Destination)
{
switch(Segment)
@@ -562,7 +427,7 @@ HlStoreSegment(IN USHORT Segment,
*/
XTCDECL
VOID
HlStoreTaskRegister(OUT PVOID Destination)
ArStoreTaskRegister(OUT PVOID Destination)
{
asm volatile("str %0"
:
@@ -585,7 +450,7 @@ HlStoreTaskRegister(OUT PVOID Destination)
*/
XTCDECL
VOID
HlWriteControlRegister(IN USHORT ControlRegister,
ArWriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
{
/* Write a value into specified control register */
@@ -637,7 +502,7 @@ HlWriteControlRegister(IN USHORT ControlRegister,
*/
XTCDECL
VOID
HlWriteModelSpecificRegister(IN ULONG Register,
ArWriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
{
asm volatile("wrmsr"

145
xtoskrnl/hl/amd64/ioport.c Normal file
View File

@@ -0,0 +1,145 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/hl/amd64/ioport.c
* DESCRIPTION: I/O port access routines for AMD64 platform
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include "xtkmapi.h"
/**
* Reads the 8-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
UCHAR
HlIoPortInByte(IN USHORT Port)
{
UCHAR Value;
asm volatile("inb %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Reads the 16-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
USHORT
HlIoPortInShort(IN USHORT Port)
{
USHORT Value;
asm volatile("inw %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Reads the 32-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
ULONG
HlIoPortInLong(IN USHORT Port)
{
ULONG Value;
asm volatile("inl %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Writes the 8-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutByte(IN USHORT Port,
IN UCHAR Value)
{
asm volatile("outb %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Writes the 16-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutShort(IN USHORT Port,
IN USHORT Value)
{
asm volatile("outw %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Writes the 32-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value)
{
asm volatile("outl %0, %1"
:
: "a" (Value),
"Nd" (Port));
}

145
xtoskrnl/hl/i686/ioport.c Normal file
View File

@@ -0,0 +1,145 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/hl/i686/ioport.c
* DESCRIPTION: I/O port access routines for i686 platform
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
*/
#include "xtkmapi.h"
/**
* Reads the 8-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
UCHAR
HlIoPortInByte(IN USHORT Port)
{
UCHAR Value;
asm volatile("inb %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Reads the 16-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
USHORT
HlIoPortInShort(IN USHORT Port)
{
USHORT Value;
asm volatile("inw %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Reads the 32-bit data from the specified I/O port.
*
* @param Port
* Specifies the address to read from, in the range of 0-0xFFFF.
*
* @return The value read from the port.
*
* @since XT 1.0
*/
XTCDECL
ULONG
HlIoPortInLong(IN USHORT Port)
{
ULONG Value;
asm volatile("inl %1, %0"
: "=a" (Value)
: "Nd" (Port));
return Value;
}
/**
* Writes the 8-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutByte(IN USHORT Port,
IN UCHAR Value)
{
asm volatile("outb %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Writes the 16-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutShort(IN USHORT Port,
IN USHORT Value)
{
asm volatile("outw %0, %1"
:
: "a" (Value),
"Nd" (Port));
}
/**
* Writes the 32-bit data to the specified I/O port.
*
* @param Port
* Specifies the address to write to, in the range of 0-0xFFFF.
*
* @param Value
* Supplies the value to write.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HlIoPortOutLong(IN USHORT Port,
IN ULONG Value)
{
asm volatile("outl %0, %1"
:
: "a" (Value),
"Nd" (Port));
}