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83c0accc5f
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Update EFLAGS masks
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2023-11-09 16:12:24 +01:00 |
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641b34b119
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Fixes in i686 version of KepInitializeThreadContext()
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2023-11-08 16:06:01 +01:00 |
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91ce0f9947
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Compensate missing return address, which is a 4-byte on i686 and an 8-byte on amd64
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2023-11-05 20:07:13 +01:00 |
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f05a262da2
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Cleanup XTDK and XTOSKRNL headers
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2023-10-29 09:58:47 +01:00 |
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798e4c1d22
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Cleanup MM subsystem headers
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2023-10-29 00:52:05 +02:00 |
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600c86949b
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Cleanup RTL subsystem headers
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2023-10-29 00:14:01 +02:00 |
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d920cae481
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Fix build by defining more routines used by XTLDR
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2023-10-28 23:41:52 +02:00 |
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ad15c55a39
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Cleanup AR subsystem headers
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2023-10-28 23:35:34 +02:00 |
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358b20f1a1
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Reorder routines
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2023-04-04 22:35:06 +02:00 |
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e6b64b741a
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Initialize thread context for i686
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2023-03-15 23:05:18 +01:00 |
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3afbc7e419
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Introduce SIMD save area in place of FN/FX and use anonymous union inside FX_SAVE_AREA structure
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2023-03-15 22:19:18 +01:00 |
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a8fa702b05
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Unify KSWITCH_FRAME naming with AMD64
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2023-03-15 19:15:31 +01:00 |
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10ccf67e8e
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Add missing forward declarations
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2023-03-14 22:50:32 +01:00 |
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cec8a13e4c
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Add context control flags and thread frames for i686 architecture
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2023-03-14 22:47:32 +01:00 |
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70795ae57a
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Add EFLAGS and THREAD_ENVIRONMENT_BLOCK for x86
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2023-03-05 18:11:57 +01:00 |
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c5a9253ea8
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Implement ArLoadLocalDescriptorTable() routine
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2023-03-02 23:04:36 +01:00 |
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870a6680b0
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Add thread information block
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2023-03-01 00:14:06 +01:00 |
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3d42fcc0f5
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Add KSWITCH_FRAME definition for i686 architecture
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2023-03-01 00:03:20 +01:00 |
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ef23acc3bc
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Add Deferred Procedure Call (DPC) and processor power state related structures
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2023-02-27 19:58:47 +01:00 |
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e41de62dab
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Implement ArYieldProcessor() routine
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2023-02-27 17:28:20 +01:00 |
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c8428241dd
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Add missing headers containing forward references of MM routines
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2023-02-20 22:22:32 +01:00 |
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b1c2b209e3
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Implement RtlGetStackLimits() routine
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2023-02-15 20:12:58 +01:00 |
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18a39f95bc
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Add floating save area structure definitions
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2023-02-15 20:07:17 +01:00 |
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2e790bd9b2
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Add pages related macros and definitions
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2023-02-13 23:01:20 +01:00 |
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e94cb2d3a7
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Processor identification structures
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2023-02-10 17:14:12 +01:00 |
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e645cf664c
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Set process and thread information in processor control block
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2023-02-09 17:30:24 +01:00 |
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9132c47cd9
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Initial process and thread related structures
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2023-02-08 23:40:58 +01:00 |
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a32e18b237
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Implement ArReadFSDualWord() routine
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2023-02-07 23:19:22 +01:00 |
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5eaf7d63a3
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Initialize Page Attribute Table
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2023-02-05 00:14:34 +01:00 |
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f37722b6e6
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Distinguish ProcessorBlock and ProcessorControlBlock
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2023-02-03 19:28:03 +01:00 |
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269214ed34
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Another improvements to GDT
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2023-02-03 18:00:37 +01:00 |
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dc1a94b982
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This is 'Processor Block'
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2023-02-01 22:02:07 +01:00 |
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21fbe6febe
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Add IDT related definitions
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2023-02-01 20:14:10 +01:00 |
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5bbda188c6
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IDT access levels and gate types
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2023-02-01 00:51:13 +01:00 |
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9a1e9b1084
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Define TSS offsets
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2023-01-30 23:43:10 +01:00 |
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a761d3125a
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Architecture specific initialization prior to processor structures initialization
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2023-01-30 20:34:05 +01:00 |
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6f068513cd
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Initial processor block initialization
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2023-01-30 19:07:05 +01:00 |
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ce4e590347
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Add missing forward declaration of ArInitializeProcessor() routine
ci/woodpecker/push/build Pipeline was successful
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2023-01-29 00:57:06 +01:00 |
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900e71459a
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Add missing x86 descriptor sizes
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2023-01-29 00:54:36 +01:00 |
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27e2fdf4f2
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Introduce architecture library as new kernel subsystem and move selected routines into new subsystem
ci/woodpecker/push/build Pipeline was successful
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2023-01-28 10:34:55 +01:00 |
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e94e50b5d9
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Implement HlLoadInterruptDescriptorTable() intrinsics for loading IDT
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2023-01-26 20:08:57 +01:00 |
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3ad3149f80
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Add descriptor structure definition
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2023-01-25 17:42:35 +01:00 |
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bfc9db8b6d
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Unify KGDTENTRY and KIDTENTRY between architectures as much as possible
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2023-01-25 17:35:03 +01:00 |
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3ee759cc27
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i686 Interrupt request levels definitions
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2023-01-25 17:18:27 +01:00 |
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7bd67d6210
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Add GDT and Segments related definitions for i686
ci/woodpecker/push/build Pipeline was successful
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2023-01-25 17:13:24 +01:00 |
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707dc37868
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Fix type of Source parameter in HlLoadSegment() routine
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2023-01-24 23:08:48 +01:00 |
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35aa514f95
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Implement HlLoadSegment() intrinsics routine
ci/woodpecker/push/build Pipeline was successful
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2023-01-24 19:27:18 +01:00 |
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d3d8d144a0
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Implement HlLoadGlobalDescriptorTable() intrinsic
ci/woodpecker/push/build Pipeline was successful
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2023-01-23 20:13:51 +01:00 |
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f20ab3e52e
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Implement HlLoadTaskRegister() for loading TSS segment selector into task register
ci/woodpecker/push/build Pipeline was successful
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2023-01-23 15:26:35 +01:00 |
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fb60625abc
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Add more intrinsic routines
ci/woodpecker/push/build Pipeline was successful
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2023-01-13 22:32:45 +01:00 |
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